MachineOperand class - Representation of each machine instruction operand. More...

#include "llvm/CodeGen/MachineOperand.h"

Collaboration diagram for llvm::MachineOperand:

[legend]

Public Types
enum	MachineOperandType : unsigned char { MO_Register, MO_Immediate, MO_CImmediate, MO_FPImmediate, MO_MachineBasicBlock, MO_FrameIndex, MO_ConstantPoolIndex, MO_TargetIndex, MO_JumpTableIndex, MO_ExternalSymbol, MO_GlobalAddress, MO_BlockAddress, MO_RegisterMask, MO_RegisterLiveOut, MO_Metadata, MO_MCSymbol, MO_CFIIndex, MO_IntrinsicID, MO_Predicate, MO_Last = MO_Predicate }

Public Member Functions
MachineOperandType	getType () const
	getType - Returns the MachineOperandType for this operand. More...

unsigned	getTargetFlags () const

void	setTargetFlags (unsigned F)

void	addTargetFlag (unsigned F)

MachineInstr *	getParent ()
	getParent - Return the instruction that this operand belongs to. More...

const MachineInstr *	getParent () const

void	clearParent ()
	clearParent - Reset the parent pointer. More...

void	print (raw_ostream &os, const TargetRegisterInfo TRI=nullptr, const TargetIntrinsicInfo IntrinsicInfo=nullptr) const
	Print the MachineOperand to `os`. More...

void	print (raw_ostream &os, ModuleSlotTracker &MST, LLT TypeToPrint, bool PrintDef, bool IsStandalone, bool ShouldPrintRegisterTies, unsigned TiedOperandIdx, const TargetRegisterInfo TRI, const TargetIntrinsicInfo IntrinsicInfo) const
	More complex way of printing a MachineOperand. More...

void	print (raw_ostream &os, LLT TypeToPrint, const TargetRegisterInfo TRI=nullptr, const TargetIntrinsicInfo IntrinsicInfo=nullptr) const
	Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level type to be printed the same way the full version of print(...) does it. More...

void	dump () const

bool	isReg () const
	isReg - Tests if this is a MO_Register operand. More...

bool	isImm () const
	isImm - Tests if this is a MO_Immediate operand. More...

bool	isCImm () const
	isCImm - Test if this is a MO_CImmediate operand. More...

bool	isFPImm () const
	isFPImm - Tests if this is a MO_FPImmediate operand. More...

bool	isMBB () const
	isMBB - Tests if this is a MO_MachineBasicBlock operand. More...

bool	isFI () const
	isFI - Tests if this is a MO_FrameIndex operand. More...

bool	isCPI () const
	isCPI - Tests if this is a MO_ConstantPoolIndex operand. More...

bool	isTargetIndex () const
	isTargetIndex - Tests if this is a MO_TargetIndex operand. More...

bool	isJTI () const
	isJTI - Tests if this is a MO_JumpTableIndex operand. More...

bool	isGlobal () const
	isGlobal - Tests if this is a MO_GlobalAddress operand. More...

bool	isSymbol () const
	isSymbol - Tests if this is a MO_ExternalSymbol operand. More...

bool	isBlockAddress () const
	isBlockAddress - Tests if this is a MO_BlockAddress operand. More...

bool	isRegMask () const
	isRegMask - Tests if this is a MO_RegisterMask operand. More...

bool	isRegLiveOut () const
	isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand. More...

bool	isMetadata () const
	isMetadata - Tests if this is a MO_Metadata operand. More...

bool	isMCSymbol () const

bool	isCFIIndex () const

bool	isIntrinsicID () const

bool	isPredicate () const

unsigned	getReg () const
	getReg - Returns the register number. More...

unsigned	getSubReg () const

bool	isUse () const

bool	isDef () const

bool	isImplicit () const

bool	isDead () const

bool	isKill () const

bool	isUndef () const

bool	isRenamable () const
	isRenamable - Returns true if this register may be renamed, i.e. More...

bool	isInternalRead () const

bool	isEarlyClobber () const

bool	isTied () const

bool	isDebug () const

bool	readsReg () const
	readsReg - Returns true if this operand reads the previous value of its register. More...

void	setReg (unsigned Reg)
	Change the register this operand corresponds to. More...

void	setSubReg (unsigned subReg)

void	substVirtReg (unsigned Reg, unsigned SubIdx, const TargetRegisterInfo &)
	substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg. More...

void	substPhysReg (unsigned Reg, const TargetRegisterInfo &)
	substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account. More...

void	setIsUse (bool Val=true)

void	setIsDef (bool Val=true)
	Change a def to a use, or a use to a def. More...

void	setImplicit (bool Val=true)

void	setIsKill (bool Val=true)

void	setIsDead (bool Val=true)

void	setIsUndef (bool Val=true)

void	setIsRenamable (bool Val=true)

void	setIsInternalRead (bool Val=true)

void	setIsEarlyClobber (bool Val=true)

void	setIsDebug (bool Val=true)

int64_t	getImm () const

const ConstantInt *	getCImm () const

const ConstantFP *	getFPImm () const

MachineBasicBlock *	getMBB () const

int	getIndex () const

const GlobalValue *	getGlobal () const

const BlockAddress *	getBlockAddress () const

MCSymbol *	getMCSymbol () const

unsigned	getCFIIndex () const

Intrinsic::ID	getIntrinsicID () const

unsigned	getPredicate () const

int64_t	getOffset () const
	Return the offset from the symbol in this operand. More...

const char *	getSymbolName () const

bool	clobbersPhysReg (unsigned PhysReg) const
	clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg. More...

const uint32_t *	getRegMask () const
	getRegMask - Returns a bit mask of registers preserved by this RegMask operand. More...

const uint32_t *	getRegLiveOut () const
	getRegLiveOut - Returns a bit mask of live-out registers. More...

const MDNode *	getMetadata () const

void	setImm (int64_t immVal)

void	setCImm (const ConstantInt *CI)

void	setFPImm (const ConstantFP *CFP)

void	setOffset (int64_t Offset)

void	setIndex (int Idx)

void	setMetadata (const MDNode *MD)

void	setMBB (MachineBasicBlock *MBB)

void	setRegMask (const uint32_t *RegMaskPtr)
	Sets value of register mask operand referencing Mask. More...

bool	isIdenticalTo (const MachineOperand &Other) const
	Returns true if this operand is identical to the specified operand except for liveness related flags (isKill, isUndef and isDead). More...

void	ChangeToImmediate (int64_t ImmVal)
	ChangeToImmediate - Replace this operand with a new immediate operand of the specified value. More...

void	ChangeToFPImmediate (const ConstantFP *FPImm)
	ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value. More...

void	ChangeToES (const char *SymName, unsigned char TargetFlags=0)
	ChangeToES - Replace this operand with a new external symbol operand. More...

void	ChangeToMCSymbol (MCSymbol *Sym)
	ChangeToMCSymbol - Replace this operand with a new MC symbol operand. More...

void	ChangeToFrameIndex (int Idx)
	Replace this operand with a frame index. More...

void	ChangeToTargetIndex (unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
	Replace this operand with a target index. More...

void	ChangeToRegister (unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
	ChangeToRegister - Replace this operand with a new register operand of the specified value. More...

Static Public Member Functions
static void	printSubRegIdx (raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
	Print a subreg index operand. More...

static void	printTargetFlags (raw_ostream &OS, const MachineOperand &Op)
	Print operand target flags. More...

static void	printSymbol (raw_ostream &OS, MCSymbol &Sym)
	Print a MCSymbol as an operand. More...

static void	printStackObjectReference (raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
	Print a stack object reference. More...

static void	printOperandOffset (raw_ostream &OS, int64_t Offset)
	Print the offset with explicit +/- signs. More...

static void	printIRSlotNumber (raw_ostream &OS, int Slot)
	Print an IRSlotNumber. More...

static bool	clobbersPhysReg (const uint32_t *RegMask, unsigned PhysReg)
	clobbersPhysReg - Returns true if this RegMask clobbers PhysReg. More...

static unsigned	getRegMaskSize (unsigned NumRegs)
	Returns number of elements needed for a regmask array. More...

static MachineOperand	CreateImm (int64_t Val)

static MachineOperand	CreateCImm (const ConstantInt *CI)

static MachineOperand	CreateFPImm (const ConstantFP *CFP)

static MachineOperand	CreateReg (unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)

static MachineOperand	CreateMBB (MachineBasicBlock *MBB, unsigned char TargetFlags=0)

static MachineOperand	CreateFI (int Idx)

static MachineOperand	CreateCPI (unsigned Idx, int Offset, unsigned char TargetFlags=0)

static MachineOperand	CreateTargetIndex (unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)

static MachineOperand	CreateJTI (unsigned Idx, unsigned char TargetFlags=0)

static MachineOperand	CreateGA (const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)

static MachineOperand	CreateES (const char *SymName, unsigned char TargetFlags=0)

static MachineOperand	CreateBA (const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)

static MachineOperand	CreateRegMask (const uint32_t *Mask)
	CreateRegMask - Creates a register mask operand referencing Mask. More...

static MachineOperand	CreateRegLiveOut (const uint32_t *Mask)

static MachineOperand	CreateMetadata (const MDNode *Meta)

static MachineOperand	CreateMCSymbol (MCSymbol *Sym, unsigned char TargetFlags=0)

static MachineOperand	CreateCFIIndex (unsigned CFIIndex)

static MachineOperand	CreateIntrinsicID (Intrinsic::ID ID)

static MachineOperand	CreatePredicate (unsigned Pred)

Friends
class	MachineInstr

class	MachineRegisterInfo

struct	DenseMapInfo< MachineOperand >

hash_code	hash_value (const MachineOperand &MO)
	MachineOperand hash_value overload. More...

Detailed Description

MachineOperand class - Representation of each machine instruction operand.

This class isn't a POD type because it has a private constructor, but its destructor must be trivial. Functions like MachineInstr::addOperand(), MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on not having to call the MachineOperand destructor.

Definition at line 49 of file MachineOperand.h.

Member Enumeration Documentation

◆ MachineOperandType

enum llvm::MachineOperand::MachineOperandType : unsigned char

Enumerator
MO_Register	Register operand.
MO_Immediate	Immediate operand.
MO_CImmediate	Immediate >64bit operand.
MO_FPImmediate	Floating-point immediate operand.
MO_MachineBasicBlock	MachineBasicBlock reference.
MO_FrameIndex	Abstract Stack Frame Index.
MO_ConstantPoolIndex	Address of indexed Constant in Constant Pool.
MO_TargetIndex	Target-dependent index+offset operand.
MO_JumpTableIndex	Address of indexed Jump Table for switch.
MO_ExternalSymbol	Name of external global symbol.
MO_GlobalAddress	Address of a global value.
MO_BlockAddress	Address of a basic block.
MO_RegisterMask	Mask of preserved registers.
MO_RegisterLiveOut	Mask of live-out registers.
MO_Metadata	Metadata reference (for debug info)
MO_MCSymbol	MCSymbol reference (for debug/eh info)
MO_CFIIndex	MCCFIInstruction index.
MO_IntrinsicID	Intrinsic ID for ISel.
MO_Predicate	Generic predicate for ISel.
MO_Last

Definition at line 51 of file MachineOperand.h.

Member Function Documentation

◆ addTargetFlag()

void llvm::MachineOperand::addTargetFlag ( unsigned F )

inline

Definition at line 223 of file MachineOperand.h.

References assert(), F(), and isReg().

Referenced by llvm::HexagonInstrInfo::immediateExtend(), and INITIALIZE_PASS().

◆ ChangeToES()

void MachineOperand::ChangeToES	(	const char *	SymName,
		unsigned char	TargetFlags = `0`
	)

ChangeToES - Replace this operand with a new external symbol operand.

Definition at line 171 of file MachineOperand.cpp.

References assert(), isReg(), isTied(), MO_ExternalSymbol, setOffset(), and setTargetFlags().

Referenced by getRetpolineSymbol(), and setRegMask().

◆ ChangeToFPImmediate()

void MachineOperand::ChangeToFPImmediate ( const ConstantFP * FPImm )

ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.

If an operand is known to be an FP immediate already, the setFPImm method should be used.

Definition at line 162 of file MachineOperand.cpp.

References assert(), isReg(), isTied(), and MO_FPImmediate.

Referenced by setRegMask().

◆ ChangeToFrameIndex()

void MachineOperand::ChangeToFrameIndex ( int Idx )

Replace this operand with a frame index.

Definition at line 194 of file MachineOperand.cpp.

References assert(), isReg(), isTied(), MO_FrameIndex, and setIndex().

Referenced by changeFCMPPredToAArch64CC(), setRegMask(), swapRegAndNonRegOperand(), llvm::updateDbgValueForSpill(), and updateOperand().

◆ ChangeToImmediate()

void MachineOperand::ChangeToImmediate ( int64_t ImmVal )

ChangeToImmediate - Replace this operand with a new immediate operand of the specified value.

If an operand is known to be an immediate already, the setImm method should be used.

Definition at line 153 of file MachineOperand.cpp.

References assert(), ImmVal, isReg(), isTied(), and MO_Immediate.

◆ ChangeToMCSymbol()

void MachineOperand::ChangeToMCSymbol ( MCSymbol * Sym )

ChangeToMCSymbol - Replace this operand with a new MC symbol operand.

Definition at line 184 of file MachineOperand.cpp.

References assert(), isReg(), isTied(), MO_MCSymbol, and Sym.

Referenced by setRegMask().

◆ ChangeToRegister()

void MachineOperand::ChangeToRegister	(	unsigned	Reg,
		bool	isDef,
		bool	isImp = `false`,
		bool	isKill = `false`,
		bool	isDead = `false`,
		bool	isUndef = `false`,
		bool	isDebug = `false`
	)

ChangeToRegister - Replace this operand with a new register operand of the specified value.

If an operand is known to be an register already, the setReg method should be used.

Definition at line 220 of file MachineOperand.cpp.

References llvm::MachineRegisterInfo::addRegOperandToUseList(), assert(), getMFIfAvailable(), isDead(), isDebug(), isDef(), isReg(), isUndef(), MO_Register, Reg, and llvm::MachineRegisterInfo::removeRegOperandFromUseList().

◆ ChangeToTargetIndex()

void MachineOperand::ChangeToTargetIndex	(	unsigned	Idx,
		int64_t	Offset,
		unsigned char	TargetFlags = `0`
	)

Replace this operand with a target index.

Definition at line 204 of file MachineOperand.cpp.

References assert(), isReg(), isTied(), MO_TargetIndex, setIndex(), setOffset(), and setTargetFlags().

Referenced by setRegMask().

◆ clearParent()

void llvm::MachineOperand::clearParent ( )

inline

clearParent - Reset the parent pointer.

The MachineOperand copy constructor also copies ParentMI, expecting the original to be deleted. If a MachineOperand is ever stored outside a MachineInstr, the parent pointer must be cleared.

Never call clearParent() on an operand in a MachineInstr.

Definition at line 243 of file MachineOperand.h.

References dump(), llvm::ISD::FrameIndex, Index, Name, print(), printIRSlotNumber(), printOperandOffset(), printStackObjectReference(), printSubRegIdx(), printSymbol(), printTargetFlags(), Sym, and TRI.

◆ clobbersPhysReg() [1/2]

static bool llvm::MachineOperand::clobbersPhysReg	(	const uint32_t *	RegMask,
		unsigned	PhysReg
	)

inlinestatic

clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.

It is sometimes necessary to detach the register mask pointer from its machine operand. This static method can be used for such detached bit mask pointers.

Definition at line 601 of file MachineOperand.h.

References assert().

Referenced by llvm::LiveRegUnits::addRegsInMask(), llvm::MachineOperandIteratorBase::analyzePhysReg(), canClobberPhysRegDefs(), canClobberReachingPhysRegUse(), CheckForLiveRegDefMasked(), clobbersAllYmmAndZmmRegs(), clobbersCTR(), clobbersPhysReg(), llvm::createRegUsageInfoCollector(), CriticalPathStep(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::X86RegisterInfo::getReservedRegs(), handleRegMaskClobber(), llvm::LiveVariables::HandleVirtRegDef(), isNopCopy(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), isVirtualRegisterOperand(), matchPair(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::TargetLowering::parametersInCSRMatch(), llvm::PhysicalRegisterUsageInfo::print(), llvm::LivePhysRegs::removeRegsInMask(), llvm::LiveRegUnits::removeRegsNotPreserved(), llvm::ThumbRegisterInfo::saveScavengerRegister(), llvm::LivePhysRegs::stepForward(), and false::Chain::str().

◆ clobbersPhysReg() [2/2]

bool llvm::MachineOperand::clobbersPhysReg ( unsigned PhysReg ) const

inline

clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.

Definition at line 608 of file MachineOperand.h.

References clobbersPhysReg(), and getRegMask().

◆ CreateBA()

static MachineOperand llvm::MachineOperand::CreateBA	(	const BlockAddress *	BA,
		int64_t	Offset,
		unsigned char	TargetFlags = `0`
	)

inlinestatic

Definition at line 831 of file MachineOperand.h.

References BA, MO_BlockAddress, OffsetedInfo, setOffset(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addBlockAddress().

◆ CreateCFIIndex()

static MachineOperand llvm::MachineOperand::CreateCFIIndex ( unsigned CFIIndex )

inlinestatic

Definition at line 878 of file MachineOperand.h.

References CFIIndex, and MO_CFIIndex.

Referenced by llvm::MachineInstrBuilder::addCFIIndex().

◆ CreateCImm()

static MachineOperand llvm::MachineOperand::CreateCImm ( const ConstantInt * CI )

inlinestatic

Definition at line 744 of file MachineOperand.h.

References CI, and MO_CImmediate.

Referenced by llvm::MachineInstrBuilder::addCImm(), and llvm::CSEMIRBuilder::buildConstant().

◆ CreateCPI()

static MachineOperand llvm::MachineOperand::CreateCPI	(	unsigned	Idx,
		int	Offset,
		unsigned char	TargetFlags = `0`
	)

inlinestatic

Definition at line 793 of file MachineOperand.h.

References MO_ConstantPoolIndex, setIndex(), setOffset(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addConstantPoolIndex(), llvm::X86InstrInfo::foldMemoryOperandImpl(), and getUnconditionalBrDisp().

◆ CreateES()

static MachineOperand llvm::MachineOperand::CreateES	(	const char *	SymName,
		unsigned char	TargetFlags = `0`
	)

inlinestatic

Definition at line 823 of file MachineOperand.h.

References MO_ExternalSymbol, OffsetedInfo, setOffset(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addExternalSymbol(), llvm::createLibcall(), and getOffsetFromIndices().

◆ CreateFI()

static MachineOperand llvm::MachineOperand::CreateFI ( int Idx )

inlinestatic

Definition at line 788 of file MachineOperand.h.

References MO_FrameIndex, and setIndex().

Referenced by llvm::MachineInstrBuilder::addFrameIndex(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::X86AddressMode::getFullAddress(), getUnderlyingArgReg(), llvm::FastISel::selectGetElementPtr(), and llvm::LiveDebugVariables::splitRegister().

◆ CreateFPImm()

static MachineOperand llvm::MachineOperand::CreateFPImm ( const ConstantFP * CFP )

inlinestatic

Definition at line 750 of file MachineOperand.h.

References CFP, and MO_FPImmediate.

Referenced by llvm::MachineInstrBuilder::addFPImm(), llvm::CSEMIRBuilder::buildFConstant(), and ConvertImplicitDefToConstZero().

◆ CreateGA()

static MachineOperand llvm::MachineOperand::CreateGA	(	const GlobalValue *	GV,
		int64_t	Offset,
		unsigned char	TargetFlags = `0`
	)

inlinestatic

Definition at line 815 of file MachineOperand.h.

References GV, MO_GlobalAddress, OffsetedInfo, setOffset(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addGlobalAddress(), llvm::X86AddressMode::getFullAddress(), llvm::CallLowering::lowerCall(), and llvm::FastISel::selectPatchpoint().

◆ CreateImm()

static MachineOperand llvm::MachineOperand::CreateImm ( int64_t Val )

inlinestatic

Definition at line 738 of file MachineOperand.h.

References MO_Immediate, and setImm().

◆ CreateIntrinsicID()

static MachineOperand llvm::MachineOperand::CreateIntrinsicID ( Intrinsic::ID ID )

inlinestatic

Definition at line 884 of file MachineOperand.h.

References IntrinsicID, and MO_IntrinsicID.

Referenced by llvm::MachineInstrBuilder::addIntrinsicID().

◆ CreateJTI()

static MachineOperand llvm::MachineOperand::CreateJTI	(	unsigned	Idx,
		unsigned char	TargetFlags = `0`
	)

inlinestatic

Definition at line 809 of file MachineOperand.h.

References MO_JumpTableIndex, setIndex(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addJumpTableIndex().

◆ CreateMBB()

static MachineOperand llvm::MachineOperand::CreateMBB	(	MachineBasicBlock *	MBB,
		unsigned char	TargetFlags = `0`
	)

inlinestatic

Definition at line 781 of file MachineOperand.h.

References MO_MachineBasicBlock, setMBB(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addMBB(), isImmValidForOpcode(), splitBlock(), and splitEdge().

◆ CreateMCSymbol()

static MachineOperand llvm::MachineOperand::CreateMCSymbol	(	MCSymbol *	Sym,
		unsigned char	TargetFlags = `0`
	)

inlinestatic

Definition at line 869 of file MachineOperand.h.

References MO_MCSymbol, setOffset(), setTargetFlags(), and Sym.

Referenced by llvm::MachineInstrBuilder::addSym(), and EmitNops().

◆ CreateMetadata()

static MachineOperand llvm::MachineOperand::CreateMetadata ( const MDNode * Meta )

inlinestatic

Definition at line 863 of file MachineOperand.h.

References MD, and MO_Metadata.

Referenced by llvm::MachineInstrBuilder::addMetadata().

◆ CreatePredicate()

static MachineOperand llvm::MachineOperand::CreatePredicate ( unsigned Pred )

inlinestatic

Definition at line 890 of file MachineOperand.h.

References MO_Predicate, and Pred.

Referenced by llvm::MachineInstrBuilder::addPredicate().

◆ CreateReg()

static MachineOperand llvm::MachineOperand::CreateReg	(	unsigned	Reg,
		bool	isDef,
		bool	isImp = `false`,
		bool	isKill = `false`,
		bool	isDead = `false`,
		bool	isUndef = `false`,
		bool	isEarlyClobber = `false`,
		unsigned	SubReg = `0`,
		bool	isDebug = `false`,
		bool	isInternalRead = `false`,
		bool	isRenamable = `false`
	)

inlinestatic

Definition at line 756 of file MachineOperand.h.

References assert(), isDead(), isDebug(), isDef(), isEarlyClobber(), isInternalRead(), isKill(), isRenamable(), isUndef(), MO_Register, Reg, RegNo, setSubReg(), and SubReg.

Referenced by llvm::MachineInstr::addImplicitDefUseOperands(), llvm::GISelInstProfileBuilder::addNodeIDRegType(), llvm::MachineInstrBuilder::addReg(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::R600InstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::SIInstrInfo::buildExtractSubRegOrImm(), canMoveInstsAcrossMemOp(), llvm::condCodeOp(), ConvertImplicitDefToConstZero(), llvm::X86InstrInfo::convertToThreeAddress(), createPHIsForSelects(), llvm::createSIFixWWMLivenessPass(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonFrameLowering::emitPrologue(), enableAllocFrameElim(), findNextInsertLocation(), fixupGlobalSaddr(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::HexagonFrameLowering::getAlignaInstr(), llvm::X86AddressMode::getFullAddress(), getUnderlyingArgReg(), llvm::LiveVariables::HandleVirtRegDef(), ImposeStackOrdering(), INITIALIZE_PASS(), isCopy(), isFunctionEntryBlock(), isImmValidForOpcode(), isImplicitOperandIn(), llvm::CallLowering::lowerCall(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::predOps(), printExtendedName(), removeExternalCFGEdges(), llvm::rewriteT2FrameIndex(), llvm::FastISel::selectGetElementPtr(), llvm::FastISel::selectIntrinsicCall(), llvm::FastISel::selectPatchpoint(), llvm::FastISel::selectStackmap(), llvm::FastISel::selectXRayCustomEvent(), llvm::FastISel::selectXRayTypedEvent(), llvm::t1CondCodeOp(), llvm::tryFoldSPUpdateIntoPushPop(), and llvm::LiveDebugVariables::~LiveDebugVariables().

◆ CreateRegLiveOut()

static MachineOperand llvm::MachineOperand::CreateRegLiveOut ( const uint32_t * Mask )

inlinestatic

Definition at line 857 of file MachineOperand.h.

References assert(), llvm::BitmaskEnumDetail::Mask(), MO_RegisterLiveOut, and RegMask.

Referenced by INITIALIZE_PASS().

◆ CreateRegMask()

static MachineOperand llvm::MachineOperand::CreateRegMask ( const uint32_t * Mask )

inlinestatic

CreateRegMask - Creates a register mask operand referencing Mask.

The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand.

A RegMask operand represents a set of non-clobbered physical registers on an instruction that clobbers many registers, typically a call. The bit mask has a bit set for each physreg that is preserved by this instruction, as described in the documentation for TargetRegisterInfo::getCallPreservedMask().

Any physreg with a 0 bit in the mask is clobbered by the instruction.

Definition at line 851 of file MachineOperand.h.

References assert(), llvm::BitmaskEnumDetail::Mask(), MO_RegisterMask, and RegMask.

Referenced by llvm::MachineInstrBuilder::addRegMask(), and llvm::FastISel::selectPatchpoint().

◆ CreateTargetIndex()

static MachineOperand llvm::MachineOperand::CreateTargetIndex	(	unsigned	Idx,
		int64_t	Offset,
		unsigned char	TargetFlags = `0`
	)

inlinestatic

Definition at line 801 of file MachineOperand.h.

References MO_TargetIndex, setIndex(), setOffset(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addTargetIndex().

◆ dump()

LLVM_DUMP_METHOD void MachineOperand::dump ( ) const

Definition at line 930 of file MachineOperand.cpp.

References llvm::dbgs().

Referenced by clearParent(), doCandidateWalk(), GetVRegRenameMap(), rescheduleCanonically(), and runOnBasicBlock().

◆ getBlockAddress()

const BlockAddress* llvm::MachineOperand::getBlockAddress ( ) const

inline

◆ getCFIIndex()

unsigned llvm::MachineOperand::getCFIIndex ( ) const

inline

Definition at line 567 of file MachineOperand.h.

References assert(), and isCFIIndex().

Referenced by llvm::AsmPrinter::emitCFIInstruction(), getRegsUsedByPHIs(), llvm::hash_value(), INITIALIZE_PASS(), isIdenticalTo(), and print().

◆ getCImm()

const ConstantInt* llvm::MachineOperand::getCImm ( ) const

inline

Definition at line 531 of file MachineOperand.h.

References assert(), and isCImm().

Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), buildEXP(), changeFCMPPredToAArch64CC(), emitDebugValueComment(), llvm::InstructionSelector::executeMatchTable(), getConstant(), llvm::getConstantVRegVal(), getDebugLocValue(), getLeaOP(), llvm::hash_value(), isConstant(), isIdenticalTo(), llvm::LegalizerHelper::narrowScalar(), print(), and llvm::LegalizerHelper::widenScalar().

◆ getFPImm()

const ConstantFP* llvm::MachineOperand::getFPImm ( ) const

inline

◆ getGlobal()

const GlobalValue* llvm::MachineOperand::getGlobal ( ) const

inline

Definition at line 552 of file MachineOperand.h.

References assert(), and isGlobal().

Referenced by llvm::MachineInstrBuilder::addDisp(), addExclusiveRegPair(), llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::ARCMCInstLower::ARCMCInstLower(), llvm::EHStreamer::callToNoUnwindFunction(), changeFCMPPredToAArch64CC(), ConvertDoubleToBytes(), createPHIsForCMOVsInSinkBB(), llvm::PPCFrameLowering::emitEpilogue(), EmitHiLo(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), eraseDeadBBsAndChildren(), llvm::getAddressFromInstr(), llvm::SystemZMCInstLower::getExpr(), llvm::MSP430MCInstLower::GetGlobalAddressSymbol(), llvm::BPFMCInstLower::GetGlobalAddressSymbol(), llvm::LanaiMCInstLower::GetGlobalAddressSymbol(), llvm::AArch64MCInstLower::GetGlobalAddressSymbol(), getLeaOP(), GetSymbolFromOperand(), getVariantKind(), hasAnyNonFlatUseOfReg(), llvm::hash_value(), llvm::HexagonLowerToMC(), llvm::XCoreMCInstLower::Initialize(), llvm::MipsMCInstLower::Initialize(), INITIALIZE_PASS(), llvm::WebAssembly::isCatchAllTerminatePad(), llvm::WebAssembly::isCatchTerminatePad(), isIdenticalTo(), llvm::PPCInstrInfo::isSignOrZeroExtended(), isSimilarDispOp(), llvm::WebAssemblyMCInstLower::Lower(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerRISCVMachineOperandToMCOperand(), LowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), makeImplicit(), llvm::WebAssembly::mayThrow(), llvm::rdf::operator<<(), print(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), QueryCallee(), llvm::DetectRoundChange::runOnMachineFunction(), llvm::DwarfDebug::shareAcrossDWOCUs(), swapMIOperands(), trySequenceOfOnes(), and VisitGlobalVariableForEmission().

◆ getImm()

int64_t llvm::MachineOperand::getImm ( ) const

inline

Definition at line 526 of file MachineOperand.h.

References assert(), and isImm().

◆ getIndex()

int llvm::MachineOperand::getIndex ( ) const

inline

Definition at line 546 of file MachineOperand.h.

References assert(), isCPI(), isFI(), isJTI(), and isTargetIndex().

◆ getIntrinsicID()

Intrinsic::ID llvm::MachineOperand::getIntrinsicID ( ) const

inline

Definition at line 572 of file MachineOperand.h.

References assert(), and isIntrinsicID().

Referenced by buildEXP(), canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), llvm::InstructionSelector::executeMatchTable(), getConstant(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::hash_value(), isIdenticalTo(), and print().

◆ getMBB()

MachineBasicBlock* llvm::MachineOperand::getMBB ( ) const

inline

Definition at line 541 of file MachineOperand.h.

References assert(), and isMBB().

Referenced by addIncomingValuesToPHIs(), allPhiOperandsUndefined(), llvm::XCoreInstrInfo::analyzeBranch(), llvm::NVPTXInstrInfo::analyzeBranch(), llvm::SparcInstrInfo::analyzeBranch(), llvm::MipsInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranch(), llvm::R600InstrInfo::analyzeBranch(), llvm::SystemZInstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), AppendEndToFunction(), llvm::ARCMCInstLower::ARCMCInstLower(), BBIsJumpedOver(), canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), ConvertDoubleToBytes(), llvm::LiveRangeCalc::createDeadDefs(), llvm::createHexagonHardwareLoops(), createPHIsForCMOVsInSinkBB(), EmitGCCInlineAsmStr(), EmitHiLo(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), EmitNops(), llvm::SystemZPostRASchedStrategy::enterMBB(), eraseDeadBBsAndChildren(), llvm::HexagonEvaluator::evaluate(), llvm::BitTracker::MachineEvaluator::evaluate(), llvm::AArch64InstrInfo::expandPostRAPseudo(), findCorrespondingPred(), fixPHIsInSucc(), llvm::RISCVInstrInfo::getBranchDestBlock(), llvm::AVRInstrInfo::getBranchDestBlock(), llvm::AArch64InstrInfo::getBranchDestBlock(), llvm::SIInstrInfo::getBranchDestBlock(), getCmpForPseudo(), llvm::HexagonInstrInfo::getDotNewPredJumpOp(), llvm::SystemZMCInstLower::getExpr(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::PHI_iterator::getIncomingBlock(), getInitPhiReg(), getLoopPhiReg(), llvm::MipsInstrInfo::GetMemOperand(), getNewValueJumpOpcode(), getPHIDeps(), getPHIPred(), getPhiRegs(), getPHISrcRegOpIdx(), getRegsUsedByPHIs(), getTargetMBB(), getUnconditionalBrDisp(), getVariantKind(), llvm::hash_value(), HashMachineInstr(), hasVulnerableLoad(), llvm::HexagonLowerToMC(), hoistAndMergeSGPRInits(), llvm::XCoreMCInstLower::Initialize(), llvm::MipsMCInstLower::Initialize(), INITIALIZE_PASS(), insertPHI(), isIdenticalTo(), isImmValidForOpcode(), isIntersect(), isSimilarDispOp(), IsUnconditionalJump(), llvm::SIInstrInfo::legalizeOperands(), llvm::MSP430MCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::AArch64MCInstLower::lowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::LowerRISCVMachineOperandToMCOperand(), LowerSymbolOperand(), matchPair(), llvm::rdf::operator<<(), llvm::AArch64InstrInfo::optimizeCondBranch(), parseCondBranch(), llvm::PPCInstrInfo::PredicateInstruction(), print(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), llvm::HexagonInstrInfo::reduceLoopCount(), removePhis(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), llvm::X86FrameLowering::spillCalleeSavedRegisters(), splitBlock(), splitEdge(), splitMBB(), llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs(), llvm::CombinerHelper::tryCombineCopy(), updatePHIs(), VisitGlobalVariableForEmission(), and llvm::LegalizerHelper::widenScalar().

◆ getMCSymbol()

MCSymbol* llvm::MachineOperand::getMCSymbol ( ) const

inline

Definition at line 562 of file MachineOperand.h.

References assert(), and isMCSymbol().

Referenced by emitDirectiveRelocJalr(), llvm::AsmPrinter::emitFrameAlloc(), llvm::MipsInstrInfo::genInstrWithNewOpc(), getRetOpcode(), getRetpolineSymbol(), llvm::hash_value(), llvm::MipsMCInstLower::Initialize(), isIdenticalTo(), isSimilarDispOp(), llvm::WebAssemblyMCInstLower::Lower(), llvm::AArch64MCInstLower::lowerOperand(), and print().

◆ getMetadata()

const MDNode* llvm::MachineOperand::getMetadata ( ) const

inline

Definition at line 630 of file MachineOperand.h.

References assert(), and isMetadata().

Referenced by EmitGCCInlineAsmStr(), EmitHiLo(), llvm::MachineInstr::getDebugExpression(), llvm::MachineInstr::getDebugLabel(), llvm::MachineInstr::getDebugVariable(), llvm::hash_value(), isIdenticalTo(), print(), and llvm::MachineInstr::print().

◆ getOffset()

int64_t llvm::MachineOperand::getOffset ( ) const

inline

Return the offset from the symbol in this operand.

This always returns 0 for ExternalSymbol operands.

Definition at line 584 of file MachineOperand.h.

References assert(), isBlockAddress(), isCPI(), isGlobal(), isMCSymbol(), isSymbol(), and isTargetIndex().

Referenced by llvm::MachineInstrBuilder::addDisp(), addExclusiveRegPair(), llvm::ARCMCInstLower::ARCMCInstLower(), changeFCMPPredToAArch64CC(), llvm::createX86OptimizeLEAs(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::PPCFrameLowering::emitEpilogue(), getConstantFromPool(), llvm::HexagonInstrInfo::getDuplexCandidateGroup(), llvm::SystemZMCInstLower::getExpr(), GetSymbolRef(), getVariantKind(), llvm::hash_value(), HashMachineInstr(), llvm::XCoreMCInstLower::Initialize(), llvm::MipsMCInstLower::Initialize(), isIdenticalTo(), llvm::WebAssemblyMCInstLower::Lower(), lowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::BPFMCInstLower::LowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandCOFF(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), makeImplicit(), print(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), and trySequenceOfOnes().

◆ getParent() [1/2]

MachineInstr* llvm::MachineOperand::getParent ( )

inline

getParent - Return the instruction that this operand belongs to.

Definition at line 232 of file MachineOperand.h.

Referenced by addSegmentsWithValNo(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), changeFCMPPredToAArch64CC(), createBBSelectReg(), createDeadDef(), llvm::createSIFixWWMLivenessPass(), llvm::createX86OptimizeLEAs(), CriticalPathStep(), llvm::LiveRangeEdit::eraseVirtReg(), llvm::SMSchedule::finalizeSchedule(), findSingleRegDef(), findSingleRegUse(), llvm::Localizer::getAnalysisUsage(), llvm::RegBankSelect::getAnalysisUsage(), getFoldableImm(), getLoadStoreOffsetSizeInBits(), getMFIfAvailable(), llvm::MachineRegisterInfo::defusechain_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr, ByBundle >::getOperandNo(), GetSymbolRef(), getUsedRegMask(), getVariantKind(), INITIALIZE_PASS(), isConstant(), isCrossCopy(), llvm::SIInstrInfo::isInlineConstant(), isKilled(), isKImmOperand(), isKUImmOperand(), isNoReturnDef(), isRenamable(), isUseSafeToFold(), isVirtualRegisterOperand(), matchPair(), MoveForSingleUse(), OneUseDominatesOtherUses(), llvm::MachineRegisterInfo::defusechain_instr_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr, ByBundle >::operator*(), llvm::MachineRegisterInfo::defusechain_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr, ByBundle >::operator++(), llvm::MachineRegisterInfo::defusechain_instr_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr, ByBundle >::operator++(), llvm::MIPrinter::print(), RematerializeCheapDef(), removeExternalCFGEdges(), removePhis(), ReplaceDominatedUses(), llvm::CombinerHelper::replaceRegOpWith(), replaceRegUsesAfterLoop(), llvm::MachineSSAUpdater::RewriteUse(), llvm::Localizer::runOnMachineFunction(), scavengeVReg(), llvm::ScheduleDAGMILive::scheduleMI(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::SIInstrInfo::shouldClusterMemOps(), false::Chain::str(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::CombinerHelper::tryCombineCopy(), llvm::CombinerHelper::tryCombineExtendingLoads(), tryFoldInst(), llvm::FastISel::tryToFoldLoad(), updateKillStatus(), UpdatePredRedefs(), llvm::MachineTraceMetrics::Ensemble::verify(), llvm::MachineFunction::verify(), and llvm::MachineRegisterInfo::verifyUseList().

◆ getParent() [2/2]

const MachineInstr* llvm::MachineOperand::getParent ( ) const

inline

Definition at line 233 of file MachineOperand.h.

◆ getPredicate()

unsigned llvm::MachineOperand::getPredicate ( ) const

inline

Definition at line 577 of file MachineOperand.h.

References assert(), and isPredicate().

Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), llvm::hash_value(), isIdenticalTo(), llvm::ARMLegalizerInfo::legalizeCustom(), print(), and llvm::LegalizerHelper::widenScalar().

◆ getReg()

unsigned llvm::MachineOperand::getReg ( ) const

inline

getReg - Returns the register number.

Definition at line 349 of file MachineOperand.h.

References assert(), and isReg().

◆ getRegLiveOut()

const uint32_t* llvm::MachineOperand::getRegLiveOut ( ) const

inline

getRegLiveOut - Returns a bit mask of live-out registers.

Definition at line 625 of file MachineOperand.h.

References assert(), and isRegLiveOut().

Referenced by getDwarfRegNum(), and print().

◆ getRegMask()

const uint32_t* llvm::MachineOperand::getRegMask ( ) const

inline

getRegMask - Returns a bit mask of registers preserved by this RegMask operand.

Definition at line 614 of file MachineOperand.h.

References assert(), and isRegMask().

Referenced by clobbersPhysReg(), llvm::rdf::DataFlowGraph::getNextShadow(), llvm::hash_value(), INITIALIZE_PASS(), isIdenticalTo(), llvm::rdf::DataFlowGraph::makeRegRef(), matchPair(), llvm::SystemZInstrInfo::PredicateInstruction(), llvm::MIPrinter::print(), and print().

◆ getRegMaskSize()

static unsigned llvm::MachineOperand::getRegMaskSize ( unsigned NumRegs )

inlinestatic

Returns number of elements needed for a regmask array.

Definition at line 620 of file MachineOperand.h.

Referenced by llvm::MachineFunction::allocateRegMask(), llvm::createRegUsageInfoCollector(), getMOVL(), and llvm::AArch64RegisterInfo::UpdateCustomCallPreservedMask().

◆ getSubReg()

unsigned llvm::MachineOperand::getSubReg ( ) const

inline

Definition at line 354 of file MachineOperand.h.

References assert(), and isReg().

Referenced by addSegmentsWithValNo(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), allPhiOperandsUndefined(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::SIInstrInfo::buildExtractSubReg(), canFoldCopy(), canMoveInstsAcrossMemOp(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::PPCInstrInfo::commuteInstructionImpl(), computeBranchTargetAndInversion(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), copyRegOperand(), definesFullReg(), llvm::HexagonFrameLowering::determineCalleeSaves(), dumpMachineInstrRangeWithSlotIndex(), emitLoadM0FromVGPRLoop(), llvm::LiveRangeEdit::eraseVirtReg(), llvm::HexagonInstrInfo::expandPostRAPseudo(), findSingleRegDef(), findSRegBaseAndIndex(), llvm::SIInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), llvm::HexagonInstrInfo::getBaseAndOffset(), getDefRegMask(), getDwarfRegNum(), llvm::X86InstrInfo::getExecutionDomainCustom(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), getImmOrMaterializedImm(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getLiveLanesAt(), getNewSource(), getOModValue(), llvm::SIInstrInfo::getOpSize(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), getRC32(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), llvm::getRegSubRegPair(), getRegsUsedByPHIs(), getSrcFromCopy(), getUsedRegMask(), llvm::hash_value(), INITIALIZE_PASS(), insertPHI(), insertUndefLaneMask(), llvm::rdf::CopyPropagation::interpretAsCopy(), llvm::X86InstrInfo::isCoalescableExtInstr(), isCopy(), isCrossCopy(), isDebug(), llvm::rdf::TargetOperandInfo::isFixedReg(), llvm::MachineInstr::isFullCopy(), isFullUndefDef(), isIdenticalTo(), llvm::MachineInstr::isIdentityCopy(), isImmValidForOpcode(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::X86InstrInfo::isLoadFromStackSlot(), llvm::SIInstrInfo::isOperandLegal(), isSafeToFoldImmIntoCopy(), isSameReg(), isSExtLoad(), isSimpleIf(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::X86InstrInfo::isStoreToStackSlot(), isSubRegOf(), isUseSafeToFold(), isVirtualRegisterOperand(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::rdf::DataFlowGraph::makeRegRef(), matchPair(), matchSwap(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), optimizeVcndVcmpPair(), print(), llvm::ARMAsmPrinter::printOperand(), profitImm(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::R600SchedStrategy::releaseBottomNode(), llvm::UnreachableBlockElimPass::run(), llvm::MachinePipeliner::runOnMachineFunction(), llvm::X86InstrInfo::setExecutionDomainCustom(), llvm::TailDuplicator::shouldTailDuplicate(), llvm::LiveDebugVariables::splitRegister(), substPhysReg(), substVirtReg(), swapRegAndNonRegOperand(), tryFoldInst(), and updateOperand().

◆ getSymbolName()

const char* llvm::MachineOperand::getSymbolName ( ) const

inline

Definition at line 592 of file MachineOperand.h.

References assert(), and isSymbol().

◆ getTargetFlags()

unsigned llvm::MachineOperand::getTargetFlags ( ) const

inline

Definition at line 215 of file MachineOperand.h.

References isReg().

Referenced by llvm::MachineInstrBuilder::addDisp(), addExclusiveRegPair(), canDefBePartOfLOH(), createPHIsForCMOVsInSinkBB(), emitDirectiveRelocJalr(), EmitHiLo(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::MipsInstrInfo::genInstrWithNewOpc(), llvm::MSP430MCInstLower::GetBlockAddressSymbol(), llvm::MSP430MCInstLower::GetConstantPoolIndexSymbol(), llvm::MSP430MCInstLower::GetExternalSymbolSymbol(), llvm::MSP430MCInstLower::GetGlobalAddressSymbol(), llvm::AArch64MCInstLower::GetGlobalAddressSymbol(), llvm::MSP430MCInstLower::GetJumpTableSymbol(), GetSymbolFromOperand(), GetSymbolRef(), getVariantKind(), handleMiddleInst(), handleUse(), llvm::hash_value(), llvm::HexagonLowerToMC(), llvm::MipsMCInstLower::Initialize(), INITIALIZE_PASS(), isCandidateLoad(), llvm::HexagonInstrInfo::isConstExtended(), isIdenticalTo(), llvm::WebAssemblyMCInstLower::Lower(), llvm::SystemZMCInstLower::lowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), lowerSymbolOperand(), LowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandCOFF(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), makeImplicit(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), printTargetFlags(), and trySequenceOfOnes().

◆ getType()

MachineOperandType llvm::MachineOperand::getType ( ) const

inline

getType - Returns the MachineOperandType for this operand.

Definition at line 213 of file MachineOperand.h.

Referenced by llvm::MachineInstrBuilder::addDisp(), llvm::MachineInstr::addOperand(), canDefBePartOfLOH(), compareMachineOp(), ConvertDoubleToBytes(), EmitHiLo(), EmitNops(), llvm::SystemZMCInstLower::getExpr(), getRetOpcode(), getVariantKind(), llvm::hash_value(), HashMachineInstr(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), IsAnAddressOperand(), llvm::DenseMapInfo< MachineOperand >::isEqual(), isIdenticalTo(), llvm::SIInstrInfo::isLiteralConstantLike(), llvm::MSP430MCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::WebAssemblyMCInstLower::Lower(), llvm::XCoreMCInstLower::LowerOperand(), llvm::ARCMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), llvm::MipsMCInstLower::LowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::LowerRISCVMachineOperandToMCOperand(), LowerSymbolOperand(), makeImplicit(), matchPair(), llvm::MIPrinter::print(), print(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AsmPrinter::PrintAsmOperand(), printLeaMemReference(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printOperand(), printPCRelImm(), printSymbolOperand(), llvm::ScheduleDAGMILive::scheduleMI(), llvm::AArch64InstrInfo::shouldClusterMemOps(), and VisitGlobalVariableForEmission().

◆ isBlockAddress()

bool llvm::MachineOperand::isBlockAddress ( ) const

inline

isBlockAddress - Tests if this is a MO_BlockAddress operand.

Definition at line 333 of file MachineOperand.h.

References MO_BlockAddress.

Referenced by getBlockAddress(), getOffset(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), and setOffset().

◆ isCFIIndex()

bool llvm::MachineOperand::isCFIIndex ( ) const

inline

Definition at line 341 of file MachineOperand.h.

References MO_CFIIndex.

Referenced by getCFIIndex().

◆ isCImm()

bool llvm::MachineOperand::isCImm ( ) const

inline

isCImm - Test if this is a MO_CImmediate operand.

Definition at line 315 of file MachineOperand.h.

References MO_CImmediate.

Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), buildEXP(), changeFCMPPredToAArch64CC(), emitDebugValueComment(), llvm::InstructionSelector::executeMatchTable(), getCImm(), llvm::getConstantVRegVal(), getDebugLocValue(), getLeaOP(), and setCImm().

◆ isCPI()

bool llvm::MachineOperand::isCPI ( ) const

inline

isCPI - Tests if this is a MO_ConstantPoolIndex operand.

Definition at line 323 of file MachineOperand.h.

References MO_ConstantPoolIndex.

Referenced by BBIsJumpedOver(), canFoldIntoMOVCC(), canFoldIntoSelect(), EmitHiLo(), getConstantFromPool(), getIndex(), getOffset(), getUnconditionalBrDisp(), isAnImmediateOperand(), llvm::HexagonInstrInfo::isConstExtended(), llvm::isLeaMem(), isSimilarDispOp(), isValidDispOp(), setIndex(), setOffset(), and trySequenceOfOnes().

◆ isDead()

bool llvm::MachineOperand::isDead ( ) const

inline

Definition at line 374 of file MachineOperand.h.

References assert(), and isReg().

Referenced by addExclusiveRegPair(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), allPhiOperandsUndefined(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::MachineOperandIteratorBase::analyzePhysReg(), canFoldIntoMOVCC(), canFoldIntoSelect(), ChangeToRegister(), llvm::X86InstrInfo::classifyLEAReg(), llvm::PPCInstrInfo::commuteInstructionImpl(), ContainsReg(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), copyRegOperand(), llvm::createCopyConstrainDAGMutation(), CreateReg(), definesFullReg(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::finalizeBundle(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::ARMBaseInstrInfo::FoldImmediate(), GetDSubRegs(), getFPReg(), getLiveLanesAt(), getMopState(), getNewSource(), llvm::rdf::DataFlowGraph::getNextShadow(), llvm::getRegState(), llvm::LiveVariables::HandleVirtRegDef(), llvm::X86InstrInfo::hasLiveCondCodeDef(), llvm::X86InstrInfo::hasReassociableOperands(), INITIALIZE_PASS(), InsertLDR_STR(), isCallerPreservedOrConstPhysReg(), llvm::rdf::TargetOperandInfo::isClobbering(), llvm::IsCPSRDead< MachineInstr >(), isCrossCopy(), isDataInvariant(), isDataInvariantLoad(), isFpMulInstruction(), isFullUndefDef(), llvm::MachineInstr::isIdenticalTo(), isLoadAndTestAsCmp(), isNopCopy(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), isSimpleIf(), isVirtualRegisterOperand(), makeImplicit(), matchPair(), MoveAndTeeForMultiUse(), print(), setRegMask(), llvm::X86InstrInfo::setSpecialOperandAttr(), swapRegAndNonRegOperand(), trySequenceOfOnes(), UpdateCPSRUse(), updatePhysDepsDownwards(), and VerifyLowRegs().

◆ isDebug()

bool llvm::MachineOperand::isDebug ( ) const

inline

Definition at line 435 of file MachineOperand.h.

References assert(), and isReg().

Referenced by llvm::MachineInstr::addRegisterKilled(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), ChangeToRegister(), CreateReg(), llvm::getRegState(), matchPair(), setIsDef(), setIsKill(), setRegMask(), and swapRegAndNonRegOperand().

◆ isDef()

bool llvm::MachineOperand::isDef ( ) const

inline

Definition at line 364 of file MachineOperand.h.

References assert(), and isReg().

Referenced by addLiveInRegs(), llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineRegisterInfo::addRegOperandToUseList(), addRegsToSet(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::HexagonSubtarget::CallMutation::apply(), llvm::BTFDebug::beginInstruction(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::HexagonInstrInfo::canExecuteInBundle(), canFoldIntoMOVCC(), canFoldIntoSelect(), ChangeToRegister(), clobbersCTR(), computeBytesPoppedByCalleeForSRet(), ContainsReg(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), createBBSelectReg(), llvm::createLanaiDelaySlotFillerPass(), CreateReg(), llvm::createSparcDelaySlotFillerPass(), llvm::createX86FixupLEAs(), CriticalPathStep(), definesFullReg(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), dumpMachineInstrRangeWithSlotIndex(), EmitGCCInlineAsmStr(), emitKill(), llvm::LiveRangeEdit::eraseVirtReg(), llvm::HexagonEvaluator::evaluate(), llvm::finalizeBundle(), llvm::SMSchedule::finalizeSchedule(), findDeadCallerSavedReg(), findDefIdx(), llvm::MachineInstr::findRegisterDefOperandIdx(), findSingleRegUse(), findUseIdx(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), llvm::RegBankSelect::getAnalysisUsage(), getDefRegMask(), llvm::PPCInstrInfo::getInstrLatency(), getInstrVecReg(), getLiveLanesAt(), getNewSource(), getNewValueJumpOpcode(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::rdf::DataFlowGraph::getNextShadow(), llvm::MachineInstr::getNumExplicitDefs(), llvm::getRegState(), getRegsUsedByPHIs(), llvm::HexagonInstrInfo::getSize(), handleNormalInst(), llvm::LiveVariables::HandleVirtRegDef(), llvm::hash_value(), llvm::X86InstrInfo::hasLiveCondCodeDef(), hasRegisterDependency(), hasUseAfterLoop(), INITIALIZE_PASS(), isCallerPreservedOrConstPhysReg(), llvm::WebAssembly::isChild(), llvm::rdf::TargetOperandInfo::isClobbering(), isCopyFeedingInvariantStore(), isCrossCopy(), isDebug(), llvm::rdf::TargetOperandInfo::isFixedReg(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::SMSchedule::isLoopCarriedDefOfUse(), isNopCopy(), isOperandKill(), llvm::MachineInstr::isRegTiedToUseOperand(), isRenamable(), IsSafeAndProfitableToMove(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), isSimpleIf(), isSimpleIndexCalc(), isVirtualRegisterOperand(), llvm::Mips16InstrInfo::loadImmediate(), matchPair(), MIIsInTerminatorSequence(), llvm::SIInstrInfo::moveToVALU(), llvm::AggressiveAntiDepBreaker::Observe(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::SMSchedule::orderDependence(), parseOperands(), llvm::PatchPointOpers::PatchPointOpers(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::MIPrinter::print(), print(), llvm::MachineInstr::print(), printImplicitRegisterFlag(), llvm::R600SchedStrategy::releaseBottomNode(), RemoveDeadAddBetweenLEAAndJT(), removePhis(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), rescheduleCanonically(), resultTests(), setRegMask(), substPhysReg(), llvm::MachineInstr::tieOperands(), tryAddToFoldList(), updateOperand(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), and llvm::HexagonSubtarget::usePredicatedCalls().

◆ isEarlyClobber()

bool llvm::MachineOperand::isEarlyClobber ( ) const

inline

Definition at line 425 of file MachineOperand.h.

References assert(), and isReg().

Referenced by llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), createDeadDef(), llvm::LiveRangeCalc::createDeadDefs(), CreateReg(), CriticalPathStep(), definesFullReg(), dumpMachineInstrRangeWithSlotIndex(), getMopState(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::LiveVariables::HandleVirtRegDef(), INITIALIZE_PASS(), matchPair(), and print().

◆ isFI()

bool llvm::MachineOperand::isFI ( ) const

inline

isFI - Tests if this is a MO_FrameIndex operand.

Definition at line 321 of file MachineOperand.h.

References MO_FrameIndex.

◆ isFPImm()

bool llvm::MachineOperand::isFPImm ( ) const

inline

isFPImm - Tests if this is a MO_FPImmediate operand.

Definition at line 317 of file MachineOperand.h.

References MO_FPImmediate.

Referenced by llvm::DwarfUnit::addConstantFPValue(), llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), buildEXP(), emitDebugValueComment(), llvm::SIInstrInfo::expandPostRAPseudo(), getDebugLocValue(), getFPImm(), llvm::HexagonInstrInfo::isConstExtended(), setFPImm(), and llvm::SIInstrInfo::verifyInstruction().

◆ isGlobal()

bool llvm::MachineOperand::isGlobal ( ) const

inline

isGlobal - Tests if this is a MO_GlobalAddress operand.

Definition at line 329 of file MachineOperand.h.

References MO_GlobalAddress.

Referenced by addExclusiveRegPair(), llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::EHStreamer::callToNoUnwindFunction(), createPHIsForCMOVsInSinkBB(), llvm::createSparcDelaySlotFillerPass(), EmitHiLo(), EmitNop(), eraseDeadBBsAndChildren(), llvm::getAddressFromInstr(), llvm::HexagonInstrInfo::getDuplexCandidateGroup(), getGlobal(), llvm::rdf::DataFlowGraph::getNextShadow(), getOffset(), llvm::R600InstrInfo::getSrcs(), GetSymbolFromOperand(), hasLEAOffset(), isAnImmediateOperand(), llvm::WebAssembly::isCatchAllTerminatePad(), llvm::WebAssembly::isCatchTerminatePad(), llvm::HexagonInstrInfo::isConstExtended(), llvm::isLeaMem(), llvm::X86InstrInfo::isReallyTriviallyReMaterializable(), llvm::PPCInstrInfo::isSignOrZeroExtended(), isSimilarDispOp(), isValidDispOp(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::WebAssembly::mayThrow(), llvm::rdf::operator<<(), QueryCallee(), llvm::DetectRoundChange::runOnMachineFunction(), setOffset(), llvm::DwarfDebug::shareAcrossDWOCUs(), swapMIOperands(), and trySequenceOfOnes().

◆ isIdenticalTo()

bool MachineOperand::isIdenticalTo ( const MachineOperand & Other ) const

Returns true if this operand is identical to the specified operand except for liveness related flags (isKill, isUndef and isDead).

isIdenticalTo - Return true if this operand is identical to the specified operand.

Note that this should stay in sync with the hash_value overload below.

Definition at line 261 of file MachineOperand.cpp.

References llvm::lltok::equal, getBlockAddress(), getCFIIndex(), getCImm(), getFPImm(), getGlobal(), getImm(), getIndex(), getIntrinsicID(), getMBB(), getMCSymbol(), getMetadata(), getMFIfAvailable(), llvm::MCRegisterInfo::getNumRegs(), getOffset(), getPredicate(), getReg(), getRegMask(), getSubReg(), getSymbolName(), getTargetFlags(), getType(), isDef(), llvm_unreachable, MO_BlockAddress, MO_CFIIndex, MO_CImmediate, MO_ConstantPoolIndex, MO_ExternalSymbol, MO_FPImmediate, MO_FrameIndex, MO_GlobalAddress, MO_Immediate, MO_IntrinsicID, MO_JumpTableIndex, MO_MachineBasicBlock, MO_MCSymbol, MO_Metadata, MO_Predicate, MO_Register, MO_RegisterLiveOut, MO_RegisterMask, MO_TargetIndex, RegMask, and TRI.

Referenced by llvm::X86InstrInfo::analyzeBranchPredicate(), llvm::LanaiInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::AArch64InstrInfo::areMemAccessesTriviallyDisjoint(), createPHIsForSelects(), getUnderlyingObjects(), llvm::DenseMapInfo< MachineOperand >::isEqual(), isIdenticalOp(), llvm::MachineInstr::isIdenticalTo(), isImplicitOperandIn(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), memOpsHaveSameBasePtr(), offsetsDoNotOverlap(), llvm::ARMBaseInstrInfo::produceSameValue(), setRegMask(), llvm::AArch64InstrInfo::shouldClusterMemOps(), and tryFoldInst().

◆ isImm()

bool llvm::MachineOperand::isImm ( ) const

inline

isImm - Tests if this is a MO_Immediate operand.

Definition at line 313 of file MachineOperand.h.

References MO_Immediate.

◆ isImplicit()

bool llvm::MachineOperand::isImplicit ( ) const

inline

Definition at line 369 of file MachineOperand.h.

References assert(), and isReg().

Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::MachineInstr::addOperand(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::TargetSchedModel::computeOperandLatency(), ContainsReg(), copyExtraImplicitOps(), llvm::MachineInstr::copyImplicitOps(), llvm::createSparcDelaySlotFillerPass(), definesFullReg(), dumpMachineInstrRangeWithSlotIndex(), llvm::ARMAsmPrinter::EmitJumpTableTBInst(), getDwarfRegNum(), llvm::PPCInstrInfo::getInstrLatency(), getMopState(), getNewSource(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::rdf::DataFlowGraph::getNextShadow(), llvm::MachineInstr::getNumExplicitDefs(), llvm::MachineInstr::getNumExplicitOperands(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::getRegState(), getRetOpcode(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), hasVulnerableLoad(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), isCallerPreservedOrConstPhysReg(), llvm::WebAssembly::isChild(), isCopyFeedingInvariantStore(), isImmValidForOpcode(), isNopCopy(), isOperandKill(), isUseSafeToFold(), isVirtualRegisterOperand(), llvm::SystemZMCInstLower::lower(), llvm::MSP430MCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::WebAssemblyMCInstLower::Lower(), llvm::XCoreMCInstLower::LowerOperand(), llvm::ARCMCInstLower::LowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), llvm::MipsMCInstLower::LowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerRISCVMachineOperandToMCOperand(), matchPair(), MoveAndTeeForMultiUse(), llvm::AggressiveAntiDepBreaker::Observe(), llvm::PatchPointOpers::PatchPointOpers(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::MIPrinter::print(), print(), llvm::MachineInstr::print(), printImplicitRegisterFlag(), llvm::PPCInstrInfo::replaceInstrOperandWithImm(), llvm::PPCInstrInfo::replaceInstrWithLI(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::SIInstrInfo::usesConstantBus(), llvm::SIInstrInfo::verifyInstruction(), and VerifyLowRegs().

◆ isInternalRead()

bool llvm::MachineOperand::isInternalRead ( ) const

inline

Definition at line 420 of file MachineOperand.h.

References assert(), and isReg().

Referenced by llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::TargetInstrInfo::commuteInstructionImpl(), CreateReg(), getLiveLanesAt(), llvm::getRegState(), INITIALIZE_PASS(), matchPair(), print(), readsReg(), and VerifyLowRegs().

◆ isIntrinsicID()

bool llvm::MachineOperand::isIntrinsicID ( ) const

inline

Definition at line 342 of file MachineOperand.h.

References MO_IntrinsicID.

Referenced by changeFCMPPredToAArch64CC(), llvm::InstructionSelector::executeMatchTable(), getIntrinsicID(), and isInstrUniform().

◆ isJTI()

bool llvm::MachineOperand::isJTI ( ) const

inline

isJTI - Tests if this is a MO_JumpTableIndex operand.

Definition at line 327 of file MachineOperand.h.

References MO_JumpTableIndex.

Referenced by canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::createX86OptimizeLEAs(), getIndex(), GetSymbolRef(), llvm::HexagonInstrInfo::isConstExtended(), llvm::isLeaMem(), isSimilarDispOp(), isValidDispOp(), lowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::BPFMCInstLower::LowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandCOFF(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), and setIndex().

◆ isKill()

bool llvm::MachineOperand::isKill ( ) const

inline

Definition at line 379 of file MachineOperand.h.

References assert(), and isReg().

Referenced by addExclusiveRegPair(), llvm::MachineInstr::addRegisterKilled(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::HexagonFrameLowering::assignCalleeSavedSpillSlots(), llvm::X86InstrInfo::classifyLEAReg(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::PPCInstrInfo::commuteInstructionImpl(), ContainsReg(), llvm::PPCInstrInfo::convertToImmediateForm(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), copyFlagsToImplicitVCC(), copyRegOperand(), createBBSelectReg(), CreateReg(), llvm::SIRegisterInfo::eliminateFrameIndex(), emitBuildPairF64Pseudo(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), emitSplitF64Pseudo(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::finalizeBundle(), findIncDecAfter(), findPotentialBlockers(), llvm::MachineInstr::findRegisterUseOperandIdx(), findSingleRegDef(), finishConvertToThreeAddress(), llvm::fixStackStores(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), genFusedMultiply(), genMaddR(), GetDSubRegs(), getMopState(), getNewValueJumpOpcode(), getPostIndexedLoadStoreOpcode(), llvm::getRegState(), INITIALIZE_PASS(), insertDivByZeroTrap(), InsertFPConstInst(), InsertFPImmInst(), InsertLDR_STR(), InsertSPConstInst(), InsertSPImmInst(), isFpMulInstruction(), llvm::MachineInstr::isIdenticalTo(), isLEASimpleIncOrDec(), isOperandKill(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), isSimpleIndexCalc(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::MipsSEInstrInfo::loadImmediate(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), matchPair(), preserveCondRegFlags(), print(), llvm::TargetInstrInfo::reassociateOps(), registerDefinedBetween(), removeKillInfo(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), ReplaceFrameIndex(), setRegMask(), false::Chain::str(), swapMIOperands(), swapRegAndNonRegOperand(), llvm::SystemZInstrInfo::SystemZInstrInfo(), tryOptimizeLEAtoMOV(), UpdateCPSRUse(), updateKillStatus(), updatePhysDepsDownwards(), and VerifyLowRegs().

◆ isMBB()

bool llvm::MachineOperand::isMBB ( ) const

inline

isMBB - Tests if this is a MO_MachineBasicBlock operand.

Definition at line 319 of file MachineOperand.h.

References MO_MachineBasicBlock.

Referenced by llvm::HexagonInstrInfo::analyzeBranch(), llvm::SystemZInstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::getDotNewPredJumpOp(), getMBB(), getNewValueJumpOpcode(), getTargetMBB(), llvm::HexagonInstrInfo::immediateExtend(), INITIALIZE_PASS(), llvm::HexagonInstrInfo::invertAndChangeJumpTarget(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), lowerSymbolOperand(), matchPair(), llvm::rdf::operator<<(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::SystemZInstrInfo::removeBranch(), setMBB(), splitBlock(), and splitEdge().

◆ isMCSymbol()

bool llvm::MachineOperand::isMCSymbol ( ) const

inline

Definition at line 340 of file MachineOperand.h.

References MO_MCSymbol.

Referenced by emitDirectiveRelocJalr(), llvm::MipsInstrInfo::genInstrWithNewOpc(), getMCSymbol(), getOffset(), isSimilarDispOp(), isValidDispOp(), and setOffset().

◆ isMetadata()

bool llvm::MachineOperand::isMetadata ( ) const

inline

isMetadata - Tests if this is a MO_Metadata operand.

Definition at line 339 of file MachineOperand.h.

References MO_Metadata.

Referenced by EmitGCCInlineAsmStr(), EmitMSInlineAsmStr(), getMetadata(), matchPair(), llvm::MachineInstr::print(), printExtendedName(), and setMetadata().

◆ isPredicate()

bool llvm::MachineOperand::isPredicate ( ) const

inline

Definition at line 343 of file MachineOperand.h.

References MO_Predicate.

Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), and getPredicate().

◆ isReg()

bool llvm::MachineOperand::isReg ( ) const

inline

isReg - Tests if this is a MO_Register operand.

Definition at line 311 of file MachineOperand.h.

References MO_Register.

◆ isRegLiveOut()

bool llvm::MachineOperand::isRegLiveOut ( ) const

inline

isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.

Definition at line 337 of file MachineOperand.h.

References MO_RegisterLiveOut.

Referenced by getDwarfRegNum(), and getRegLiveOut().

◆ isRegMask()

bool llvm::MachineOperand::isRegMask ( ) const

inline

isRegMask - Tests if this is a MO_RegisterMask operand.

Definition at line 335 of file MachineOperand.h.

References MO_RegisterMask.

Referenced by llvm::MachineInstr::addOperand(), llvm::MachineOperandIteratorBase::analyzePhysReg(), clobbersCTR(), copyExtraImplicitOps(), llvm::MachineInstr::copyImplicitOps(), CriticalPathStep(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::rdf::DataFlowGraph::getNextShadow(), getRegMask(), llvm::LiveVariables::HandleVirtRegDef(), INITIALIZE_PASS(), llvm::rdf::TargetOperandInfo::isClobbering(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::rdf::DataFlowGraph::makeRegRef(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::ThumbRegisterInfo::saveScavengerRegister(), setRegMask(), false::Chain::str(), and UpdatePredRedefs().

◆ isRenamable()

bool MachineOperand::isRenamable ( ) const

isRenamable - Returns true if this register may be renamed, i.e.

it does not generate a value that is somehow read in a way that is not represented by the Machine IR (e.g. to meet an ABI or ISA requirement). This is only valid on physical register operands. Virtual registers are assumed to always be renamable regardless of the value of this field.

Operands that are renamable can freely be changed to any other register that is a member of the register class returned by MI->getRegClassConstraint().

isRenamable can return false for several different reasons:

ABI constraints (since liveness is not always precisely modeled). We conservatively handle these cases by setting all physical register operands that didn’t start out as virtual regs to not be renamable. Also any physical register operands created after register allocation or whose register is changed after register allocation will not be renamable. This state is tracked in the MachineOperand::IsRenamable bit.
Opcode/target constraints: for opcodes that have complex register class requirements (e.g. that depend on other operands/instructions), we set hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq in the machine opcode description. Operands belonging to instructions with opcodes that are marked hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq return false from isRenamable(). Additionally, the AllowRegisterRenaming target property prevents any operands from being marked renamable for targets that don't have detailed opcode hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq values.

Definition at line 115 of file MachineOperand.cpp.

References assert(), getParent(), getReg(), llvm::MachineInstr::hasExtraDefRegAllocReq(), llvm::MachineInstr::hasExtraSrcRegAllocReq(), llvm::MachineInstr::IgnoreBundle, isDef(), llvm::TargetRegisterInfo::isPhysicalRegister(), isReg(), isUse(), and MI.

Referenced by llvm::TargetInstrInfo::commuteInstructionImpl(), CreateReg(), getMopState(), llvm::getRegState(), hasRegisterDependency(), isNopCopy(), isUndef(), matchPair(), and print().

◆ isSymbol()

bool llvm::MachineOperand::isSymbol ( ) const

inline

isSymbol - Tests if this is a MO_ExternalSymbol operand.

Definition at line 331 of file MachineOperand.h.

References MO_ExternalSymbol.

Referenced by addExclusiveRegPair(), EmitGCCInlineAsmStr(), EmitHiLo(), llvm::rdf::DataFlowGraph::getNextShadow(), getOffset(), llvm::HexagonInstrInfo::getSize(), GetSymbolFromOperand(), getSymbolName(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), llvm::MipsCallLowering::lowerCall(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), matchPair(), llvm::rdf::operator<<(), optimizeCall(), setOffset(), and trySequenceOfOnes().

◆ isTargetIndex()

bool llvm::MachineOperand::isTargetIndex ( ) const

inline

isTargetIndex - Tests if this is a MO_TargetIndex operand.

Definition at line 325 of file MachineOperand.h.

References MO_TargetIndex.

Referenced by getIndex(), getOffset(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::SIInstrInfo::isOperandLegal(), setIndex(), and setOffset().

◆ isTied()

bool llvm::MachineOperand::isTied ( ) const

inline

◆ isUndef()

bool llvm::MachineOperand::isUndef ( ) const

inline

Definition at line 384 of file MachineOperand.h.

References assert(), isReg(), and isRenamable().

Referenced by addExclusiveRegPair(), llvm::MachineInstr::addRegisterKilled(), addSegmentsWithValNo(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), allPhiOperandsUndefined(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), ChangeToRegister(), llvm::X86InstrInfo::classifyLEAReg(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::X86InstrInfo::convertToThreeAddress(), copyFlagsToImplicitVCC(), copyRegOperand(), llvm::createBreakFalseDeps(), CreateReg(), llvm::createSIWholeQuadModePass(), definesFullReg(), llvm::ARMAsmPrinter::EmitJumpTableTBInst(), emitLoadM0FromVGPRLoop(), emitLoadSRsrcFromVGPRLoop(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::finalizeBundle(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), GetDSubRegs(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), getLiveLanesAt(), getMopState(), llvm::rdf::DataFlowGraph::getNextShadow(), getRegOrUndef(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), llvm::getRegState(), llvm::X86InstrInfo::getUndefRegClearance(), INITIALIZE_PASS(), llvm::HexagonInstrInfo::insertBranch(), InsertLDR_STR(), llvm::IsCPSRDead< MachineInstr >(), isLocalCopy(), isMemoryOp(), isNopCopy(), isUseSafeToFold(), isVirtualRegisterOperand(), makeImplicit(), matchPair(), mayCombineMisaligned(), mergeOperations(), preserveCondRegFlags(), print(), readsReg(), readsVCCZ(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::R600SchedStrategy::releaseBottomNode(), ReplaceDominatedUses(), llvm::UnreachableBlockElimPass::run(), llvm::ThumbRegisterInfo::saveScavengerRegister(), setRegMask(), shouldPreventUndefRegUpdateMemFold(), llvm::MachineBasicBlock::SplitCriticalEdge(), swapRegAndNonRegOperand(), llvm::SystemZInstrInfo::SystemZInstrInfo(), trySequenceOfOnes(), and updateOperand().

◆ isUse()

bool llvm::MachineOperand::isUse ( ) const

inline

Definition at line 359 of file MachineOperand.h.

References assert(), and isReg().

Referenced by llvm::MachineInstr::addOperand(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterKilled(), llvm::HexagonSubtarget::adjustSchedDependency(), llvm::HexagonSubtarget::CallMutation::apply(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::HexagonInstrInfo::canExecuteInBundle(), llvm::constrainOperandRegClass(), llvm::constrainSelectedInstRegOperands(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), copyRegOperand(), llvm::createBreakFalseDeps(), llvm::createLanaiDelaySlotFillerPass(), llvm::createSparcDelaySlotFillerPass(), CriticalPathStep(), llvm::BitTracker::MachineEvaluator::evaluate(), llvm::MachineInstr::findRegisterUseOperandIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), llvm::TargetInstrInfo::foldMemoryOperand(), for(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), getCallTargetRegOpnd(), getLiveLanesAt(), llvm::rdf::DataFlowGraph::getNextShadow(), getUsedRegMask(), handleNormalInst(), llvm::LiveVariables::HandleVirtRegDef(), hasRegisterDependency(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), INITIALIZE_PASS(), isCopyFeedingInvariantStore(), llvm::IsCPSRDead< MachineInstr >(), isCrossCopy(), isDebug(), isFullCopyOf(), isFullUndefDef(), isImmValidForOpcode(), isMergeableLdStUpdate(), llvm::MachineInstr::isRegTiedToDefOperand(), isRenamable(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), isSimpleIndexCalc(), isTwoAddrUse(), matchPair(), MoveAndTeeForMultiUse(), llvm::SMSchedule::orderDependence(), parseOperands(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), RemoveDeadAddBetweenLEAAndJT(), removePhis(), llvm::PPCInstrInfo::replaceInstrWithLI(), resultTests(), llvm::SystemZInstrInfo::SystemZInstrInfo(), llvm::MachineInstr::tieOperands(), TrackDefUses(), llvm::HexagonSubtarget::usePredicatedCalls(), llvm::SIInstrInfo::usesConstantBus(), and llvm::SIInstrInfo::verifyInstruction().

◆ print() [1/3]

void MachineOperand::print	(	raw_ostream &	os,
		const TargetRegisterInfo *	TRI = `nullptr`,
		const TargetIntrinsicInfo *	IntrinsicInfo = `nullptr`
	)		const

Print the MachineOperand to os.

Providing a valid TRI and IntrinsicInfo results in a more target-specific printing. If TRI and IntrinsicInfo are null, the function will try to pick it up from the parent.

Definition at line 712 of file MachineOperand.cpp.

References TRI.

Referenced by clearParent(), llvm::operator<<(), llvm::MIPrinter::print(), print(), llvm::MachineInstr::print(), and llvm::MachineFunction::verify().

◆ print() [2/3]

void MachineOperand::print	(	raw_ostream &	os,
		ModuleSlotTracker &	MST,
		LLT	TypeToPrint,
		bool	PrintDef,
		bool	IsStandalone,
		bool	ShouldPrintRegisterTies,
		unsigned	TiedOperandIdx,
		const TargetRegisterInfo *	TRI,
		const TargetIntrinsicInfo *	IntrinsicInfo
	)		const

More complex way of printing a MachineOperand.

Parameters

TypeToPrint	specifies the generic type to be printed on uses and defs. It can be determined using MachineInstr::getTypeToPrint.
PrintDef	- whether we want to print `def` on an operand which isDef. Sometimes, if the operand is printed before '=', we don't print `def`.
IsStandalone	- whether we want a verbose output of the MO. This prints extra information that can be easily inferred when printing the whole function, but not when printing only a fragment of it.
ShouldPrintRegisterTies	- whether we want to print register ties. Sometimes they are easily determined by the instruction's descriptor (MachineInstr::hasComplexRegiterTies can determine if it's needed).
TiedOperandIdx	- if we need to print register ties this needs to provide the index of the tied register. If not, it will be ignored.
TRI	- provide more target-specific information to the printer. Unlike the previous function, this one will not try and get the information from it's parent.
IntrinsicInfo	- same as `TRI`.

Definition at line 727 of file MachineOperand.cpp.

References llvm::MachineRegisterInfo::def_empty(), E, llvm::StringRef::empty(), llvm::ISD::FrameIndex, getBlockAddress(), getCFIIndex(), getCImm(), getFPImm(), llvm::BlockAddress::getFunction(), getGlobal(), getImm(), getIndex(), getIntrinsicID(), getMBB(), getMCSymbol(), getMetadata(), getMFIfAvailable(), llvm::TargetIntrinsicInfo::getName(), llvm::Intrinsic::getName(), llvm::MCRegisterInfo::getNumRegs(), getOffset(), getPredicate(), llvm::CmpInst::getPredicateName(), getReg(), getRegLiveOut(), getRegMask(), getSubReg(), llvm::TargetRegisterInfo::getSubRegIndexName(), getSymbolName(), getTargetIndexName(), getType(), isDead(), isDef(), isEarlyClobber(), isImplicit(), isInternalRead(), llvm::CmpInst::isIntPredicate(), isKill(), llvm::TargetRegisterInfo::isPhysicalRegister(), isRenamable(), isTied(), isUndef(), llvm::LLT::isValid(), llvm::TargetRegisterInfo::isVirtualRegister(), MO_BlockAddress, MO_CFIIndex, MO_CImmediate, MO_ConstantPoolIndex, MO_ExternalSymbol, MO_FPImmediate, MO_FrameIndex, MO_GlobalAddress, MO_Immediate, MO_IntrinsicID, MO_JumpTableIndex, MO_MachineBasicBlock, MO_MCSymbol, MO_Metadata, MO_Predicate, MO_Register, MO_RegisterLiveOut, MO_RegisterMask, MO_TargetIndex, MRI, Name, llvm::None, llvm::Intrinsic::num_intrinsics, Pred, llvm::Metadata::printAsOperand(), llvm::Value::printAsOperand(), printCFI(), printFrameIndex(), printIRBlockReference(), llvm::printJumpTableEntryReference(), llvm::printLLVMNameWithoutPrefix(), llvm::printMBBReference(), printOperandOffset(), llvm::printReg(), llvm::printRegClassOrBank(), PrintRegMaskNumRegs, printSymbol(), printTargetFlags(), Reg, RegMask, SubReg, and TRI.

◆ print() [3/3]

void MachineOperand::print	(	raw_ostream &	os,
		LLT	TypeToPrint,
		const TargetRegisterInfo *	TRI = `nullptr`,
		const TargetIntrinsicInfo *	IntrinsicInfo = `nullptr`
	)		const

Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level type to be printed the same way the full version of print(...) does it.

Definition at line 717 of file MachineOperand.cpp.

References print(), and tryToGetTargetInfo().

◆ printIRSlotNumber()

void MachineOperand::printIRSlotNumber	(	raw_ostream &	OS,
		int	Slot
	)

static

Print an IRSlotNumber.

Definition at line 598 of file MachineOperand.cpp.

Referenced by clearParent(), printIRBlockReference(), and printIRValueReference().

◆ printOperandOffset()

void MachineOperand::printOperandOffset	(	raw_ostream &	OS,
		int64_t	Offset
	)

static

Print the offset with explicit +/- signs.

Definition at line 588 of file MachineOperand.cpp.

Referenced by clearParent(), print(), and llvm::MachineMemOperand::print().

◆ printStackObjectReference()

void MachineOperand::printStackObjectReference	(	raw_ostream &	OS,
		unsigned	FrameIndex,
		bool	IsFixed,
		StringRef	Name
	)

static

Print a stack object reference.

Definition at line 575 of file MachineOperand.cpp.

References llvm::StringRef::empty(), and llvm::ISD::FrameIndex.

Referenced by clearParent(), printFrameIndex(), and llvm::MIPrinter::printStackObjectReference().

◆ printSubRegIdx()

void MachineOperand::printSubRegIdx	(	raw_ostream &	OS,
		uint64_t	Index,
		const TargetRegisterInfo *	TRI
	)

static

Print a subreg index operand.

MO_Immediate operands can also be subreg idices. If it's the case, the subreg index name will be printed. MachineInstr::isOperandSubregIdx can be called to check this.

Definition at line 510 of file MachineOperand.cpp.

References llvm::TargetRegisterInfo::getSubRegIndexName(), and Index.

Referenced by clearParent(), llvm::MIPrinter::print(), and llvm::MachineInstr::print().

◆ printSymbol()

void MachineOperand::printSymbol	(	raw_ostream &	OS,
		MCSymbol &	Sym
	)

static

Print a MCSymbol as an operand.

Definition at line 571 of file MachineOperand.cpp.

Referenced by clearParent(), llvm::MIPrinter::print(), print(), llvm::MachineInstr::print(), and printCFI().

◆ printTargetFlags()

void MachineOperand::printTargetFlags	(	raw_ostream &	OS,
		const MachineOperand &	Op
	)

static

Print operand target flags.

Definition at line 519 of file MachineOperand.cpp.

References assert(), llvm::HexagonInstrInfo::decomposeMachineOperandsTargetFlags(), llvm::TargetSubtargetInfo::getInstrInfo(), getMFIfAvailable(), llvm::HexagonInstrInfo::getSerializableBitmaskMachineOperandTargetFlags(), llvm::MachineFunction::getSubtarget(), getTargetFlagName(), getTargetFlags(), llvm::BitmaskEnumDetail::Mask(), Name, and TII.

Referenced by clearParent(), llvm::MIPrinter::print(), and print().

◆ readsReg()

bool llvm::MachineOperand::readsReg ( ) const

inline

readsReg - Returns true if this operand reads the previous value of its register.

A use operand with the <undef> flag set doesn't read its register. A sub-register def implicitly reads the other parts of the register being redefined unless the <undef> flag is set.

This refers to reading the register value from before the current instruction or bundle. Internal bundle reads are not included.

Definition at line 447 of file MachineOperand.h.

References assert(), getSubReg(), isInternalRead(), isReg(), isUndef(), isUse(), Reg, and setReg().

Referenced by llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::LiveRangeEdit::anyRematerializable(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::createCopyConstrainDAGMutation(), llvm::ConnectedVNInfoEqClasses::Distribute(), findUseIdx(), getDataDeps(), getLiveLanesAt(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::X86InstrInfo::getPartialRegUpdateClearance(), getTag(), llvm::LiveVariables::HandleVirtRegDef(), isCrossCopy(), matchPair(), updatePhysDepsDownwards(), and updatePhysDepsUpwards().

◆ setCImm()

void llvm::MachineOperand::setCImm ( const ConstantInt * CI )

inline

Definition at line 644 of file MachineOperand.h.

References assert(), CI, and isCImm().

Referenced by llvm::LegalizerHelper::widenScalar().

◆ setFPImm()

void llvm::MachineOperand::setFPImm ( const ConstantFP * CFP )

inline

Definition at line 649 of file MachineOperand.h.

References assert(), CFP, and isFPImm().

Referenced by llvm::LegalizerHelper::widenScalar().

◆ setImm()

void llvm::MachineOperand::setImm ( int64_t immVal )

inline

Definition at line 639 of file MachineOperand.h.

References assert(), and isImm().

Referenced by llvm::R600InstrInfo::addFlag(), llvm::SwingSchedulerDAG::applyInstrChange(), AssignProtectedObjSet(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), llvm::R600InstrInfo::clearFlag(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::PPCInstrInfo::convertToImmediateForm(), CreateImm(), createPHIsForSelects(), llvm::createSIWholeQuadModePass(), llvm::createX86OptimizeLEAs(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::LanaiRegisterInfo::eliminateFrameIndex(), llvm::SystemZInstrInfo::expandPostRAPseudo(), findSingleRegDef(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), fixupSEHOpcode(), getLSMultipleTransferSize(), getOModValue(), llvm::AArch64InstrInfo::getOutliningType(), getReassignedChan(), getUnconditionalBrDisp(), hasOneNonDBGUseInst(), INITIALIZE_PASS(), llvm::R600InstrInfo::insertBranch(), matchSwap(), llvm::PPCInstrInfo::optimizeCompareInstr(), performCustomAdjustments(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::R600InstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), readsVCCZ(), llvm::HexagonInstrInfo::reduceLoopCount(), removePhis(), llvm::R600InstrInfo::reverseBranchCondition(), RewriteP2Align(), llvm::HexagonInstrInfo::setBundleNoShuf(), llvm::setDirectAddressInInstr(), llvm::X86InstrInfo::setExecutionDomainCustom(), llvm::X86InstrInfo::setFrameAdjustment(), llvm::R600InstrInfo::setImmOperand(), shrinkScalarLogicOp(), llvm::SIInstrInfo::swapSourceModifiers(), llvm::SystemZInstrInfo::SystemZInstrInfo(), tieOpsIfNeeded(), llvm::HexagonPacketizerList::undoChangedOffset(), updateOperand(), llvm::HexagonPacketizerList::useCalleesSP(), and llvm::HexagonPacketizerList::useCallersSP().

◆ setImplicit()

void llvm::MachineOperand::setImplicit ( bool Val = true )

inline

Definition at line 484 of file MachineOperand.h.

References assert(), isReg(), and Val.

Referenced by llvm::X86InstrInfo::classifyLEAReg(), GetDSubRegs(), llvm::SIInstrInfo::insertVectorSelect(), isMergeableLdStUpdate(), makeImplicit(), llvm::LanaiInstrInfo::optimizeSelect(), and llvm::ARMBaseInstrInfo::optimizeSelect().

◆ setIndex()

void llvm::MachineOperand::setIndex ( int Idx )

inline

Definition at line 662 of file MachineOperand.h.

References assert(), isCPI(), isFI(), isJTI(), and isTargetIndex().

Referenced by BBIsJumpedOver(), ChangeToFrameIndex(), ChangeToTargetIndex(), CreateCPI(), CreateFI(), CreateJTI(), CreateTargetIndex(), getUnconditionalBrDisp(), and false::IntervalSorter::operator()().

◆ setIsDead()

void llvm::MachineOperand::setIsDead ( bool Val = true )

inline

Definition at line 495 of file MachineOperand.h.

References assert(), isReg(), and Val.

Referenced by llvm::MachineInstr::addRegisterDead(), AnyAliasLiveIn(), calculateSetFPREG(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), copyRegOperand(), llvm::MSP430FrameLowering::eliminateCallFramePseudoInstr(), llvm::AVRFrameLowering::eliminateCallFramePseudoInstr(), llvm::AVRRegisterInfo::eliminateFrameIndex(), llvm::AVRFrameLowering::emitEpilogue(), llvm::MSP430FrameLowering::emitEpilogue(), emitIncrement(), llvm::AVRFrameLowering::emitPrologue(), llvm::MSP430FrameLowering::emitPrologue(), llvm::X86FrameLowering::emitSPUpdate(), llvm::LiveRangeEdit::eraseVirtReg(), findStartOfTree(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), getCompareSourceReg(), llvm::LiveVariables::HandleVirtRegDef(), hasVulnerableLoad(), INITIALIZE_PASS(), isCallerPreservedOrConstPhysReg(), isCrossCopy(), isFullUndefDef(), MaybeRewriteToDrop(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::LiveVariables::removeVirtualRegisterDead(), ReplaceDominatedUses(), llvm::X86FrameLowering::restoreWin32EHStackPointers(), llvm::X86InstrInfo::setSpecialOperandAttr(), transferDeadCC(), and VerifyLowRegs().

◆ setIsDebug()

void llvm::MachineOperand::setIsDebug ( bool Val = true )

inline

Definition at line 517 of file MachineOperand.h.

References assert(), isReg(), and Val.

Referenced by AssignProtectedObjSet(), INITIALIZE_PASS(), printExtendedName(), and toString().

◆ setIsDef()

void MachineOperand::setIsDef ( bool Val = true )

Change a def to a use, or a use to a def.

Definition at line 98 of file MachineOperand.cpp.

References llvm::MachineRegisterInfo::addRegOperandToUseList(), assert(), getMFIfAvailable(), isDebug(), isReg(), MRI, llvm::MachineRegisterInfo::removeRegOperandFromUseList(), and Val.

Referenced by emitPostSt(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), setIsUse(), and VerifyLowRegs().

◆ setIsEarlyClobber()

void llvm::MachineOperand::setIsEarlyClobber ( bool Val = true )

inline

Definition at line 512 of file MachineOperand.h.

References assert(), isReg(), and Val.

Referenced by llvm::MachineInstr::addOperand(), and llvm::LiveVariables::HandleVirtRegDef().

◆ setIsInternalRead()

void llvm::MachineOperand::setIsInternalRead ( bool Val = true )

inline

Definition at line 507 of file MachineOperand.h.

References assert(), isReg(), and Val.

Referenced by llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::finalizeBundle(), and INITIALIZE_PASS().

◆ setIsKill()

void llvm::MachineOperand::setIsKill ( bool Val = true )

inline

Definition at line 489 of file MachineOperand.h.

References assert(), isDebug(), isReg(), and Val.

Referenced by addExclusiveRegPair(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterKilled(), addSegmentsWithValNo(), AnyAliasLiveIn(), clearKillFlags(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::R600InstrInfo::copyPhysReg(), copyRegOperand(), createBBSelectReg(), createPHIsForCMOVsInSinkBB(), earlyUseOperand(), emitLoadSRsrcFromVGPRLoop(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), findPotentialBlockers(), findStartOfTree(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), getNewValueJumpOpcode(), getRegClassForUnfoldedLoad(), getRegsUsedByPHIs(), llvm::LiveVariables::HandleVirtRegDef(), hasVulnerableLoad(), INITIALIZE_PASS(), llvm::SIInstrInfo::insertBranch(), insertDivByZeroTrap(), llvm::CoalescerPair::isCoalescable(), isCopy(), isEFLAGSLive(), isFullCopyOf(), isFullUndefDef(), isMergeableLdStUpdate(), isUseSafeToFold(), llvm::SIInstrInfo::legalizeOperands(), matchSwap(), llvm::AArch64InstrInfo::optimizeCondBranch(), preserveCondRegFlags(), registerDefinedBetween(), removeKillInfo(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::SystemZInstrInfo::SystemZInstrInfo(), llvm::X86InstrInfo::unfoldMemoryOperand(), updateKillStatus(), and VerifyLowRegs().

◆ setIsRenamable()

void MachineOperand::setIsRenamable ( bool Val = true )

Definition at line 133 of file MachineOperand.cpp.

References assert(), getMFIfAvailable(), getReg(), llvm::TargetRegisterInfo::isPhysicalRegister(), isReg(), and Val.

Referenced by llvm::TargetInstrInfo::commuteInstructionImpl(), INITIALIZE_PASS(), isNopCopy(), and setIsUndef().

◆ setIsUndef()

void llvm::MachineOperand::setIsUndef ( bool Val = true )

inline

◆ setIsUse()

void llvm::MachineOperand::setIsUse ( bool Val = true )

inline

Definition at line 479 of file MachineOperand.h.

References setIsDef(), and Val.

◆ setMBB()

void llvm::MachineOperand::setMBB ( MachineBasicBlock * MBB )

inline

◆ setMetadata()

void llvm::MachineOperand::setMetadata ( const MDNode * MD )

inline

Definition at line 668 of file MachineOperand.h.

References assert(), isMetadata(), and MD.

Referenced by AssignProtectedObjSet(), and llvm::updateDbgValueForSpill().

◆ setOffset()

void llvm::MachineOperand::setOffset ( int64_t Offset )

inline

Definition at line 654 of file MachineOperand.h.

References assert(), isBlockAddress(), isCPI(), isGlobal(), isMCSymbol(), isSymbol(), and isTargetIndex().

Referenced by ChangeToES(), ChangeToTargetIndex(), CreateBA(), CreateCPI(), CreateES(), CreateGA(), CreateMCSymbol(), CreateTargetIndex(), llvm::createX86OptimizeLEAs(), llvm::X86RegisterInfo::eliminateFrameIndex(), and INITIALIZE_PASS().

◆ setReg()

void MachineOperand::setReg ( unsigned Reg )

Change the register this operand corresponds to.

Definition at line 52 of file MachineOperand.cpp.

References llvm::MachineRegisterInfo::addRegOperandToUseList(), getMFIfAvailable(), getReg(), MRI, Reg, and llvm::MachineRegisterInfo::removeRegOperandFromUseList().

Referenced by addSegmentsWithValNo(), llvm::RegisterBankInfo::applyDefaultMapping(), llvm::SwingSchedulerDAG::applyInstrChange(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), changeFCMPPredToAArch64CC(), llvm::WebAssemblyDebugValueManager::clone(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::PPCInstrInfo::commuteInstructionImpl(), computeBytesPoppedByCalleeForSRet(), llvm::constrainSelectedInstRegOperands(), copyRegOperand(), createBBSelectReg(), llvm::createBreakFalseDeps(), llvm::createR600ExpandSpecialInstrsPass(), llvm::createX86OptimizeLEAs(), llvm::ConnectedVNInfoEqClasses::Distribute(), llvm::SparcRegisterInfo::eliminateFrameIndex(), emitLoadSRsrcFromVGPRLoop(), emitPostSt(), ExpandMOVImmSExti8(), expandNOVLXLoad(), expandNOVLXStore(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::LegalizerHelper::fewerElementsVector(), findStartOfTree(), llvm::fixStackStores(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldVGPRCopyIntoRegSequence(), getRegClassFromGRPhysReg(), getRegsUsedByPHIs(), getTag(), INITIALIZE_PASS(), InsertLDR_STR(), insertPHI(), isEFLAGSLive(), isFullCopyOf(), isFullUndefDef(), isImmValidForOpcode(), isMergeableLdStUpdate(), isNopCopy(), isUseSafeToFold(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::X86CallLowering::lowerCall(), llvm::AArch64CallLowering::lowerCall(), llvm::MachineRegisterInfo::markUsesInDebugValueAsUndef(), MaybeRewriteToDrop(), MoveAndTeeForMultiUse(), MoveForSingleUse(), llvm::SIInstrInfo::moveToVALU(), llvm::LegalizerHelper::narrowScalar(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::R600InstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), propagateLocalCopies(), readsReg(), registerDefinedBetween(), RematerializeCheapDef(), removeExternalCFGEdges(), removePhis(), ReplaceDominatedUses(), llvm::PPCFrameLowering::replaceFPWithRealFP(), llvm::CombinerHelper::replaceRegOpWith(), replaceRegUsesAfterLoop(), llvm::MachineRegisterInfo::replaceRegWith(), llvm::R600InstrInfo::reverseBranchCondition(), llvm::MachineSSAUpdater::RewriteUse(), llvm::rdf::CopyPropagation::run(), llvm::Localizer::runOnMachineFunction(), llvm::MachinePipeliner::runOnMachineFunction(), selectCopy(), selectFP16CopyFromGPR32(), llvm::setDirectAddressInInstr(), llvm::LiveDebugVariables::splitRegister(), false::Chain::str(), substPhysReg(), substVirtReg(), llvm::SystemZInstrInfo::SystemZInstrInfo(), tieOpsIfNeeded(), llvm::CombinerHelper::tryCombineExtendingLoads(), llvm::AntiDepBreaker::UpdateDbgValue(), updateOperand(), and llvm::LegalizerHelper::widenScalar().

◆ setRegMask()

void llvm::MachineOperand::setRegMask ( const uint32_t * RegMaskPtr )

inline

Sets value of register mask operand referencing Mask.

The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand. See CreateRegMask(). Any physreg with a 0 bit in the mask is clobbered by the instruction.

Definition at line 682 of file MachineOperand.h.

References assert(), ChangeToES(), ChangeToFPImmediate(), ChangeToFrameIndex(), ChangeToImmediate(), ChangeToMCSymbol(), ChangeToRegister(), ChangeToTargetIndex(), hash_value, ImmVal, isDead(), isDebug(), isDef(), isIdenticalTo(), isKill(), isRegMask(), isUndef(), and Other.

◆ setSubReg()

void llvm::MachineOperand::setSubReg ( unsigned subReg )

inline

Definition at line 460 of file MachineOperand.h.

References assert(), isReg(), substPhysReg(), and substVirtReg().

Referenced by canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::PPCInstrInfo::commuteInstructionImpl(), copyRegOperand(), CreateReg(), definesFullReg(), llvm::SIInstrInfo::FoldImmediate(), foldImmediates(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), getNewSource(), getRegClassFromGRPhysReg(), getRegsUsedByPHIs(), INITIALIZE_PASS(), insertDivByZeroTrap(), insertPHI(), isImmValidForOpcode(), isUseSafeToFold(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::rdf::CopyPropagation::run(), llvm::MachinePipeliner::runOnMachineFunction(), llvm::LiveDebugVariables::splitRegister(), substPhysReg(), substVirtReg(), swapRegAndNonRegOperand(), and llvm::LiveDebugVariables::~LiveDebugVariables().

◆ setTargetFlags()

void llvm::MachineOperand::setTargetFlags ( unsigned F )

inline

Definition at line 218 of file MachineOperand.h.

References assert(), F(), and isReg().

Referenced by changeFCMPPredToAArch64CC(), ChangeToES(), ChangeToTargetIndex(), CreateBA(), CreateCPI(), CreateES(), CreateGA(), CreateJTI(), CreateMBB(), CreateMCSymbol(), CreateTargetIndex(), EmitNops(), and swapMIOperands().

◆ substPhysReg()

void MachineOperand::substPhysReg	(	unsigned	Reg,
		const TargetRegisterInfo &	TRI
	)

substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account.

For instance, substPhysReg(eax) will change reg1024:sub_8bit to al.

Definition at line 84 of file MachineOperand.cpp.

References assert(), llvm::MCRegisterInfo::getSubReg(), getSubReg(), isDef(), llvm::TargetRegisterInfo::isPhysicalRegister(), setIsUndef(), setReg(), and setSubReg().

Referenced by addSegmentsWithValNo(), getRegClassFromGRPhysReg(), llvm::MachineRegisterInfo::replaceRegWith(), setSubReg(), and llvm::LiveDebugVariables::splitRegister().

◆ substVirtReg()

void MachineOperand::substVirtReg	(	unsigned	Reg,
		unsigned	SubIdx,
		const TargetRegisterInfo &	TRI
	)

substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.

Take any existing SubReg index into account, using TargetRegisterInfo to compose the subreg indices if necessary. Reg must be a virtual register, SubIdx can be 0.

Definition at line 74 of file MachineOperand.cpp.

References assert(), llvm::TargetRegisterInfo::composeSubRegIndices(), getSubReg(), llvm::TargetRegisterInfo::isVirtualRegister(), setReg(), and setSubReg().

Referenced by setSubReg(), and updateOperand().

Friends And Related Function Documentation

◆ DenseMapInfo< MachineOperand >

friend struct DenseMapInfo< MachineOperand >

friend

Definition at line 910 of file MachineOperand.h.

◆ hash_value

hash_code hash_value ( const MachineOperand & MO )

friend

MachineOperand hash_value overload.

Note that this includes the same information in the hash that isIdenticalTo uses for comparison. It is thus suited for use in hash tables which use that function for equality comparisons only. This must stay exactly in sync with isIdenticalTo above.

Referenced by llvm::DenseMapInfo< MachineOperand >::getHashValue(), llvm::operator<<(), and setRegMask().

◆ MachineInstr

friend class MachineInstr

friend

Definition at line 896 of file MachineOperand.h.

◆ MachineRegisterInfo

friend class MachineRegisterInfo

friend

Definition at line 897 of file MachineOperand.h.

Member Data Documentation

◆ BA

const BlockAddress* llvm::MachineOperand::BA

Definition at line 189 of file MachineOperand.h.

Referenced by CreateBA().

◆ CFIIndex

unsigned llvm::MachineOperand::CFIIndex

Definition at line 172 of file MachineOperand.h.

Referenced by CreateCFIIndex().

◆ CFP

const ConstantFP* llvm::MachineOperand::CFP

Definition at line 166 of file MachineOperand.h.

Referenced by CreateFPImm(), and setFPImm().

◆ CI

const ConstantInt* llvm::MachineOperand::CI

Definition at line 167 of file MachineOperand.h.

Referenced by CreateCImm(), and setCImm().

◆ GV

const GlobalValue* llvm::MachineOperand::GV

Definition at line 188 of file MachineOperand.h.

Referenced by CreateGA().

◆ ImmVal

int64_t llvm::MachineOperand::ImmVal

Definition at line 168 of file MachineOperand.h.

Referenced by ChangeToImmediate(), and setRegMask().

◆ Index

int llvm::MachineOperand::Index

Definition at line 186 of file MachineOperand.h.

Referenced by clearParent(), getTargetIndexName(), and printSubRegIdx().

◆ IntrinsicID

Intrinsic::ID llvm::MachineOperand::IntrinsicID

Definition at line 173 of file MachineOperand.h.

Referenced by CreateIntrinsicID().

◆ MBB

MachineBasicBlock* llvm::MachineOperand::MBB

Definition at line 165 of file MachineOperand.h.

Referenced by setMBB().

◆ MD

const MDNode* llvm::MachineOperand::MD

Definition at line 170 of file MachineOperand.h.

Referenced by CreateMetadata(), and setMetadata().

◆ Next

MachineOperand* llvm::MachineOperand::Next

Definition at line 179 of file MachineOperand.h.

◆ OffsetedInfo

struct { ... } llvm::MachineOperand::OffsetedInfo

OffsetedInfo - This struct contains the offset and an object identifier.

this represent the object as with an optional offset from it.

Referenced by CreateBA(), CreateES(), and CreateGA().

◆ OffsetHi

int llvm::MachineOperand::OffsetHi

Definition at line 192 of file MachineOperand.h.

◆ OffsetLo

unsigned llvm::MachineOperand::OffsetLo

Definition at line 156 of file MachineOperand.h.

◆ Pred

unsigned llvm::MachineOperand::Pred

Definition at line 174 of file MachineOperand.h.

Referenced by CreatePredicate(), and print().

◆ Prev

MachineOperand* llvm::MachineOperand::Prev

Definition at line 178 of file MachineOperand.h.

◆ Reg

struct { ... } llvm::MachineOperand::Reg

Referenced by llvm::MachineInstr::addOperand(), llvm::MachineRegisterInfo::addRegOperandToUseList(), ChangeToRegister(), CreateReg(), llvm::MachineRegisterInfo::moveOperands(), print(), printCFIRegister(), readsReg(), llvm::MachineRegisterInfo::removeRegOperandFromUseList(), and setReg().

◆ RegMask

const uint32_t* llvm::MachineOperand::RegMask

Definition at line 169 of file MachineOperand.h.

Referenced by CreateRegLiveOut(), CreateRegMask(), isIdenticalTo(), and print().

◆ RegNo

unsigned llvm::MachineOperand::RegNo

Definition at line 155 of file MachineOperand.h.

Referenced by CreateReg().

◆ Sym

MCSymbol* llvm::MachineOperand::Sym

Definition at line 171 of file MachineOperand.h.

Referenced by ChangeToMCSymbol(), clearParent(), and CreateMCSymbol().

◆ SymbolName

const char* llvm::MachineOperand::SymbolName

Definition at line 187 of file MachineOperand.h.

◆ Val

union { ... } llvm::MachineOperand::Val

Referenced by setImplicit(), setIsDead(), setIsDebug(), setIsDef(), setIsEarlyClobber(), setIsInternalRead(), setIsKill(), setIsRenamable(), setIsUndef(), and setIsUse().

The documentation for this class was generated from the following files:

include/llvm/CodeGen/MachineOperand.h
lib/CodeGen/MachineOperand.cpp

Public Types

Public Member Functions

Static Public Member Functions

Friends

Detailed Description

Member Enumeration Documentation

◆ MachineOperandType

Member Function Documentation

◆ addTargetFlag()

◆ ChangeToES()

◆ ChangeToFPImmediate()

◆ ChangeToFrameIndex()

◆ ChangeToImmediate()

◆ ChangeToMCSymbol()

◆ ChangeToRegister()

◆ ChangeToTargetIndex()

◆ clearParent()

◆ clobbersPhysReg() [1/2]

◆ clobbersPhysReg() [2/2]

◆ CreateBA()

◆ CreateCFIIndex()

◆ CreateCImm()

◆ CreateCPI()

◆ CreateES()

◆ CreateFI()

◆ CreateFPImm()

◆ CreateGA()

◆ CreateImm()

◆ CreateIntrinsicID()

◆ CreateJTI()

◆ CreateMBB()

◆ CreateMCSymbol()

◆ CreateMetadata()

◆ CreatePredicate()

◆ CreateReg()

◆ CreateRegLiveOut()

◆ CreateRegMask()

◆ CreateTargetIndex()

◆ dump()

◆ getBlockAddress()

◆ getCFIIndex()

◆ getCImm()

◆ getFPImm()

◆ getGlobal()

◆ getImm()

◆ getIndex()

◆ getIntrinsicID()

◆ getMBB()

◆ getMCSymbol()

◆ getMetadata()

◆ getOffset()

◆ getParent() [1/2]

◆ getParent() [2/2]

◆ getPredicate()

◆ getReg()

◆ getRegLiveOut()

◆ getRegMask()

◆ getRegMaskSize()

◆ getSubReg()

◆ getSymbolName()

◆ getTargetFlags()

◆ getType()

◆ isBlockAddress()

◆ isCFIIndex()

◆ isCImm()

◆ isCPI()

◆ isDead()

◆ isDebug()

◆ isDef()

◆ isEarlyClobber()

◆ isFI()

◆ isFPImm()

◆ isGlobal()

◆ isIdenticalTo()

◆ isImm()

◆ isImplicit()

◆ isInternalRead()

◆ isIntrinsicID()

◆ isJTI()

◆ isKill()