26 #define DEBUG_TYPE "hexagon_cfg" 49 StringRef getPassName()
const override {
return "Hexagon CFG Optimizer"; }
64 case Hexagon::J2_jumpt:
65 case Hexagon::J2_jumptpt:
66 case Hexagon::J2_jumpf:
67 case Hexagon::J2_jumpfpt:
68 case Hexagon::J2_jumptnew:
69 case Hexagon::J2_jumpfnew:
70 case Hexagon::J2_jumptnewpt:
71 case Hexagon::J2_jumpfnewpt:
78 return (Opc == Hexagon::J2_jump);
81 void HexagonCFGOptimizer::InvertAndChangeJumpTarget(
87 case Hexagon::J2_jumpt:
88 NewOpcode = Hexagon::J2_jumpf;
90 case Hexagon::J2_jumpf:
91 NewOpcode = Hexagon::J2_jumpt;
93 case Hexagon::J2_jumptnewpt:
94 NewOpcode = Hexagon::J2_jumpfnewpt;
96 case Hexagon::J2_jumpfnewpt:
97 NewOpcode = Hexagon::J2_jumptnewpt;
111 if (PB->isLayoutSuccessor(MBB) && PB->canFallThrough())
122 MBBb != MBBe; ++MBBb) {
127 if (MII != MBB->
end()) {
166 LayoutSucc = FirstSucc;
167 JumpAroundTarget = SecondSucc;
169 LayoutSucc = SecondSucc;
170 JumpAroundTarget = FirstSucc;
178 if (MI.
getOpcode() == Hexagon::J2_jumpt ||
183 if (!LayoutSucc || (CondBranchTarget != JumpAroundTarget)) {
187 if ((NumSuccs == 2) && LayoutSucc && (LayoutSucc->
pred_size() == 1)) {
189 if ((LayoutSucc->
size() == 1) &&
191 assert(JumpAroundTarget &&
"jump target is needed to process second basic block");
196 bool case2 = JumpAroundTarget->
isSuccessor(UncondTarget) &&
197 !JumpAroundTarget->
empty() &&
202 if (case1 || case2) {
203 InvertAndChangeJumpTarget(MI, UncondTarget);
212 if (case2 && !case1) {
216 if (!isOnFallThroughPath(UncondTarget))
217 UncondTarget->
moveAfter(JumpAroundTarget);
223 std::vector<MachineBasicBlock::RegisterMaskPair> OrigLiveIn(
225 std::vector<MachineBasicBlock::RegisterMaskPair> NewLiveIn(
228 for (
const auto &OrigLI : OrigLiveIn)
230 for (
const auto &NewLI : NewLiveIn)
249 return new HexagonCFGOptimizer();
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
MachineBasicBlock * getMBB() const
This class represents lattice values for constants.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
static bool IsUnconditionalJump(int Opc)
void moveAfter(MachineBasicBlock *NewBefore)
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
static bool IsConditionalBranch(int Opc)
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
virtual const TargetInstrInfo * getInstrInfo() const
TargetInstrInfo - Interface to description of machine instruction set.
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
livein_iterator livein_end() const
void setMBB(MachineBasicBlock *MBB)
FunctionPass class - This class is used to implement most global optimizations.
iterator_range< pred_iterator > predecessors()
succ_iterator succ_begin()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Iterator for intrusive lists based on ilist_node.
void setDesc(const MCInstrDesc &tid)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one...
unsigned pred_size() const
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
const Function & getFunction() const
Return the LLVM function that this machine code represents.
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
unsigned succ_size() const
const MachineBasicBlock * getParent() const
MachineFunctionProperties & set(Property P)
Representation of each machine instruction.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
INITIALIZE_PASS(HexagonCFGOptimizer, "hexagon-cfg", "Hexagon CFG Optimizer", false, false) FunctionPass *llvm
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void initializeHexagonCFGOptimizerPass(PassRegistry &)
StringRef - Represent a constant reference to a string, i.e.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
const MachineOperand & getOperand(unsigned i) const
std::vector< MachineBasicBlock * >::iterator succ_iterator
livein_iterator livein_begin() const
Properties which a MachineFunction may have at a given point in time.
FunctionPass * createHexagonCFGOptimizer()