24 #ifndef LLVM_LIB_TARGET_X86_X86INSTRBUILDER_H 25 #define LLVM_LIB_TARGET_X86_X86INSTRBUILDER_H 61 : BaseType(
RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr),
67 assert(Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8);
71 false,
false,
false, 0,
false));
79 false,
false, 0,
false));
166 unsigned Reg1,
bool isKill1,
167 unsigned Reg2,
bool isKill2) {
233 #endif // LLVM_LIB_TARGET_X86_X86INSTRBUILDER_H
const MachineInstrBuilder & add(const MachineOperand &MO) const
This class represents lattice values for constants.
static const MachineInstrBuilder & addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI, unsigned GlobalBaseReg, unsigned char OpFlags)
addConstantPoolReference - This function is used to add a reference to the base of a constant value s...
void push_back(const T &Elt)
Describe properties that are true of each instruction in the target description file.
union llvm::X86AddressMode::@497 Base
unsigned getReg() const
getReg - Returns the register number.
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned char TargetFlags=0) const
bool mayLoad() const
Return true if this instruction could possibly read memory.
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
GlobalBaseReg - On Darwin, this node represents the result of the mflr at function entry...
A description of a memory reference used in the backend.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
enum llvm::X86AddressMode::@496 BaseType
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
unsigned getKillRegState(bool B)
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
const GlobalValue * getGlobal() const
static const MachineInstrBuilder & addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, bool isKill, int Offset)
addRegOffset - This function is used to add a memory reference of the form [Reg + Offset]...
void setImm(int64_t immVal)
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
const MachineInstrBuilder & addFrameIndex(int Idx) const
static X86AddressMode getAddressFromInstr(const MachineInstr *MI, unsigned Operand)
Compute the addressing mode from an machine instruction starting with the given operand.
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
The memory access writes data.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
MachineOperand class - Representation of each machine instruction operand.
static const MachineInstrBuilder & addRegReg(const MachineInstrBuilder &MIB, unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2)
addRegReg - This function is used to add a memory reference of the form: [Reg + Reg].
const MachineInstrBuilder & addConstantPoolIndex(unsigned Idx, int Offset=0, unsigned char TargetFlags=0) const
void getFullAddress(SmallVectorImpl< MachineOperand > &MO)
bool mayStore() const
Return true if this instruction could possibly modify memory.
const MachineBasicBlock * getParent() const
The memory access reads data.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
Representation of each machine instruction.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
static const MachineInstrBuilder & addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg)
addDirectMem - This function is used to add a direct memory reference to the current instruction – t...
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
static const MachineInstrBuilder & addOffset(const MachineInstrBuilder &MIB, int Offset)
void setReg(unsigned Reg)
Change the register this operand corresponds to.
static MachineOperand CreateImm(int64_t Val)
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
static void setDirectAddressInInstr(MachineInstr *MI, unsigned Operand, unsigned Reg)
Replace the address used in the instruction with the direct memory reference.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
X86AddressMode - This struct holds a generalized full x86 address mode.
const MachineOperand & getOperand(unsigned i) const
static MachineOperand CreateFI(int Idx)
static const MachineInstrBuilder & addFullAddress(const MachineInstrBuilder &MIB, const X86AddressMode &AM)