llvm::MachineRegisterInfo Class Reference

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...

#include "llvm/CodeGen/MachineRegisterInfo.h"

Classes
class	defusechain_instr_iterator
	defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More...
class	defusechain_iterator
	reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More...
class	Delegate

Public Types
using	reg_iterator = defusechain_iterator< true, true, false, true, false, false >
	reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register. More...
using	reg_instr_iterator = defusechain_instr_iterator< true, true, false, false, true, false >
	reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr. More...
using	reg_bundle_iterator = defusechain_instr_iterator< true, true, false, false, false, true >
	reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle. More...
using	reg_nodbg_iterator = defusechain_iterator< true, true, true, true, false, false >
	reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug. More...
using	reg_instr_nodbg_iterator = defusechain_instr_iterator< true, true, true, false, true, false >
	reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More...
using	reg_bundle_nodbg_iterator = defusechain_instr_iterator< true, true, true, false, false, true >
	reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug. More...
using	def_iterator = defusechain_iterator< false, true, false, true, false, false >
	def_iterator/def_begin/def_end - Walk all defs of the specified register. More...
using	def_instr_iterator = defusechain_instr_iterator< false, true, false, false, true, false >
	def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst. More...
using	def_bundle_iterator = defusechain_instr_iterator< false, true, false, false, false, true >
	def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle. More...
using	use_iterator = defusechain_iterator< true, false, false, true, false, false >
	use_iterator/use_begin/use_end - Walk all uses of the specified register. More...
using	use_instr_iterator = defusechain_instr_iterator< true, false, false, false, true, false >
	use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr. More...
using	use_bundle_iterator = defusechain_instr_iterator< true, false, false, false, false, true >
	use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle. More...
using	use_nodbg_iterator = defusechain_iterator< true, false, true, true, false, false >
	use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug. More...
using	use_instr_nodbg_iterator = defusechain_instr_iterator< true, false, true, false, true, false >
	use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More...
using	use_bundle_nodbg_iterator = defusechain_instr_iterator< true, false, true, false, false, true >
	use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug. More...
using	livein_iterator = std::vector< std::pair< unsigned, unsigned > >::const_iterator

Public Member Functions
	MachineRegisterInfo (MachineFunction *MF)
	MachineRegisterInfo (const MachineRegisterInfo &)=delete
MachineRegisterInfo &	operator= (const MachineRegisterInfo &)=delete
const TargetRegisterInfo *	getTargetRegisterInfo () const
void	resetDelegate (Delegate *delegate)
void	setDelegate (Delegate *delegate)
bool	isSSA () const
void	leaveSSA ()
bool	tracksLiveness () const
	tracksLiveness - Returns true when tracking register liveness accurately. More...
void	invalidateLiveness ()
	invalidateLiveness - Indicates that register liveness is no longer being tracked accurately. More...
bool	shouldTrackSubRegLiveness (const TargetRegisterClass &RC) const
	Returns true if liveness for register class RC should be tracked at the subregister level. More...
bool	shouldTrackSubRegLiveness (unsigned VReg) const
bool	subRegLivenessEnabled () const
bool	isUpdatedCSRsInitialized () const
	Returns true if the updated CSR list was initialized and false otherwise. More...
void	disableCalleeSavedRegister (unsigned Reg)
	Disables the register from the list of CSRs. More...
const MCPhysReg *	getCalleeSavedRegs () const
	Returns list of callee saved registers. More...
void	setCalleeSavedRegs (ArrayRef< MCPhysReg > CSRs)
	Sets the updated Callee Saved Registers list. More...
void	addRegOperandToUseList (MachineOperand *MO)
	Add MO to the linked list of operands for its register. More...
void	removeRegOperandFromUseList (MachineOperand *MO)
	Remove MO from its use-def list. More...
void	moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps)
	Move NumOps operands from Src to Dst, updating use-def lists as needed. More...
void	verifyUseList (unsigned Reg) const
	Verify the sanity of the use list for Reg. More...
void	verifyUseLists () const
	Verify the use list of all registers. More...
reg_iterator	reg_begin (unsigned RegNo) const
iterator_range< reg_iterator >	reg_operands (unsigned Reg) const
reg_instr_iterator	reg_instr_begin (unsigned RegNo) const
iterator_range< reg_instr_iterator >	reg_instructions (unsigned Reg) const
reg_bundle_iterator	reg_bundle_begin (unsigned RegNo) const
iterator_range< reg_bundle_iterator >	reg_bundles (unsigned Reg) const
bool	reg_empty (unsigned RegNo) const
	reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in). More...
reg_nodbg_iterator	reg_nodbg_begin (unsigned RegNo) const
iterator_range< reg_nodbg_iterator >	reg_nodbg_operands (unsigned Reg) const
reg_instr_nodbg_iterator	reg_instr_nodbg_begin (unsigned RegNo) const
iterator_range< reg_instr_nodbg_iterator >	reg_nodbg_instructions (unsigned Reg) const
reg_bundle_nodbg_iterator	reg_bundle_nodbg_begin (unsigned RegNo) const
iterator_range< reg_bundle_nodbg_iterator >	reg_nodbg_bundles (unsigned Reg) const
bool	reg_nodbg_empty (unsigned RegNo) const
	reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions. More...
def_iterator	def_begin (unsigned RegNo) const
iterator_range< def_iterator >	def_operands (unsigned Reg) const
def_instr_iterator	def_instr_begin (unsigned RegNo) const
iterator_range< def_instr_iterator >	def_instructions (unsigned Reg) const
def_bundle_iterator	def_bundle_begin (unsigned RegNo) const
iterator_range< def_bundle_iterator >	def_bundles (unsigned Reg) const
bool	def_empty (unsigned RegNo) const
	def_empty - Return true if there are no instructions defining the specified register (it may be live-in). More...
StringRef	getVRegName (unsigned Reg) const
void	insertVRegByName (StringRef Name, unsigned Reg)
bool	hasOneDef (unsigned RegNo) const
	Return true if there is exactly one operand defining the specified register. More...
use_iterator	use_begin (unsigned RegNo) const
iterator_range< use_iterator >	use_operands (unsigned Reg) const
use_instr_iterator	use_instr_begin (unsigned RegNo) const
iterator_range< use_instr_iterator >	use_instructions (unsigned Reg) const
use_bundle_iterator	use_bundle_begin (unsigned RegNo) const
iterator_range< use_bundle_iterator >	use_bundles (unsigned Reg) const
bool	use_empty (unsigned RegNo) const
	use_empty - Return true if there are no instructions using the specified register. More...
bool	hasOneUse (unsigned RegNo) const
	hasOneUse - Return true if there is exactly one instruction using the specified register. More...
use_nodbg_iterator	use_nodbg_begin (unsigned RegNo) const
iterator_range< use_nodbg_iterator >	use_nodbg_operands (unsigned Reg) const
use_instr_nodbg_iterator	use_instr_nodbg_begin (unsigned RegNo) const
iterator_range< use_instr_nodbg_iterator >	use_nodbg_instructions (unsigned Reg) const
use_bundle_nodbg_iterator	use_bundle_nodbg_begin (unsigned RegNo) const
iterator_range< use_bundle_nodbg_iterator >	use_nodbg_bundles (unsigned Reg) const
bool	use_nodbg_empty (unsigned RegNo) const
	use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register. More...
bool	hasOneNonDBGUse (unsigned RegNo) const
	hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register. More...
void	replaceRegWith (unsigned FromReg, unsigned ToReg)
	replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. More...
MachineInstr *	getVRegDef (unsigned Reg) const
	getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found. More...
MachineInstr *	getUniqueVRegDef (unsigned Reg) const
	getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. More...
void	clearKillFlags (unsigned Reg) const
	clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. More...
void	dumpUses (unsigned RegNo) const
bool	isConstantPhysReg (unsigned PhysReg) const
	Returns true if PhysReg is unallocatable and constant throughout the function. More...
bool	isCallerPreservedOrConstPhysReg (unsigned PhysReg) const
	Returns true if either isConstantPhysReg or TRI->isCallerPreservedPhysReg returns true. More...
PSetIterator	getPressureSets (unsigned RegUnit) const
	Get an iterator over the pressure sets affected by the given physical or virtual register. More...
const TargetRegisterClass *	getRegClass (unsigned Reg) const
	Return the register class of the specified virtual register. More...
const TargetRegisterClass *	getRegClassOrNull (unsigned Reg) const
	Return the register class of Reg, or null if Reg has not been assigned a register class yet. More...
const RegisterBank *	getRegBankOrNull (unsigned Reg) const
	Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class. More...
const RegClassOrRegBank &	getRegClassOrRegBank (unsigned Reg) const
	Return the register bank or register class of Reg. More...
void	setRegClass (unsigned Reg, const TargetRegisterClass *RC)
	setRegClass - Set the register class of the specified virtual register. More...
void	setRegBank (unsigned Reg, const RegisterBank &RegBank)
	Set the register bank to RegBank for Reg. More...
void	setRegClassOrRegBank (unsigned Reg, const RegClassOrRegBank &RCOrRB)
const TargetRegisterClass *	constrainRegClass (unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
	constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. More...
bool	constrainRegAttrs (unsigned Reg, unsigned ConstrainingReg, unsigned MinNumRegs=0)
	Constrain the register class or the register bank of the virtual register Reg (and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type). More...
bool	recomputeRegClass (unsigned Reg)
	recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. More...
unsigned	createVirtualRegister (const TargetRegisterClass *RegClass, StringRef Name="")
	createVirtualRegister - Create and return a new virtual register in the function with the specified register class. More...
unsigned	cloneVirtualRegister (unsigned VReg, StringRef Name="")
	Create and return a new virtual register in the function with the same attributes as the given register. More...
LLT	getType (unsigned Reg) const
	Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register. More...
void	setType (unsigned VReg, LLT Ty)
	Set the low-level type of VReg to Ty. More...
unsigned	createGenericVirtualRegister (LLT Ty, StringRef Name="")
	Create and return a new generic virtual register with low-level type Ty. More...
void	clearVirtRegTypes ()
	Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers). More...
unsigned	createIncompleteVirtualRegister (StringRef Name="")
	Creates a new virtual register that has no register class, register bank or size assigned yet. More...
unsigned	getNumVirtRegs () const
	getNumVirtRegs - Return the number of virtual registers created. More...
void	clearVirtRegs ()
	clearVirtRegs - Remove all virtual registers (after physreg assignment). More...
void	setRegAllocationHint (unsigned VReg, unsigned Type, unsigned PrefReg)
	setRegAllocationHint - Specify a register allocation hint for the specified virtual register. More...
void	addRegAllocationHint (unsigned VReg, unsigned PrefReg)
	addRegAllocationHint - Add a register allocation hint to the hints vector for VReg. More...
void	setSimpleHint (unsigned VReg, unsigned PrefReg)
	Specify the preferred (target independent) register allocation hint for the specified virtual register. More...
void	clearSimpleHint (unsigned VReg)
std::pair< unsigned, unsigned >	getRegAllocationHint (unsigned VReg) const
	getRegAllocationHint - Return the register allocation hint for the specified virtual register. More...
unsigned	getSimpleHint (unsigned VReg) const
	getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint. More...
const std::pair< unsigned, SmallVector< unsigned, 4 > > &	getRegAllocationHints (unsigned VReg) const
	getRegAllocationHints - Return a reference to the vector of all register allocation hints for VReg. More...
void	markUsesInDebugValueAsUndef (unsigned Reg) const
	markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis. More...
bool	isPhysRegModified (unsigned PhysReg, bool SkipNoReturnDef=false) const
	Return true if the specified register is modified in this function. More...
bool	isPhysRegUsed (unsigned PhysReg) const
	Return true if the specified register is modified or read in this function. More...
void	addPhysRegsUsedFromRegMask (const uint32_t *RegMask)
	addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. More...
const BitVector &	getUsedPhysRegsMask () const
void	freezeReservedRegs (const MachineFunction &)
	freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins. More...
bool	reservedRegsFrozen () const
	reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant. More...
bool	canReserveReg (unsigned PhysReg) const
	canReserveReg - Returns true if PhysReg can be used as a reserved register. More...
const BitVector &	getReservedRegs () const
	getReservedRegs - Returns a reference to the frozen set of reserved registers. More...
bool	isReserved (unsigned PhysReg) const
	isReserved - Returns true when PhysReg is a reserved register. More...
bool	isReservedRegUnit (unsigned Unit) const
	Returns true when the given register unit is considered reserved. More...
bool	isAllocatable (unsigned PhysReg) const
	isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved. More...
void	addLiveIn (unsigned Reg, unsigned vreg=0)
	addLiveIn - Add the specified register as a live-in. More...
livein_iterator	livein_begin () const
livein_iterator	livein_end () const
bool	livein_empty () const
ArrayRef< std::pair< unsigned, unsigned > >	liveins () const
bool	isLiveIn (unsigned Reg) const
unsigned	getLiveInPhysReg (unsigned VReg) const
	getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register. More...
unsigned	getLiveInVirtReg (unsigned PReg) const
	getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register. More...
void	EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)
	EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block. More...
LaneBitmask	getMaxLaneMaskForVReg (unsigned Reg) const
	Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg. More...

Static Public Member Functions
static reg_iterator	reg_end ()
static reg_instr_iterator	reg_instr_end ()
static reg_bundle_iterator	reg_bundle_end ()
static reg_nodbg_iterator	reg_nodbg_end ()
static reg_instr_nodbg_iterator	reg_instr_nodbg_end ()
static reg_bundle_nodbg_iterator	reg_bundle_nodbg_end ()
static def_iterator	def_end ()
static def_instr_iterator	def_instr_end ()
static def_bundle_iterator	def_bundle_end ()
static use_iterator	use_end ()
static use_instr_iterator	use_instr_end ()
static use_bundle_iterator	use_bundle_end ()
static use_nodbg_iterator	use_nodbg_end ()
static use_instr_nodbg_iterator	use_instr_nodbg_end ()
static use_bundle_nodbg_iterator	use_bundle_nodbg_end ()

Friends
template<bool , bool , bool , bool , bool , bool >
class	defusechain_iterator
template<bool , bool , bool , bool , bool , bool >
class	defusechain_instr_iterator

Detailed Description

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.

Definition at line 53 of file MachineRegisterInfo.h.

Member Typedef Documentation

def_bundle_iterator

using llvm::MachineRegisterInfo::def_bundle_iterator = defusechain_instr_iterator<false, true, false, false, false, true>

def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.

Definition at line 413 of file MachineRegisterInfo.h.

def_instr_iterator

using llvm::MachineRegisterInfo::def_instr_iterator = defusechain_instr_iterator<false, true, false, false, true, false>

def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.

Definition at line 397 of file MachineRegisterInfo.h.

def_iterator

using llvm::MachineRegisterInfo::def_iterator = defusechain_iterator<false, true, false, true, false, false>

def_iterator/def_begin/def_end - Walk all defs of the specified register.

Definition at line 384 of file MachineRegisterInfo.h.

livein_iterator

using llvm::MachineRegisterInfo::livein_iterator = std::vector<std::pair<unsigned,unsigned> >::const_iterator

Definition at line 917 of file MachineRegisterInfo.h.

reg_bundle_iterator

using llvm::MachineRegisterInfo::reg_bundle_iterator = defusechain_instr_iterator<true, true, false, false, false, true>

reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.

Definition at line 310 of file MachineRegisterInfo.h.

reg_bundle_nodbg_iterator

using llvm::MachineRegisterInfo::reg_bundle_nodbg_iterator = defusechain_instr_iterator<true, true, true, false, false, true>

reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 363 of file MachineRegisterInfo.h.

reg_instr_iterator

using llvm::MachineRegisterInfo::reg_instr_iterator = defusechain_instr_iterator<true, true, false, false, true, false>

reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.

Definition at line 294 of file MachineRegisterInfo.h.

reg_instr_nodbg_iterator

using llvm::MachineRegisterInfo::reg_instr_nodbg_iterator = defusechain_instr_iterator<true, true, true, false, true, false>

reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 346 of file MachineRegisterInfo.h.

reg_iterator

using llvm::MachineRegisterInfo::reg_iterator = defusechain_iterator<true, true, false, true, false, false>

reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.

Definition at line 281 of file MachineRegisterInfo.h.

reg_nodbg_iterator

using llvm::MachineRegisterInfo::reg_nodbg_iterator = defusechain_iterator<true, true, true, true, false, false>

reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.

Definition at line 329 of file MachineRegisterInfo.h.

use_bundle_iterator

using llvm::MachineRegisterInfo::use_bundle_iterator = defusechain_instr_iterator<true, false, false, false, false, true>

use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.

Definition at line 483 of file MachineRegisterInfo.h.

use_bundle_nodbg_iterator

using llvm::MachineRegisterInfo::use_bundle_nodbg_iterator = defusechain_instr_iterator<true, false, true, false, false, true>

use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 545 of file MachineRegisterInfo.h.

use_instr_iterator

using llvm::MachineRegisterInfo::use_instr_iterator = defusechain_instr_iterator<true, false, false, false, true, false>

use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.

Definition at line 467 of file MachineRegisterInfo.h.

use_instr_nodbg_iterator

using llvm::MachineRegisterInfo::use_instr_nodbg_iterator = defusechain_instr_iterator<true, false, true, false, true, false>

use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 528 of file MachineRegisterInfo.h.

use_iterator

using llvm::MachineRegisterInfo::use_iterator = defusechain_iterator<true, false, false, true, false, false>

use_iterator/use_begin/use_end - Walk all uses of the specified register.

Definition at line 454 of file MachineRegisterInfo.h.

use_nodbg_iterator

using llvm::MachineRegisterInfo::use_nodbg_iterator = defusechain_iterator<true, false, true, true, false, false>

use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.

Definition at line 511 of file MachineRegisterInfo.h.

Constructor & Destructor Documentation

MachineRegisterInfo() [1/2]

MachineRegisterInfo::MachineRegisterInfo ( MachineFunction *  MF )

explicit

Definition at line 45 of file MachineRegisterInfo.cpp.

References llvm::MCRegisterInfo::getNumRegs(), getTargetRegisterInfo(), and llvm::BitVector::resize().

MachineRegisterInfo() [2/2]

llvm::MachineRegisterInfo::MachineRegisterInfo ( const MachineRegisterInfo &  )

delete

Member Function Documentation

addLiveIn()

void llvm::MachineRegisterInfo::addLiveIn ( unsigned  Reg, unsigned  vreg = 0  )

inline

addLiveIn - Add the specified register as a live-in.

Note that it is an error to add the same register to the same set more than once.

Definition at line 910 of file MachineRegisterInfo.h.

Referenced by llvm::MachineFunction::addLiveIn(), addLiveIn(), AnalyzeReturnValues(), CallingConvSupported(), CC_Lanai32_VarArg(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), getAllSGPRs(), lowerCallResult(), LowerCallResult(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::BPFTargetLowering::LowerOperation(), llvm::MIRParserImpl::parseRegisterInfo(), unpackF64OnRV32DSoftABI(), and unpackFromRegLoc().

addPhysRegsUsedFromRegMask()

void llvm::MachineRegisterInfo::addPhysRegsUsedFromRegMask ( const uint32_t *  RegMask )

inline

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.

This corresponds to the bit mask attached to register mask operands.

Definition at line 832 of file MachineRegisterInfo.h.

References llvm::BitVector::setBitsNotInMask().

Referenced by INITIALIZE_PASS(), and llvm::MIRParserImpl::setupRegisterInfo().

addRegAllocationHint()

void llvm::MachineRegisterInfo::addRegAllocationHint ( unsigned  VReg, unsigned  PrefReg  )

inline

addRegAllocationHint - Add a register allocation hint to the hints vector for VReg.

Definition at line 767 of file MachineRegisterInfo.h.

References assert(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by llvm::VirtRegAuxInfo::weightCalcHelper().

addRegOperandToUseList()

void MachineRegisterInfo::addRegOperandToUseList

(

MachineOperand *

MO

)

Add MO to the linked list of operands for its register.

Definition at line 266 of file MachineRegisterInfo.cpp.

References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), and llvm::MachineOperand::Reg.

Referenced by llvm::MachineInstr::addImplicitDefUseOperands(), llvm::MachineInstr::addOperand(), llvm::MachineOperand::ChangeToRegister(), isUpdatedCSRsInitialized(), llvm::MachineOperand::setIsDef(), and llvm::MachineOperand::setReg().

canReserveReg()

bool llvm::MachineRegisterInfo::canReserveReg ( unsigned  PhysReg ) const

inline

canReserveReg - Returns true if PhysReg can be used as a reserved register.

Any register can be reserved before freezeReservedRegs() is called.

Definition at line 863 of file MachineRegisterInfo.h.

References reservedRegsFrozen(), and llvm::BitVector::test().

Referenced by llvm::MipsRegisterInfo::canRealignStack(), llvm::X86RegisterInfo::canRealignStack(), and llvm::ARMBaseRegisterInfo::canRealignStack().

clearKillFlags()

void MachineRegisterInfo::clearKillFlags

(

unsigned

Reg

)

const

clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.

This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.

Definition at line 431 of file MachineRegisterInfo.cpp.

References use_operands().

Referenced by emitIndirectDst(), llvm::HexagonInstrInfo::expandPostRAPseudo(), findSRegBaseAndIndex(), getNewSource(), hoistAndMergeSGPRInits(), INITIALIZE_PASS(), insertPHI(), llvm::AArch64InstrInfo::insertSelect(), isCallerPreservedOrConstPhysReg(), isCopyFeedingInvariantStore(), isDefInSubRange(), loadSRsrcFromVGPR(), llvm::SIInstrInfo::moveToVALU(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_nodbg_empty().

clearSimpleHint()

void llvm::MachineRegisterInfo::clearSimpleHint ( unsigned  VReg )

inline

Definition at line 778 of file MachineRegisterInfo.h.

References assert(), llvm::IndexedMap< T, ToIndexT >::clear(), and first.

Referenced by llvm::VirtRegAuxInfo::weightCalcHelper().

clearVirtRegs()

void MachineRegisterInfo::clearVirtRegs

(

)

clearVirtRegs - Remove all virtual registers (after physreg assignment).

Definition at line 203 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), I, llvm::TargetRegisterInfo::index2VirtReg(), llvm_unreachable, Reg, second, and verifyUseList().

Referenced by getNumVirtRegs(), llvm::RISCVInstrInfo::insertIndirectBranch(), llvm::SIInstrInfo::insertIndirectBranch(), and llvm::scavengeFrameVirtualRegs().

clearVirtRegTypes()

void MachineRegisterInfo::clearVirtRegTypes

(

)

Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).

Definition at line 200 of file MachineRegisterInfo.cpp.

References llvm::IndexedMap< T, ToIndexT >::clear().

Referenced by getType(), and llvm::InstructionSelect::runOnMachineFunction().

cloneVirtualRegister()

unsigned MachineRegisterInfo::cloneVirtualRegister	(	unsigned	VReg,
		StringRef	Name = ""
	)

Create and return a new virtual register in the function with the same attributes as the given register.

Definition at line 173 of file MachineRegisterInfo.cpp.

References createIncompleteVirtualRegister(), getType(), llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister(), Reg, and setType().

Referenced by setRegClassOrRegBank().

constrainRegAttrs()

bool MachineRegisterInfo::constrainRegAttrs	(	unsigned	Reg,
		unsigned	ConstrainingReg,
		unsigned	MinNumRegs = 0
	)

Constrain the register class or the register bank of the virtual register Reg (and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type).

Do nothing if any of the attributes (classes, banks, or low-level types) of the registers are deemed incompatible, or if the resulting register will have a class smaller than before and of size less than MinNumRegs. Return true if such register attributes exist, false otherwise.

Note

Use this method instead of constrainRegClass and RegisterBankInfo::constrainGenericRegister everywhere but SelectionDAG ISel / FastISel and GlobalISel's InstructionSelect pass respectively.

Definition at line 93 of file MachineRegisterInfo.cpp.

References constrainRegClass(), getRegClassOrRegBank(), getType(), llvm::LLT::isValid(), setRegClassOrRegBank(), and setType().

Referenced by isCallerPreservedOrConstPhysReg(), llvm::CombinerHelper::replaceRegWith(), and setRegClassOrRegBank().

constrainRegClass()

const TargetRegisterClass * MachineRegisterInfo::constrainRegClass	(	unsigned	Reg,
		const TargetRegisterClass *	RC,
		unsigned	MinNumRegs = 0
	)

constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.

Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.

Note

Assumes that the register has a register class assigned. Use RegisterBankInfo::constrainGenericRegister in GlobalISel's InstructionSelect pass and constrainRegAttrs in every other pass, including non-select passes of GlobalISel, instead.

Definition at line 86 of file MachineRegisterInfo.cpp.

References constrainRegClass(), and getRegClass().

Referenced by llvm::MachineBasicBlock::addLiveIn(), addSegmentsWithValNo(), llvm::X86InstrInfo::classifyLEAReg(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::FastISel::constrainOperandRegClass(), constrainRegAttrs(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), genFusedMultiply(), genMaddR(), getRegsUsedByPHIs(), INITIALIZE_PASS(), llvm::AArch64InstrInfo::insertSelect(), llvm::SystemZInstrInfo::insertSelect(), insertUndefLaneMask(), isCopyFeedingInvariantStore(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::AArch64RegisterInfo::materializeFrameBaseRegister(), llvm::PPCRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseInstrInfo::optimizeSelect(), parseCond(), llvm::TargetInstrInfo::reassociateOps(), llvm::R600SchedStrategy::releaseBottomNode(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::UnreachableBlockElimPass::run(), llvm::SelectionDAGISel::runOnMachineFunction(), setRegClassOrRegBank(), llvm::Thumb2InstrInfo::storeRegToStackSlot(), llvm::AArch64InstrInfo::storeRegToStackSlot(), llvm::SIInstrInfo::storeRegToStackSlot(), llvm::TailDuplicator::tailDuplicateAndUpdate(), UpdateOperandRegClass(), and updateOperandRegConstraints().

createGenericVirtualRegister()

unsigned MachineRegisterInfo::createGenericVirtualRegister	(	LLT	Ty,
		StringRef	Name = ""
	)

Create and return a new generic virtual register with low-level type Ty.

Definition at line 189 of file MachineRegisterInfo.cpp.

References createIncompleteVirtualRegister(), llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister(), Reg, and setType().

Referenced by llvm::AArch64CallLowering::AArch64CallLowering(), llvm::DstOp::addDefToMIB(), llvm::MachineIRBuilder::buildSequence(), canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), llvm::RegisterBankInfo::OperandsMapper::createVRegs(), llvm::InstructionSelector::executeMatchTable(), getType(), isSupportedType(), llvm::AArch64LegalizerInfo::legalizeCustom(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::legalizeInstrStep(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::X86CallLowering::lowerReturn(), llvm::ARMCallLowering::lowerReturn(), llvm::MachineIRBuilder::materializeGEP(), llvm::LegalizerHelper::narrowScalar(), llvm::Localizer::runOnMachineFunction(), and llvm::X86CallLowering::X86CallLowering().

createIncompleteVirtualRegister()

unsigned MachineRegisterInfo::createIncompleteVirtualRegister

(

StringRef

Name = ""

)

Creates a new virtual register that has no register class, register bank or size assigned yet.

This is only allowed to be used temporarily while constructing machine instructions. Most operations are undefined on an incomplete register until one of setRegClass(), setRegBank() or setSize() has been called on it.

Definition at line 147 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), llvm::TargetRegisterInfo::index2VirtReg(), insertVRegByName(), and Reg.

Referenced by cloneVirtualRegister(), createGenericVirtualRegister(), createVirtualRegister(), doCandidateWalk(), getType(), llvm::PerFunctionMIParsingState::getVRegInfo(), and llvm::PerFunctionMIParsingState::getVRegInfoNamed().

createVirtualRegister()

unsigned MachineRegisterInfo::createVirtualRegister	(	const TargetRegisterClass *	RegClass,
		StringRef	Name = ""
	)

createVirtualRegister - Create and return a new virtual register in the function with the specified register class.

Definition at line 159 of file MachineRegisterInfo.cpp.

References assert(), createIncompleteVirtualRegister(), llvm::TargetRegisterClass::isAllocatable(), llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister(), and Reg.

Referenced by llvm::DstOp::addDefToMIB(), llvm::MachineBasicBlock::addLiveIn(), llvm::MachineFunction::addLiveIn(), addLiveIn(), allPhiOperandsUndefined(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::analyzeArguments(), AnalyzeReturnValues(), llvm::HexagonFrameLowering::assignCalleeSavedSpillSlots(), buildEXP(), llvm::SIInstrInfo::buildExtractSubReg(), CallingConvSupported(), canTurnIntoCOPY(), CC_Lanai32_VarArg(), changeFCMPPredToAArch64CC(), llvm::X86InstrInfo::classifyLEAReg(), llvm::constrainRegToClass(), containsNewBackedge(), ConvertImplicitDefToConstZero(), llvm::SIInstrInfo::convertNonUniformIfRegion(), llvm::SIInstrInfo::convertNonUniformLoopRegion(), createBBSelectReg(), createLaneMaskReg(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), createPHIsForCMOVsInSinkBB(), createPHIsForSelects(), llvm::FunctionLoweringInfo::CreateReg(), llvm::FastISel::createResultReg(), llvm::createSIAddIMGInitPass(), createSwiftErrorEntriesInEntryBlock(), llvm::HexagonInstrInfo::createVR(), doCandidateWalk(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::RISCVRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), emitClzero(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), emitIndirectDst(), emitIndirectSrc(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitLoadM0FromVGPRLoop(), emitLoadSRsrcFromVGPRLoop(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), emitPostSt(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), emitXBegin(), extractRsrcPtr(), findMatchingInlineAsmOperand(), findSingleRegDef(), findStartOfTree(), fixupRegionExits(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldVGPRCopyIntoRegSequence(), forceReg(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::SIInstrInfo::getAddNoCarry(), getARClassRegisterMask(), llvm::FunctionLoweringInfo::getCatchPadExceptionPointerVReg(), getConstant(), getDPPOp(), llvm::ARMTargetLowering::getExceptionSelectorRegister(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::LanaiMachineFunctionInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), getLoadStoreOffsetAlign(), getMappedOp(), getNewSource(), llvm::FunctionLoweringInfo::getOrCreateSwiftErrorVReg(), llvm::FunctionLoweringInfo::getOrCreateSwiftErrorVRegDefAt(), getRegClassFromGRPhysReg(), GetRegistersForValue(), getRegsUsedByPHIs(), getRetpolineSymbol(), llvm::X86InstrInfo::getSerializableDirectMachineOperandTargetFlags(), llvm::BPFTargetLowering::getTargetNodeName(), llvm::RISCVFrameLowering::hasFP(), INITIALIZE_PASS(), llvm::X86FrameLowering::inlineStackProbe(), llvm::SITargetLowering::insertCopiesSplitCSR(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), llvm::PPCTargetLowering::insertCopiesSplitCSR(), llvm::SIInstrInfo::insertEQ(), llvm::RISCVInstrInfo::insertIndirectBranch(), llvm::SIInstrInfo::insertIndirectBranch(), llvm::SIInstrInfo::insertNE(), InsertNewDef(), insertPHI(), llvm::SystemZInstrInfo::insertSelect(), llvm::SIInstrInfo::insertSelect(), llvm::SIInstrInfo::insertVectorSelect(), isCopyFeedingInvariantStore(), isFunctionEntryBlock(), isImmValidForOpcode(), llvm::X86TargetLowering::isIntDivCheap(), isSortedByValueNo(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::MipsSEInstrInfo::loadImmediate(), loadM0FromVGPR(), loadSRsrcFromVGPR(), lowerCallResult(), LowerCallResult(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), LowerFPToInt(), llvm::BPFTargetLowering::LowerOperation(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), llvm::SIRegisterInfo::materializeFrameBaseRegister(), MaybeRewriteToDrop(), MoveAndTeeForMultiUse(), MoveForSingleUse(), llvm::SIInstrInfo::moveToVALU(), parseCond(), ProcessSourceNode(), propagateSwiftErrorVRegs(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), llvm::TargetInstrInfo::reassociateOps(), RematerializeCheapDef(), removeExternalCFGEdges(), llvm::ARMTargetLowering::ReplaceNodeResults(), llvm::SIRegisterInfo::restoreSGPR(), llvm::MachinePipeliner::runOnMachineFunction(), llvm::AVRDynAllocaSR::runOnMachineFunction(), selectCopy(), selectFP16CopyFromGPR32(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), setM0ToIndexFromSGPR(), setRegClassOrRegBank(), llvm::SIRegisterInfo::spillSGPR(), tryToElideArgumentCopy(), unpackF64OnRV32DSoftABI(), UnpackFromArgumentSlot(), unpackFromRegLoc(), and updateOperand().

def_begin()

def_iterator llvm::MachineRegisterInfo::def_begin ( unsigned  RegNo ) const

inline

Definition at line 385 of file MachineRegisterInfo.h.

Referenced by createBBSelectReg(), def_empty(), def_operands(), doCandidateWalk(), hasOneDef(), isKilled(), isPhysRegModified(), isVirtualRegisterOperand(), matchPair(), MustSaveLR(), removeExternalCFGEdges(), scavengeVReg(), and llvm::MachineTraceMetrics::Ensemble::verify().

def_bundle_begin()

def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_begin ( unsigned  RegNo ) const

inline

Definition at line 414 of file MachineRegisterInfo.h.

Referenced by def_bundles().

def_bundle_end()

static def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_end ( )

inlinestatic

Definition at line 417 of file MachineRegisterInfo.h.

Referenced by def_bundles().

def_bundles()

iterator_range<def_bundle_iterator> llvm::MachineRegisterInfo::def_bundles ( unsigned  Reg ) const

inline

Definition at line 421 of file MachineRegisterInfo.h.

References def_bundle_begin(), def_bundle_end(), and llvm::make_range().

def_empty()

bool llvm::MachineRegisterInfo::def_empty ( unsigned  RegNo ) const

inline

def_empty - Return true if there are no instructions defining the specified register (it may be live-in).

Definition at line 427 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::createRegUsageInfoCollector(), getUniqueVRegDef(), isConstantPhysReg(), isSSA(), matchPair(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::MachineOperand::print(), llvm::printRegClassOrBank(), and llvm::InstructionSelect::runOnMachineFunction().

def_end()

static def_iterator llvm::MachineRegisterInfo::def_end ( )

inlinestatic

Definition at line 388 of file MachineRegisterInfo.h.

Referenced by createBBSelectReg(), def_empty(), def_operands(), doCandidateWalk(), hasOneDef(), isKilled(), isPhysRegModified(), isVirtualRegisterOperand(), matchPair(), MustSaveLR(), removeExternalCFGEdges(), and scavengeVReg().

def_instr_begin()

def_instr_iterator llvm::MachineRegisterInfo::def_instr_begin ( unsigned  RegNo ) const

inline

Definition at line 398 of file MachineRegisterInfo.h.

Referenced by def_instructions(), getUniqueVRegDef(), getVRegDef(), isDefBetween(), isImplicitlyDef(), regIsPICBase(), and llvm::InstructionSelect::runOnMachineFunction().

def_instr_end()

static def_instr_iterator llvm::MachineRegisterInfo::def_instr_end ( )

inlinestatic

Definition at line 401 of file MachineRegisterInfo.h.

Referenced by def_instructions(), getUniqueVRegDef(), getVRegDef(), isDefBetween(), isImplicitlyDef(), and regIsPICBase().

def_instructions()

iterator_range<def_instr_iterator> llvm::MachineRegisterInfo::def_instructions ( unsigned  Reg ) const

inline

Definition at line 406 of file MachineRegisterInfo.h.

References def_instr_begin(), def_instr_end(), and llvm::make_range().

Referenced by getSingleDef(), HasArgumentDef(), hoistAndMergeSGPRInits(), and isImplicitlyDefined().

def_operands()

iterator_range<def_iterator> llvm::MachineRegisterInfo::def_operands ( unsigned  Reg ) const

inline

Definition at line 390 of file MachineRegisterInfo.h.

References def_begin(), def_end(), and llvm::make_range().

Referenced by llvm::LiveInterval::computeSubRangeUndefs(), llvm::LiveRangeCalc::createDeadDefs(), findSingleRegDef(), and hasTiedDef().

disableCalleeSavedRegister()

void MachineRegisterInfo::disableCalleeSavedRegister

(

unsigned

Reg

)

Disables the register from the list of CSRs.

I.e. the register will not appear as part of the CSR mask.

See also

UpdatedCalleeSavedRegs.

Definition at line 607 of file MachineRegisterInfo.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::SmallVectorImpl< T >::erase(), llvm::TargetRegisterInfo::getCalleeSavedRegs(), getTargetRegisterInfo(), I, llvm::MCRegAliasIterator::isValid(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::sys::fs::remove(), and TRI.

Referenced by isSortedByValueNo(), isUpdatedCSRsInitialized(), and Passv64i1ArgInRegs().

dumpUses()

LLVM_DUMP_METHOD void MachineRegisterInfo::dumpUses

(

unsigned

RegNo

)

const

Definition at line 501 of file MachineRegisterInfo.cpp.

References I, and use_instructions().

Referenced by use_nodbg_empty().

EmitLiveInCopies()

void MachineRegisterInfo::EmitLiveInCopies	(	MachineBasicBlock *	EntryMBB,
		const TargetRegisterInfo &	TRI,
		const TargetInstrInfo &	TII
	)

EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.

Definition at line 464 of file MachineRegisterInfo.cpp.

References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), first, llvm::MCInstrInfo::get(), second, and use_nodbg_empty().

Referenced by liveins(), and llvm::SelectionDAGISel::runOnMachineFunction().

freezeReservedRegs()

void MachineRegisterInfo::freezeReservedRegs

(

const MachineFunction &

MF

)

freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.

Definition at line 507 of file MachineRegisterInfo.cpp.

References assert(), llvm::MCRegisterInfo::getNumRegs(), llvm::TargetRegisterInfo::getReservedRegs(), getTargetRegisterInfo(), and llvm::BitVector::size().

Referenced by llvm::TargetLoweringBase::finalizeLowering(), getUsedPhysRegsMask(), llvm::RegAllocBase::init(), normalizePBQPSpillWeight(), and llvm::MIRParserImpl::setupRegisterInfo().

getCalleeSavedRegs()

const MCPhysReg * MachineRegisterInfo::getCalleeSavedRegs

(

)

const

Returns list of callee saved registers.

The function returns the updated CSR list (after taking into account registers that are disabled from the CSR list).

Definition at line 631 of file MachineRegisterInfo.cpp.

References llvm::SmallVectorTemplateCommon< T, typename >::data(), llvm::TargetRegisterInfo::getCalleeSavedRegs(), and getTargetRegisterInfo().

Referenced by addCalleeSavedRegs(), assignCalleeSavedSpillSlots(), llvm::MIRPrinter::convert(), llvm::RISCVFrameLowering::determineCalleeSaves(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::TargetFrameLowering::determineCalleeSaves(), findScratchNonCalleeSaveRegister(), llvm::MachineFrameInfo::getPristineRegs(), isACalleeSavedRegister(), isUpdatedCSRsInitialized(), llvm::RegisterClassInfo::runOnMachineFunction(), llvm::X86MachineFunctionInfo::setRestoreBasePointer(), llvm::CriticalAntiDepBreaker::StartBlock(), and llvm::AggressiveAntiDepBreaker::StartBlock().

getLiveInPhysReg()

unsigned MachineRegisterInfo::getLiveInPhysReg

(

unsigned

VReg

)

const

getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.

Definition at line 445 of file MachineRegisterInfo.cpp.

References E, I, livein_begin(), and livein_end().

Referenced by getUnderlyingArgReg(), liveins(), and llvm::TargetLowering::parametersInCSRMatch().

getLiveInVirtReg()

unsigned MachineRegisterInfo::getLiveInVirtReg

(

unsigned

PReg

)

const

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.

Definition at line 454 of file MachineRegisterInfo.cpp.

References E, I, livein_begin(), and livein_end().

Referenced by llvm::MachineFunction::addLiveIn(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), EnsureStackAlignment(), getConstant(), llvm::SITargetLowering::isTypeDesirableForOp(), and liveins().

getMaxLaneMaskForVReg()

LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg

(

unsigned

Reg

)

const

Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg.

Definition at line 493 of file MachineRegisterInfo.cpp.

References assert(), llvm::TargetRegisterClass::getLaneMask(), getRegClass(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by addSegmentsWithValNo(), llvm::LiveRangeCalc::calculate(), llvm::LiveInterval::computeSubRangeUndefs(), definesFullReg(), llvm::SplitEditor::dump(), llvm::SIRegisterInfo::findReachingDef(), getDefRegMask(), getLanesWithProperty(), llvm::getLiveLaneMask(), getLiveLanesAt(), getUsedRegMask(), llvm::GCNRegPressure::inc(), isTerminalReg(), liveins(), matchPair(), llvm::LiveIntervals::HMEditor::updateAllRanges(), and llvm::LiveInterval::verify().

getNumVirtRegs()

unsigned llvm::MachineRegisterInfo::getNumVirtRegs ( ) const

inline

getNumVirtRegs - Return the number of virtual registers created.

Definition at line 750 of file MachineRegisterInfo.h.

References clearVirtRegs(), and llvm::IndexedMap< T, ToIndexT >::size().

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::ScheduleDAGInstrs::buildSchedGraph(), clearVirtRegs(), computeWeight(), llvm::MIRPrinter::convert(), createIncompleteVirtualRegister(), findStartOfTree(), llvm::getLiveRegs(), llvm::VirtRegMap::grow(), HasArgumentDef(), llvm::RegAllocBase::init(), llvm::LiveRegSet::init(), INITIALIZE_PASS(), llvm::WebAssemblyFunctionInfo::initWARegs(), isSSA(), matchPair(), llvm::VirtRegMap::print(), llvm::LiveIntervals::print(), llvm::GCNRPTracker::printLiveRegs(), llvm::printLivesAt(), llvm::InstructionSelect::runOnMachineFunction(), llvm::LiveIntervals::runOnMachineFunction(), llvm::scavengeFrameVirtualRegs(), scavengeFrameVirtualRegsInBlock(), llvm::MachineBasicBlock::SplitCriticalEdge(), llvm::MachineFunction::verify(), and verifyUseLists().

getPressureSets()

PSetIterator llvm::MachineRegisterInfo::getPressureSets ( unsigned  RegUnit ) const

inline

Get an iterator over the pressure sets affected by the given physical or virtual register.

If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).

Definition at line 1191 of file MachineRegisterInfo.h.

Referenced by llvm::PressureDiff::addPressureChange(), decreaseSetPressure(), llvm::GCNRegPressure::inc(), increaseSetPressure(), llvm::PSetIterator::operator++(), llvm::SIScheduleBlockScheduler::SIScheduleBlockScheduler(), and use_nodbg_empty().

getRegAllocationHint()

std::pair<unsigned, unsigned> llvm::MachineRegisterInfo::getRegAllocationHint ( unsigned  VReg ) const

inline

getRegAllocationHint - Return the register allocation hint for the specified virtual register.

If there are many hints, this returns the one with the greatest weight.

Definition at line 788 of file MachineRegisterInfo.h.

References assert(), llvm::TargetRegisterInfo::isVirtualRegister(), and llvm::IndexedMap< T, ToIndexT >::size().

Referenced by llvm::ARMBaseRegisterInfo::getRegAllocationHints(), getSimpleHint(), llvm::VirtRegMap::hasKnownPreference(), llvm::ARMBaseRegisterInfo::updateRegAllocHint(), and llvm::VirtRegAuxInfo::weightCalcHelper().

getRegAllocationHints()

const std::pair<unsigned, SmallVector<unsigned, 4> >& llvm::MachineRegisterInfo::getRegAllocationHints ( unsigned  VReg ) const

inline

getRegAllocationHints - Return a reference to the vector of all register allocation hints for VReg.

Definition at line 806 of file MachineRegisterInfo.h.

References assert(), isPhysRegModified(), isPhysRegUsed(), llvm::TargetRegisterInfo::isVirtualRegister(), and markUsesInDebugValueAsUndef().

Referenced by llvm::TargetRegisterInfo::getRegAllocationHints().

getRegBankOrNull()

const RegisterBank* llvm::MachineRegisterInfo::getRegBankOrNull ( unsigned  Reg ) const

inline

Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class.

Note

It is possible to get the register bank from the register class via RegisterBankInfo::getRegBankFromRegClass.

Definition at line 653 of file MachineRegisterInfo.h.

References llvm::PointerUnion< PT1, PT2 >::dyn_cast(), and Reg.

Referenced by buildEXP(), llvm::SIRegisterInfo::getConstrainedRegClassForOperand(), matchPair(), and llvm::printRegClassOrBank().

getRegClass()

const TargetRegisterClass* llvm::MachineRegisterInfo::getRegClass ( unsigned  Reg ) const

inline

Return the register class of the specified virtual register.

This shouldn't be used directly unless Reg has a register class.

See also

getRegClassOrNull when this might happen.

Definition at line 627 of file MachineRegisterInfo.h.

References assert(), first, and Reg.

Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::MachineFunction::addLiveIn(), addSegmentsWithValNo(), llvm::RegAllocBase::allocatePhysRegs(), llvm::AllocationOrder::AllocationOrder(), allPhiOperandsUndefined(), llvm::VirtRegMap::assignVirt2StackSlot(), canFoldCopy(), canFoldIntoCSel(), llvm::AArch64InstrInfo::canInsertSelect(), llvm::SystemZInstrInfo::canInsertSelect(), llvm::SIInstrInfo::canInsertSelect(), llvm::PPCInstrInfo::canInsertSelect(), llvm::X86InstrInfo::canInsertSelect(), llvm::X86InstrInfo::classifyLEAReg(), computeWeight(), constrainRegClass(), containsNewBackedge(), ConvertImplicitDefToConstZero(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), llvm::NVPTXInstrInfo::copyPhysReg(), createPHIsForCMOVsInSinkBB(), createPHIsForSelects(), llvm::createR600ISelDag(), definesFullReg(), llvm::HexagonFrameLowering::determineCalleeSaves(), llvm::SplitEditor::dump(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), emitIndirectDst(), emitIndirectSrc(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), emitXBegin(), llvm::HexagonEvaluator::evaluate(), llvm::HexagonBlockRanges::expandToSubRegs(), llvm::FastISel::fastEmitInst_extractsubreg(), findSRegBaseAndIndex(), findStartOfTree(), fixupRegionExits(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), llvm::BitTracker::MachineEvaluator::getCell(), getCopyRegClasses(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getMaxLaneMaskForVReg(), getNewSource(), llvm::PPCInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), getRC32(), llvm::SystemZRegisterInfo::getRegAllocationHints(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), llvm::SIRegisterInfo::getRegClassForReg(), llvm::TargetRegisterInfo::getRegSizeInBits(), getRegsUsedByPHIs(), getRegTy(), llvm::WebAssemblyAsmPrinter::getRegType(), getRetpolineSymbol(), GetVRegRenameMap(), hasVGPROperands(), llvm::MachineSSAUpdater::Initialize(), INITIALIZE_PASS(), insertPHI(), llvm::SystemZInstrInfo::insertSelect(), llvm::SIInstrInfo::insertSelect(), llvm::X86InstrInfo::insertSelect(), insertUndefLaneMask(), llvm::SIInstrInfo::insertVectorSelect(), isACalleeSavedRegister(), isCopyFeedingInvariantStore(), isCrossCopy(), isEqual(), isFPR64(), isFunctionEntryBlock(), isImmValidForOpcode(), llvm::SIInstrInfo::isLegalRegOperand(), isNonFoldablePartialRegisterLoad(), llvm::isOfRegClass(), isOperandKill(), llvm::SIRegisterInfo::isSGPRReg(), isTerminalReg(), isVirtualRegisterOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::WebAssemblyMCInstLower::Lower(), LowerFPToInt(), llvm::HexagonEvaluator::mask(), llvm::SIInstrInfo::materializeImmediate(), MaybeRewriteToDrop(), MoveAndTeeForMultiUse(), MoveForSingleUse(), llvm::SIInstrInfo::moveToVALU(), optimizeCall(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), phiHasVGPROperands(), llvm::VirtRegMap::print(), PrintNodeInfo(), llvm::printRegClassOrBank(), propagateLocalCopies(), llvm::PSetIterator::PSetIterator(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), recomputeRegClass(), llvm::R600SchedStrategy::releaseBottomNode(), RematerializeCheapDef(), removeExternalCFGEdges(), llvm::UnreachableBlockElimPass::run(), runOnBasicBlock(), llvm::InstructionSelect::runOnMachineFunction(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::MachinePipeliner::runOnMachineFunction(), scavengeVReg(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), setM0ToIndexFromSGPR(), llvm::CoalescerPair::setRegisters(), llvm::SIInstrInfo::shouldClusterMemOps(), shouldTrackSubRegLiveness(), llvm::LiveDebugVariables::splitRegister(), swapMIOperands(), llvm::TailDuplicator::tailDuplicateAndUpdate(), tryChangeVGPRtoSGPRinCopy(), updateOperand(), UpdateOperandRegClass(), and llvm::SIInstrInfo::usesConstantBus().

getRegClassOrNull()

const TargetRegisterClass* llvm::MachineRegisterInfo::getRegClassOrNull ( unsigned  Reg ) const

inline

Return the register class of Reg, or null if Reg has not been assigned a register class yet.

Note

A null register class can only happen when these two conditions are met:

1. Generic virtual registers are created.
2. The machine function has not completely been through the instruction selection process. None of this condition is possible without GlobalISel for now. In other words, if GlobalISel is not used or if the query happens after the select pass, using getRegClass is safe.

Definition at line 644 of file MachineRegisterInfo.h.

References llvm::PointerUnion< PT1, PT2 >::dyn_cast(), and Reg.

Referenced by canTurnIntoCOPY(), getRegClassFromGRPhysReg(), matchPair(), llvm::printRegClassOrBank(), and llvm::InstructionSelect::runOnMachineFunction().

getRegClassOrRegBank()

const RegClassOrRegBank& llvm::MachineRegisterInfo::getRegClassOrRegBank ( unsigned  Reg ) const

inline

Return the register bank or register class of Reg.

Note

Before the register bank gets assigned (i.e., before the RegBankSelect pass) Reg may not have either.

Definition at line 661 of file MachineRegisterInfo.h.

References Reg, setRegBank(), and setRegClass().

Referenced by changeFCMPPredToAArch64CC(), llvm::RegisterBankInfo::constrainGenericRegister(), constrainRegAttrs(), llvm::RegisterBankInfo::getRegBank(), llvm::Localizer::runOnMachineFunction(), and selectCopy().

getReservedRegs()

const BitVector& llvm::MachineRegisterInfo::getReservedRegs ( ) const

inline

getReservedRegs - Returns a reference to the frozen set of reserved registers.

This method should always be preferred to calling TRI::getReservedRegs() when possible.

Definition at line 870 of file MachineRegisterInfo.h.

References assert(), and reservedRegsFrozen().

Referenced by INITIALIZE_PASS(), isReserved(), llvm::RegisterClassInfo::runOnMachineFunction(), and llvm::MachineFunction::verify().

getSimpleHint()

unsigned llvm::MachineRegisterInfo::getSimpleHint ( unsigned  VReg ) const

inline

getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.

Definition at line 797 of file MachineRegisterInfo.h.

References assert(), getRegAllocationHint(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by llvm::MIRPrinter::convert(), llvm::VirtRegMap::hasPreferredPhys(), and isACalleeSavedRegister().

getTargetRegisterInfo()

const TargetRegisterInfo* llvm::MachineRegisterInfo::getTargetRegisterInfo ( ) const

inline

Definition at line 154 of file MachineRegisterInfo.h.

References llvm::TargetSubtargetInfo::getRegisterInfo(), and llvm::MachineFunction::getSubtarget().

Referenced by llvm::addLiveIns(), llvm::LiveRangeCalc::calculate(), llvm::X86InstrInfo::classifyLEAReg(), llvm::computeLiveIns(), llvm::LiveInterval::computeSubRangeUndefs(), constrainRegClass(), createBBSelectReg(), llvm::LiveRangeCalc::createDeadDefs(), disableCalleeSavedRegister(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), findSurvivorBackwards(), findUseBetween(), freezeReservedRegs(), getCalleeSavedRegs(), getDefRegMask(), getUsedRegMask(), llvm::LiveRegSet::init(), llvm::X86InstrInfo::insertSelect(), isAllocatable(), isCallerPreservedOrConstPhysReg(), isConstantPhysReg(), isCrossCopy(), isEqual(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::isOfRegClass(), isPhysRegModified(), isPhysRegUsed(), isReservedRegUnit(), llvm::GCNUpwardRPTracker::isValid(), isVirtualRegisterOperand(), llvm::X86CallLowering::lowerReturn(), MachineRegisterInfo(), llvm::MIPrinter::print(), llvm::GCNRPTracker::printLiveRegs(), llvm::printLivesAt(), PrintNodeInfo(), llvm::PSetIterator::PSetIterator(), llvm::recomputeLivenessFlags(), recomputeRegClass(), removeExternalCFGEdges(), replaceRegWith(), scavengeFrameVirtualRegsInBlock(), scavengeVReg(), llvm::ARMBaseRegisterInfo::shouldCoalesce(), false::Chain::str(), llvm::tryFoldSPUpdateIntoPushPop(), updateOperandRegConstraints(), verifyUseList(), verifyUseLists(), and llvm::X86CallLowering::X86CallLowering().

getType()

LLT llvm::MachineRegisterInfo::getType ( unsigned  Reg ) const

inline

Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.

Definition at line 725 of file MachineRegisterInfo.h.

References clearVirtRegTypes(), createGenericVirtualRegister(), createIncompleteVirtualRegister(), llvm::IndexedMap< T, ToIndexT >::inBounds(), llvm::TargetRegisterInfo::isVirtualRegister(), Name, and setType().

Referenced by llvm::RegisterBankInfo::applyDefaultMapping(), llvm::MIPatternMatch::bind_helper< LLT >::bind(), llvm::MachineIRBuilder::buildAtomicCmpXchg(), llvm::MachineIRBuilder::buildAtomicCmpXchgWithSuccess(), llvm::MachineIRBuilder::buildAtomicRMW(), buildEXP(), llvm::MachineIRBuilder::buildSequence(), canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), cloneVirtualRegister(), llvm::ConstantFoldBinOp(), constrainRegAttrs(), llvm::InstructionSelector::executeMatchTable(), llvm::AMDGPURegisterBankInfo::getInstrAlternativeMappings(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::X86RegisterBankInfo::getInstrMapping(), llvm::AArch64RegisterBankInfo::getInstrMapping(), getLeaOP(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), llvm::getOpcodeDef(), llvm::X86GenRegisterBankInfo::getPartialMappingIdx(), getRegClassFromGRPhysReg(), llvm::TargetRegisterInfo::getRegSizeInBits(), getTypeFromTypeIdx(), llvm::MachineInstr::getTypeToPrint(), isImplicitOperandIn(), isPreISelGenericFloatingPointOpcode(), llvm::AArch64LegalizerInfo::legalizeCustom(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::libcall(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::ARMCallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::MIPatternMatch::CheckType::match(), matchPair(), llvm::LegalizerHelper::narrowScalar(), llvm::printRegClassOrBank(), llvm::InstructionSelect::runOnMachineFunction(), llvm::Localizer::runOnMachineFunction(), selectCopy(), selectMergeValues(), selectUnmergeValues(), llvm::CombinerHelper::tryCombineCopy(), llvm::LegalizationArtifactCombiner::tryCombineInstruction(), llvm::LegalizationArtifactCombiner::tryCombineMerges(), llvm::LegalizationArtifactCombiner::tryCombineSExt(), llvm::LegalizationArtifactCombiner::tryCombineZExt(), llvm::LegalizationArtifactCombiner::tryFoldImplicitDef(), unsupportedBinOp(), llvm::LegalizerHelper::widenScalar(), and X86SelectAddress().

getUniqueVRegDef()

MachineInstr * MachineRegisterInfo::getUniqueVRegDef

(

unsigned

Reg

)

const

getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found.

If there are multiple definitions or no definition, return null.

Definition at line 412 of file MachineRegisterInfo.cpp.

References def_empty(), def_instr_begin(), def_instr_end(), and I.

Referenced by canCombine(), canInstrSubstituteCmpInstr(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), findSingleRegDef(), findSRegBaseAndIndex(), llvm::SIInstrInfo::FoldImmediate(), foldImmediates(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), genFusedMultiply(), genMaddR(), getFoldableImm(), getOrExecSource(), GetVRegDef(), getWinAllocaAmount(), llvm::TargetInstrInfo::hasReassociableOperands(), llvm::TargetInstrInfo::hasReassociableSibling(), insertUndefLaneMask(), isCallerPreservedOrConstPhysReg(), isConstant(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), shouldPreventUndefRegUpdateMemFold(), and use_nodbg_empty().

getUsedPhysRegsMask()

const BitVector& llvm::MachineRegisterInfo::getUsedPhysRegsMask ( ) const

inline

Definition at line 836 of file MachineRegisterInfo.h.

References freezeReservedRegs().

Referenced by llvm::createRegUsageInfoCollector().

getVRegDef()

MachineInstr * MachineRegisterInfo::getVRegDef

(

unsigned

Reg

)

const

getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found.

This assumes that the code is in SSA form, so there should only be one definition.

Definition at line 401 of file MachineRegisterInfo.cpp.

References assert(), llvm::MachineRegisterInfo::defusechain_instr_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr, ByBundle >::atEnd(), def_instr_begin(), def_instr_end(), and I.

Referenced by llvm::MIPatternMatch::bind_helper< MachineInstr * >::bind(), buildEXP(), canCompareBeNewValueJump(), canFoldIntoCSel(), canFoldIntoMOVCC(), canFoldIntoSelect(), canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), llvm::createHexagonHardwareLoops(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::InstructionSelector::executeMatchTable(), findStartOfTree(), llvm::getConstantFPVRegVal(), llvm::getConstantVRegVal(), getImmOrMaterializedImm(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::getOpcodeDef(), llvm::getVRegSubRegDef(), INITIALIZE_PASS(), llvm::InstructionSelector::isBaseWithConstantOffset(), isConstant(), isCopyFeedingInvariantStore(), isImmValidForOpcode(), llvm::LiveVariables::VarInfo::isLiveIn(), llvm::PPCInstrInfo::isSignOrZeroExtended(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::TargetRegisterInfo::lookThruCopyLike(), MatchingStackOffset(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::X86InstrInfo::optimizeLoadInstr(), phiHasBreakDef(), llvm::ARMBaseInstrInfo::produceSameValue(), pushDepHeight(), removeCopies(), removePhis(), llvm::PPCInstrInfo::replaceInstrWithLI(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::LegalizationArtifactCombiner::tryCombineAnyExt(), llvm::LegalizationArtifactCombiner::tryCombineInstruction(), llvm::LegalizationArtifactCombiner::tryCombineSExt(), llvm::LegalizationArtifactCombiner::tryCombineZExt(), updatePHIs(), updatePhysDepsDownwards(), use_nodbg_empty(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsPHI(), and X86SelectAddress().

getVRegName()

StringRef llvm::MachineRegisterInfo::getVRegName ( unsigned  Reg ) const

inline

Definition at line 429 of file MachineRegisterInfo.h.

References llvm::IndexedMap< T, ToIndexT >::inBounds().

Referenced by llvm::MIRPrinter::convert(), and llvm::printReg().

hasOneDef()

bool llvm::MachineRegisterInfo::hasOneDef ( unsigned  RegNo ) const

inline

Return true if there is exactly one operand defining the specified register.

Definition at line 445 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps(), createBBSelectReg(), IsSafeToMove(), isSSA(), MoveForSingleUse(), llvm::AArch64InstrInfo::optimizeCondBranch(), and removeExternalCFGEdges().

hasOneNonDBGUse()

bool MachineRegisterInfo::hasOneNonDBGUse

(

unsigned

RegNo

)

const

hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.

Definition at line 420 of file MachineRegisterInfo.cpp.

References use_nodbg_begin(), and use_nodbg_end().

Referenced by canCombine(), canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), findOnlyInterestingUse(), llvm::SystemZInstrInfo::FoldImmediate(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), getNewSource(), llvm::TargetInstrInfo::hasReassociableSibling(), INITIALIZE_PASS(), isOperandKill(), isVirtualRegisterOperand(), OneUseDominatesOtherUses(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::TailDuplicator::tailDuplicateAndUpdate(), and use_nodbg_empty().

hasOneUse()

bool llvm::MachineRegisterInfo::hasOneUse ( unsigned  RegNo ) const

inline

hasOneUse - Return true if there is exactly one instruction using the specified register.

Definition at line 501 of file MachineRegisterInfo.h.

References use_begin(), and use_end().

Referenced by llvm::PPCInstrInfo::convertToImmediateForm(), findSingleRegDef(), llvm::SIInstrInfo::FoldImmediate(), foldImmediates(), foldVGPRCopyIntoRegSequence(), HasOneUse(), isKilled(), llvm::MIPatternMatch::OneUse_match< SubPatternT >::match(), MoveForSingleUse(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::LegalizationArtifactCombiner::tryCombineInstruction(), and llvm::FastISel::tryToFoldLoad().

insertVRegByName()

void llvm::MachineRegisterInfo::insertVRegByName ( StringRef  Name, unsigned  Reg  )

inline

Definition at line 433 of file MachineRegisterInfo.h.

References assert(), llvm::StringRef::empty(), llvm::StringMap< char, AllocatorTy >::end(), llvm::StringMap< char, AllocatorTy >::find(), llvm::IndexedMap< T, ToIndexT >::grow(), llvm::StringSet< AllocatorTy >::insert(), Reg, and llvm::StringRef::str().

Referenced by createIncompleteVirtualRegister().

invalidateLiveness()

void llvm::MachineRegisterInfo::invalidateLiveness ( )

inline

invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.

This should be called by late passes that invalidate the liveness information.

Definition at line 208 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::reset(), and llvm::MachineFunctionProperties::TracksLiveness.

Referenced by AppendEndToFunction(), INITIALIZE_PASS(), llvm::BranchFolder::OptimizeFunction(), llvm::MIRParserImpl::parseRegisterInfo(), and SortBlocks().

isAllocatable()

bool llvm::MachineRegisterInfo::isAllocatable ( unsigned  PhysReg ) const

inline

isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.

Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.

Definition at line 899 of file MachineRegisterInfo.h.

References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().

Referenced by computeLiveOuts(), CriticalPathStep(), llvm::SIRegisterInfo::findUnusedRegister(), getAllSGPRs(), llvm::PPCRegisterInfo::getCalleeSavedRegs(), getLiveLanesAt(), getNewSource(), INITIALIZE_PASS(), isCallerPreservedOrConstPhysReg(), isConstantPhysReg(), and llvm::VirtRegAuxInfo::weightCalcHelper().

isCallerPreservedOrConstPhysReg()

bool MachineRegisterInfo::isCallerPreservedOrConstPhysReg

(

unsigned

PhysReg

)

const

Returns true if either isConstantPhysReg or TRI->isCallerPreservedPhysReg returns true.

This is a utility member function.

Definition at line 530 of file MachineRegisterInfo.cpp.

References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isCallerPreservedPhysReg(), isConstantPhysReg(), and TRI.

Referenced by use_nodbg_empty().

isConstantPhysReg()

bool MachineRegisterInfo::isConstantPhysReg

(

unsigned

PhysReg

)

const

Returns true if PhysReg is unallocatable and constant throughout the function.

Writing to a constant register has no effect.

Definition at line 513 of file MachineRegisterInfo.cpp.

References assert(), def_empty(), getTargetRegisterInfo(), isAllocatable(), llvm::TargetRegisterInfo::isConstantPhysReg(), llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::MCRegAliasIterator::isValid(), and TRI.

Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), isCallerPreservedOrConstPhysReg(), isCallerPreservedOrConstPhysReg(), isCopyFeedingInvariantStore(), isNopCopy(), and use_nodbg_empty().

isLiveIn()

bool MachineRegisterInfo::isLiveIn

(

unsigned

Reg

)

const

Definition at line 436 of file MachineRegisterInfo.cpp.

References E, I, livein_begin(), and livein_end().

Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::X86FrameLowering::adjustForSegmentedStacks(), computeWeight(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::ARMFrameLowering::determineCalleeSaves(), getPrologueDeath(), llvm::PPCInstrInfo::isSignOrZeroExtended(), liveins(), llvm::ARMFrameLowering::ResolveFrameIndexReference(), llvm::Thumb1FrameLowering::spillCalleeSavedRegisters(), llvm::X86FrameLowering::spillCalleeSavedRegisters(), and llvm::PPCFrameLowering::spillCalleeSavedRegisters().

isPhysRegModified()

bool MachineRegisterInfo::isPhysRegModified	(	unsigned	PhysReg,
		bool	SkipNoReturnDef = false
	)		const

Return true if the specified register is modified in this function.

This checks that no defining machine operands exist for the register or any of its aliases. Definitions found on functions marked noreturn are ignored, to consider them pass 'true' for optional parameter SkipNoReturnDef. The register is also considered modified when it is set in the UsedPhysRegMask.

Definition at line 580 of file MachineRegisterInfo.cpp.

References def_begin(), def_end(), getTargetRegisterInfo(), isNoReturnDef(), llvm::MCRegAliasIterator::isValid(), llvm::make_range(), llvm::BitVector::test(), and TRI.

Referenced by llvm::XCoreFrameLowering::determineCalleeSaves(), llvm::TargetFrameLowering::determineCalleeSaves(), getRegAllocationHints(), HandleVRSaveUpdate(), and IsSafeToMove().

isPhysRegUsed()

bool MachineRegisterInfo::isPhysRegUsed

(

unsigned

PhysReg

)

const

Return true if the specified register is modified or read in this function.

This checks that no machine operands exist for the register or any of its aliases. The register is also considered used when it is set in the UsedPhysRegMask.

Definition at line 595 of file MachineRegisterInfo.cpp.

References getTargetRegisterInfo(), llvm::MCRegAliasIterator::isValid(), reg_nodbg_empty(), llvm::BitVector::test(), and TRI.

Referenced by llvm::PPCFrameLowering::assignCalleeSavedSpillSlots(), llvm::ARMFrameLowering::determineCalleeSaves(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::SIRegisterInfo::findUnusedRegister(), getAllSGPRs(), getRegAllocationHints(), hasAnyNonFlatUseOfReg(), needToReserveScavengingSpillSlots(), llvm::ExecutionDomainFix::runOnMachineFunction(), and verifyLeafProcRegUse().

isReserved()

bool llvm::MachineRegisterInfo::isReserved ( unsigned  PhysReg ) const

inline

isReserved - Returns true when PhysReg is a reserved register.

Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.

Definition at line 881 of file MachineRegisterInfo.h.

References getReservedRegs(), isReservedRegUnit(), llvm::BitVector::test(), and Unit.

Referenced by llvm::addLiveIns(), llvm::LivePhysRegs::available(), llvm::ARMFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::X86FrameLowering::emitPrologue(), findSurvivorBackwards(), llvm::SystemZRegisterInfo::getRegAllocationHints(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), getTag(), INITIALIZE_PASS(), isACalleeSavedRegister(), isAllocatable(), isCallerPreservedOrConstPhysReg(), isImplicitlyDef(), isNopCopy(), isReservedRegUnit(), matchPair(), llvm::LiveIntervals::print(), llvm::ARMFrameLowering::ResolveFrameIndexReference(), llvm::RegScavenger::scavengeRegister(), llvm::Thumb1FrameLowering::spillCalleeSavedRegisters(), llvm::AArch64FrameLowering::spillCalleeSavedRegisters(), and updateLiveness().

isReservedRegUnit()

bool MachineRegisterInfo::isReservedRegUnit

(

unsigned

Unit

)

const

Returns true when the given register unit is considered reserved.

Register units are considered reserved when for at least one of their root registers, the root register and all super registers are reserved. This currently iterates the register hierarchy and may be slower than expected.

Definition at line 651 of file MachineRegisterInfo.cpp.

References getTargetRegisterInfo(), isReserved(), llvm::MCRegisterInfo::DiffListIterator::isValid(), llvm::MCRegUnitRootIterator::isValid(), Reg, and TRI.

Referenced by llvm::LiveIntervals::HMEditor::getRegUnitLI(), isReserved(), matchPair(), and llvm::LiveIntervals::print().

isSSA()

bool llvm::MachineRegisterInfo::isSSA ( ) const

inline

Definition at line 186 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::IsSSA.

Referenced by llvm::PPCInstrInfo::convertToImmediateForm(), getDPPOp(), llvm::getVRegSubRegDef(), LoopIsOuterMostWithPredecessor(), matchPair(), llvm::PPCInstrInfo::replaceInstrWithLI(), splitMBB(), and swapMIOperands().

isUpdatedCSRsInitialized()

bool llvm::MachineRegisterInfo::isUpdatedCSRsInitialized ( ) const

inline

Returns true if the updated CSR list was initialized and false otherwise.

Definition at line 231 of file MachineRegisterInfo.h.

References addRegOperandToUseList(), disableCalleeSavedRegister(), getCalleeSavedRegs(), moveOperands(), Reg, removeRegOperandFromUseList(), setCalleeSavedRegs(), verifyUseList(), and verifyUseLists().

Referenced by llvm::MIRPrinter::convert().

leaveSSA()

void llvm::MachineRegisterInfo::leaveSSA ( )

inline

Definition at line 192 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::IsSSA, and llvm::MachineFunctionProperties::reset().

Referenced by HasArgumentDef().

livein_begin()

livein_iterator llvm::MachineRegisterInfo::livein_begin ( ) const

inline

Definition at line 918 of file MachineRegisterInfo.h.

Referenced by getLiveInPhysReg(), getLiveInVirtReg(), isLiveIn(), and llvm::MachineFunction::print().

livein_empty()

bool llvm::MachineRegisterInfo::livein_empty ( ) const

inline

Definition at line 920 of file MachineRegisterInfo.h.

Referenced by llvm::R600InstrInfo::getIndirectIndexBegin(), and llvm::MachineFunction::print().

livein_end()

livein_iterator llvm::MachineRegisterInfo::livein_end ( ) const

inline

Definition at line 919 of file MachineRegisterInfo.h.

Referenced by getLiveInPhysReg(), getLiveInVirtReg(), isLiveIn(), and llvm::MachineFunction::print().

liveins()

ArrayRef<std::pair<unsigned, unsigned> > llvm::MachineRegisterInfo::liveins ( ) const

inline

Definition at line 922 of file MachineRegisterInfo.h.

References EmitLiveInCopies(), getLiveInPhysReg(), getLiveInVirtReg(), getMaxLaneMaskForVReg(), isLiveIn(), TII, and TRI.

Referenced by llvm::rdf::DataFlowGraph::build(), checkFnHasLiveInYmmOrZmm(), llvm::MIRPrinter::convert(), llvm::HexagonEvaluator::evaluate(), llvm::R600InstrInfo::getIndirectIndexBegin(), HandleVRSaveUpdate(), isSortedByValueNo(), and llvm::SelectionDAGISel::runOnMachineFunction().

markUsesInDebugValueAsUndef()

void MachineRegisterInfo::markUsesInDebugValueAsUndef

(

unsigned

Reg

)

const

markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.

Definition at line 539 of file MachineRegisterInfo.cpp.

References E, llvm::MachineInstr::getOperand(), I, llvm::MachineInstr::isDebugValue(), llvm::MachineOperand::setReg(), use_instr_begin(), use_instr_end(), and UseMI.

Referenced by llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval(), getRegAllocationHints(), and isVirtualRegisterOperand().

moveOperands()

void MachineRegisterInfo::moveOperands	(	MachineOperand *	Dst,
		MachineOperand *	Src,
		unsigned	NumOps
	)

Move NumOps operands from Src to Dst, updating use-def lists as needed.

The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).

The Src and Dst ranges may overlap.

Definition at line 334 of file MachineRegisterInfo.cpp.

References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::Reg.

Referenced by isUpdatedCSRsInitialized(), and moveOperands().

operator=()

MachineRegisterInfo& llvm::MachineRegisterInfo::operator= ( const MachineRegisterInfo &  )

delete

recomputeRegClass()

bool MachineRegisterInfo::recomputeRegClass

(

unsigned

Reg

)

recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.

Returns true if Reg was upgraded.

This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.

Definition at line 123 of file MachineRegisterInfo.cpp.

References llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), llvm::MachineInstr::getOperand(), getRegClass(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::MachineFunction::getSubtarget(), getTargetRegisterInfo(), MI, reg_nodbg_operands(), setRegClass(), and TII.

Referenced by isTerminalReg(), and setRegClassOrRegBank().

reg_begin()

reg_iterator llvm::MachineRegisterInfo::reg_begin ( unsigned  RegNo ) const

inline

Definition at line 282 of file MachineRegisterInfo.h.

Referenced by createBBSelectReg(), llvm::ConnectedVNInfoEqClasses::Distribute(), GetVRegRenameMap(), reg_empty(), reg_operands(), removeExternalCFGEdges(), replaceRegWith(), and llvm::FastISel::tryToFoldLoad().

reg_bundle_begin()

reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_begin ( unsigned  RegNo ) const

inline

Definition at line 311 of file MachineRegisterInfo.h.

Referenced by reg_bundles().

reg_bundle_end()

static reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_end ( )

inlinestatic

Definition at line 314 of file MachineRegisterInfo.h.

Referenced by reg_bundles().

reg_bundle_nodbg_begin()

reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_begin ( unsigned  RegNo ) const

inline

Definition at line 364 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_bundles().

reg_bundle_nodbg_end()

static reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_end ( )

inlinestatic

Definition at line 367 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_bundles().

reg_bundles()

iterator_range<reg_bundle_iterator> llvm::MachineRegisterInfo::reg_bundles ( unsigned  Reg ) const

inline

Definition at line 318 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_bundle_begin(), and reg_bundle_end().

reg_empty()

bool llvm::MachineRegisterInfo::reg_empty ( unsigned  RegNo ) const

inline

reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).

Definition at line 324 of file MachineRegisterInfo.h.

References reg_begin(), and reg_end().

Referenced by optimizeVcndVcmpPair(), and llvm::LiveIntervals::print().

reg_end()

static reg_iterator llvm::MachineRegisterInfo::reg_end ( )

inlinestatic

Definition at line 285 of file MachineRegisterInfo.h.

Referenced by createBBSelectReg(), llvm::ConnectedVNInfoEqClasses::Distribute(), GetVRegRenameMap(), reg_empty(), reg_operands(), removeExternalCFGEdges(), and replaceRegWith().

reg_instr_begin()

reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_begin ( unsigned  RegNo ) const

inline

Definition at line 295 of file MachineRegisterInfo.h.

Referenced by llvm::RegAllocBase::allocatePhysRegs(), reg_instructions(), and llvm::VirtRegAuxInfo::weightCalcHelper().

reg_instr_end()

static reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_end ( )

inlinestatic

Definition at line 298 of file MachineRegisterInfo.h.

Referenced by llvm::RegAllocBase::allocatePhysRegs(), reg_instructions(), and llvm::VirtRegAuxInfo::weightCalcHelper().

reg_instr_nodbg_begin()

reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_begin ( unsigned  RegNo ) const

inline

Definition at line 347 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_instructions().

reg_instr_nodbg_end()

static reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_end ( )

inlinestatic

Definition at line 350 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_instructions().

reg_instructions()

iterator_range<reg_instr_iterator> llvm::MachineRegisterInfo::reg_instructions ( unsigned  Reg ) const

inline

Definition at line 303 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_instr_begin(), and reg_instr_end().

Referenced by llvm::findPHICopyInsertPoint(), and llvm::LiveIntervals::shrinkToUses().

reg_nodbg_begin()

reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_begin ( unsigned  RegNo ) const

inline

Definition at line 330 of file MachineRegisterInfo.h.

Referenced by INITIALIZE_PASS(), reg_nodbg_empty(), and reg_nodbg_operands().

reg_nodbg_bundles()

iterator_range<reg_bundle_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_bundles ( unsigned  Reg ) const

inline

Definition at line 372 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_bundle_nodbg_begin(), and reg_bundle_nodbg_end().

reg_nodbg_empty()

bool llvm::MachineRegisterInfo::reg_nodbg_empty ( unsigned  RegNo ) const

inline

reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.

Definition at line 378 of file MachineRegisterInfo.h.

References reg_nodbg_begin(), and reg_nodbg_end().

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::RegAllocBase::allocatePhysRegs(), callHasRegMask(), getFPReg(), llvm::RegAllocBase::init(), isPhysRegUsed(), isTerminalReg(), matchPair(), and llvm::LiveIntervals::print().

reg_nodbg_end()

static reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_end ( )

inlinestatic

Definition at line 333 of file MachineRegisterInfo.h.

Referenced by INITIALIZE_PASS(), reg_nodbg_empty(), and reg_nodbg_operands().

reg_nodbg_instructions()

iterator_range<reg_instr_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_instructions ( unsigned  Reg ) const

inline

Definition at line 355 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_instr_nodbg_begin(), and reg_instr_nodbg_end().

Referenced by isTerminalReg().

reg_nodbg_operands()

iterator_range<reg_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_operands ( unsigned  Reg ) const

inline

Definition at line 338 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_nodbg_begin(), and reg_nodbg_end().

Referenced by llvm::LiveRangeCalc::calculate(), computeWeight(), llvm::LiveRangeCalc::createDeadDefs(), recomputeRegClass(), scavengeVReg(), and tryChangeVGPRtoSGPRinCopy().

reg_operands()

iterator_range<reg_iterator> llvm::MachineRegisterInfo::reg_operands ( unsigned  Reg ) const

inline

Definition at line 287 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_begin(), and reg_end().

Referenced by doVRegRenaming(), getSingleDef(), hasAnyNonFlatUseOfReg(), runOnBasicBlock(), and verifyUseList().

removeRegOperandFromUseList()

void MachineRegisterInfo::removeRegOperandFromUseList

(

MachineOperand *

MO

)

Remove MO from its use-def list.

Definition at line 305 of file MachineRegisterInfo.cpp.

References assert(), llvm::MachineOperand::getReg(), and llvm::MachineOperand::Reg.

Referenced by llvm::MachineInstr::addImplicitDefUseOperands(), llvm::MachineOperand::ChangeToRegister(), isUpdatedCSRsInitialized(), llvm::MachineInstr::RemoveOperand(), llvm::MachineOperand::setIsDef(), and llvm::MachineOperand::setReg().

replaceRegWith()

void MachineRegisterInfo::replaceRegWith	(	unsigned	FromReg,
		unsigned	ToReg
	)

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Note that it is usually necessary to first constrain ToReg's register class and register bank to match the FromReg constraints using one of the methods:

constrainRegClass(ToReg, getRegClass(FromReg)) constrainRegAttrs(ToReg, FromReg) RegisterBankInfo::constrainGenericRegister(ToReg, *MRI.getRegClass(FromReg), MRI)

These functions will return a falsy result if the virtual registers have incompatible constraints.

Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. If ToReg is a physical register we apply the sub register to obtain the final/proper physical register.

Definition at line 381 of file MachineRegisterInfo.cpp.

References assert(), E, getTargetRegisterInfo(), I, llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::RISCVFenceField::O, reg_begin(), reg_end(), llvm::MachineOperand::setReg(), llvm::MachineOperand::substPhysReg(), and TRI.

Referenced by computeWeight(), llvm::SITargetLowering::finalizeLowering(), findStartOfTree(), getAllSGPRs(), getNewSource(), INITIALIZE_PASS(), llvm::RISCVInstrInfo::insertIndirectBranch(), llvm::SIInstrInfo::insertIndirectBranch(), insertUndefLaneMask(), isCallerPreservedOrConstPhysReg(), isCopyFeedingInvariantStore(), llvm::SIInstrInfo::moveToVALU(), optimizeVcndVcmpPair(), llvm::CombinerHelper::replaceRegWith(), llvm::UnreachableBlockElimPass::run(), llvm::InstructionSelect::runOnMachineFunction(), llvm::SelectionDAGISel::runOnMachineFunction(), scavengeVReg(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::LegalizationArtifactCombiner::tryCombineMerges(), use_nodbg_empty(), and verifyLeafProcRegUse().

reservedRegsFrozen()

bool llvm::MachineRegisterInfo::reservedRegsFrozen ( ) const

inline

reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.

Definition at line 856 of file MachineRegisterInfo.h.

References llvm::BitVector::empty().

Referenced by canReserveReg(), getReservedRegs(), isCallerPreservedOrConstPhysReg(), and llvm::MachineFunction::verify().

resetDelegate()

void llvm::MachineRegisterInfo::resetDelegate ( Delegate *  delegate )

inline

Definition at line 158 of file MachineRegisterInfo.h.

References assert().

Referenced by llvm::LiveRangeEdit::~LiveRangeEdit().

setCalleeSavedRegs()

void MachineRegisterInfo::setCalleeSavedRegs

(

ArrayRef< MCPhysReg >

CSRs

)

Sets the updated Callee Saved Registers list.

Notice that it will override ant previously disabled/saved CSRs.

Definition at line 638 of file MachineRegisterInfo.cpp.

References llvm::SmallVectorImpl< T >::clear(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and Reg.

Referenced by isUpdatedCSRsInitialized(), llvm::MIRParserImpl::parseRegisterInfo(), and llvm::AArch64RegisterInfo::UpdateCustomCalleeSavedRegs().

setDelegate()

void llvm::MachineRegisterInfo::setDelegate ( Delegate *  delegate )

inline

Definition at line 167 of file MachineRegisterInfo.h.

References assert().

Referenced by llvm::LiveRangeEdit::LiveRangeEdit().

setRegAllocationHint()

void llvm::MachineRegisterInfo::setRegAllocationHint ( unsigned  VReg, unsigned  Type, unsigned  PrefReg  )

inline

setRegAllocationHint - Specify a register allocation hint for the specified virtual register.

This is typically used by target, and in case of an earlier hint it will be overwritten.

Definition at line 758 of file MachineRegisterInfo.h.

References assert(), llvm::IndexedMap< T, ToIndexT >::clear(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by llvm::SIInstrInfo::getAddNoCarry(), matchSwap(), setSimpleHint(), shrinkScalarLogicOp(), and llvm::ARMBaseRegisterInfo::updateRegAllocHint().

setRegBank()

void MachineRegisterInfo::setRegBank	(	unsigned	Reg,
		const RegisterBank &	RegBank
	)

Set the register bank to RegBank for Reg.

Definition at line 64 of file MachineRegisterInfo.cpp.

References Reg.

Referenced by canTurnIntoCOPY(), llvm::RegisterBankInfo::OperandsMapper::createVRegs(), llvm::RegBankSelect::getAnalysisUsage(), getRegClassOrRegBank(), and llvm::MIRParserImpl::setupRegisterInfo().

setRegClass()

void MachineRegisterInfo::setRegClass	(	unsigned	Reg,
		const TargetRegisterClass *	RC
	)

setRegClass - Set the register class of the specified virtual register.

Definition at line 59 of file MachineRegisterInfo.cpp.

References assert(), llvm::TargetRegisterClass::isAllocatable(), and Reg.

Referenced by llvm::RegisterBankInfo::constrainGenericRegister(), constrainRegClass(), definesFullReg(), foldVGPRCopyIntoRegSequence(), getRegClassOrRegBank(), getRegsUsedByPHIs(), insertUndefLaneMask(), isCopyFeedingInvariantStore(), recomputeRegClass(), llvm::MIRParserImpl::setupRegisterInfo(), swapMIOperands(), and tryChangeVGPRtoSGPRinCopy().

setRegClassOrRegBank()

void llvm::MachineRegisterInfo::setRegClassOrRegBank ( unsigned  Reg, const RegClassOrRegBank &  RCOrRB  )

inline

Definition at line 671 of file MachineRegisterInfo.h.

References cloneVirtualRegister(), constrainRegAttrs(), constrainRegClass(), createVirtualRegister(), Name, recomputeRegClass(), and Reg.

Referenced by constrainRegAttrs(), and llvm::Localizer::runOnMachineFunction().

setSimpleHint()

void llvm::MachineRegisterInfo::setSimpleHint ( unsigned  VReg, unsigned  PrefReg  )

inline

Specify the preferred (target independent) register allocation hint for the specified virtual register.

Definition at line 774 of file MachineRegisterInfo.h.

References setRegAllocationHint().

Referenced by emitLoadM0FromVGPRLoop(), emitLoadSRsrcFromVGPRLoop(), and llvm::MIRParserImpl::setupRegisterInfo().

setType()

void MachineRegisterInfo::setType	(	unsigned	VReg,
		LLT	Ty
	)

Set the low-level type of VReg to Ty.

Definition at line 183 of file MachineRegisterInfo.cpp.

References llvm::IndexedMap< T, ToIndexT >::grow().

Referenced by llvm::RegisterBankInfo::applyDefaultMapping(), cloneVirtualRegister(), constrainRegAttrs(), createGenericVirtualRegister(), getType(), and isImplicitOperandIn().

shouldTrackSubRegLiveness() [1/2]

bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( const TargetRegisterClass &  RC ) const

inline

Returns true if liveness for register class RC should be tracked at the subregister level.

Definition at line 215 of file MachineRegisterInfo.h.

References llvm::TargetRegisterClass::HasDisjunctSubRegs, and subRegLivenessEnabled().

Referenced by isDefInSubRange(), isTerminalReg(), matchPair(), llvm::LiveIntervals::print(), shouldTrackSubRegLiveness(), and llvm::LiveIntervals::shrinkToUses().

shouldTrackSubRegLiveness() [2/2]

bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( unsigned  VReg ) const

inline

Definition at line 218 of file MachineRegisterInfo.h.

References assert(), getRegClass(), llvm::TargetRegisterInfo::isVirtualRegister(), and shouldTrackSubRegLiveness().

subRegLivenessEnabled()

bool llvm::MachineRegisterInfo::subRegLivenessEnabled ( ) const

inline

Definition at line 222 of file MachineRegisterInfo.h.

Referenced by llvm::LiveIntervals::addKillFlags(), and shouldTrackSubRegLiveness().

tracksLiveness()

bool llvm::MachineRegisterInfo::tracksLiveness ( ) const

inline

tracksLiveness - Returns true when tracking register liveness accurately.

(see MachineFUnctionProperties::Property description for details)

Definition at line 198 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::TracksLiveness.

Referenced by addEpilogOnlyR10(), llvm::rdf::DataFlowGraph::build(), llvm::MIRPrinter::convert(), llvm::outliner::Candidate::initLRU(), llvm::AArch64InstrInfo::isMBBSafeToOutlineFrom(), matchPair(), llvm::BranchFolder::OptimizeFunction(), llvm::MIRParserImpl::parseRegisterInfo(), llvm::MIPrinter::print(), llvm::MachineBasicBlock::print(), and UpdatePredRedefs().

use_begin()

use_iterator llvm::MachineRegisterInfo::use_begin ( unsigned  RegNo ) const

inline

Definition at line 455 of file MachineRegisterInfo.h.

Referenced by addSegmentsWithValNo(), hasOneUse(), hasUseAfterLoop(), INITIALIZE_PASS(), isPHIRegionIndex(), llvm::SIInstrInfo::moveToVALU(), populateCandidates(), propagateLocalCopies(), removeExternalCFGEdges(), replaceRegUsesAfterLoop(), llvm::Localizer::runOnMachineFunction(), llvm::TailDuplicator::tailDuplicateAndUpdate(), use_empty(), and use_operands().

use_bundle_begin()

use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_begin ( unsigned  RegNo ) const

inline

Definition at line 484 of file MachineRegisterInfo.h.

Referenced by use_bundles().

use_bundle_end()

static use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_end ( )

inlinestatic

Definition at line 487 of file MachineRegisterInfo.h.

Referenced by use_bundles().

use_bundle_nodbg_begin()

use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_begin ( unsigned  RegNo ) const

inline

Definition at line 546 of file MachineRegisterInfo.h.

Referenced by use_nodbg_bundles().

use_bundle_nodbg_end()

static use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_end ( )

inlinestatic

Definition at line 549 of file MachineRegisterInfo.h.

Referenced by use_nodbg_bundles().

use_bundles()

iterator_range<use_bundle_iterator> llvm::MachineRegisterInfo::use_bundles ( unsigned  Reg ) const

inline

Definition at line 491 of file MachineRegisterInfo.h.

References llvm::make_range(), use_bundle_begin(), and use_bundle_end().

use_empty()

bool llvm::MachineRegisterInfo::use_empty ( unsigned  RegNo ) const

inline

use_empty - Return true if there are no instructions using the specified register.

Definition at line 497 of file MachineRegisterInfo.h.

References use_begin(), and use_end().

Referenced by computeWeight(), llvm::PPCInstrInfo::convertToImmediateForm(), EmitHiLo(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::NVPTXFrameLowering::emitPrologue(), findSingleRegDef(), findStartOfTree(), foldImmediates(), INITIALIZE_PASS(), insertUndefLaneMask(), llvm::PPCInstrInfo::optimizeCompareInstr(), RematerializeCheapDef(), llvm::InstructionSelect::runOnMachineFunction(), and llvm::SelectionDAGISel::runOnMachineFunction().

use_end()

static use_iterator llvm::MachineRegisterInfo::use_end ( )

inlinestatic

Definition at line 458 of file MachineRegisterInfo.h.

Referenced by addSegmentsWithValNo(), hasOneUse(), hasUseAfterLoop(), INITIALIZE_PASS(), isPHIRegionIndex(), llvm::SIInstrInfo::moveToVALU(), populateCandidates(), propagateLocalCopies(), removeExternalCFGEdges(), replaceRegUsesAfterLoop(), llvm::Localizer::runOnMachineFunction(), llvm::TailDuplicator::tailDuplicateAndUpdate(), use_empty(), and use_operands().

use_instr_begin()

use_instr_iterator llvm::MachineRegisterInfo::use_instr_begin ( unsigned  RegNo ) const

inline

Definition at line 468 of file MachineRegisterInfo.h.

Referenced by foldVGPRCopyIntoRegSequence(), markUsesInDebugValueAsUndef(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::InstructionSelect::runOnMachineFunction(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_instructions().

use_instr_end()

static use_instr_iterator llvm::MachineRegisterInfo::use_instr_end ( )

inlinestatic

Definition at line 471 of file MachineRegisterInfo.h.

Referenced by markUsesInDebugValueAsUndef(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_instructions().

use_instr_nodbg_begin()

use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_begin ( unsigned  RegNo ) const

inline

Definition at line 529 of file MachineRegisterInfo.h.

Referenced by findOnlyInterestingUse(), hasOneNonDBGUseInst(), INITIALIZE_PASS(), isSimpleIf(), isVirtualRegisterOperand(), and use_nodbg_instructions().

use_instr_nodbg_end()

static use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_end ( )

inlinestatic

Definition at line 532 of file MachineRegisterInfo.h.

Referenced by hasOneNonDBGUseInst(), isSimpleIf(), and use_nodbg_instructions().

use_instructions()

iterator_range<use_instr_iterator> llvm::MachineRegisterInfo::use_instructions ( unsigned  Reg ) const

inline

Definition at line 476 of file MachineRegisterInfo.h.

References llvm::make_range(), use_instr_begin(), and use_instr_end().

Referenced by llvm::GISelChangeObserver::changingAllUsesOfReg(), llvm::PPCInstrInfo::convertToImmediateForm(), dumpUses(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::SystemZRegisterInfo::getRegAllocationHints(), insertUndefLaneMask(), isCopyFeedingInvariantStore(), isDefLiveOut(), and llvm::LegalizationArtifactCombiner::tryCombineInstruction().

use_nodbg_begin()

use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_begin ( unsigned  RegNo ) const

inline

Definition at line 512 of file MachineRegisterInfo.h.

Referenced by hasOneNonDBGUse(), OneUseDominatesOtherUses(), ReplaceDominatedUses(), use_nodbg_empty(), and use_nodbg_operands().

use_nodbg_bundles()

iterator_range<use_bundle_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_bundles ( unsigned  Reg ) const

inline

Definition at line 554 of file MachineRegisterInfo.h.

References llvm::make_range(), use_bundle_nodbg_begin(), and use_bundle_nodbg_end().

use_nodbg_empty()

bool llvm::MachineRegisterInfo::use_nodbg_empty ( unsigned  RegNo ) const

inline

use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.

Definition at line 560 of file MachineRegisterInfo.h.

References clearKillFlags(), dumpUses(), getPressureSets(), getUniqueVRegDef(), getVRegDef(), hasOneNonDBGUse(), isCallerPreservedOrConstPhysReg(), isConstantPhysReg(), replaceRegWith(), use_nodbg_begin(), and use_nodbg_end().

Referenced by EmitLiveInCopies(), HasArgumentDef(), INITIALIZE_PASS(), isCopyFeedingInvariantStore(), llvm::isTriviallyDead(), matchSwap(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), and updateOperand().

use_nodbg_end()

static use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_end ( )

inlinestatic

Definition at line 515 of file MachineRegisterInfo.h.

Referenced by hasOneNonDBGUse(), ReplaceDominatedUses(), use_nodbg_empty(), and use_nodbg_operands().

use_nodbg_instructions()

iterator_range<use_instr_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_instructions ( unsigned  Reg ) const

inline

Definition at line 537 of file MachineRegisterInfo.h.

References llvm::make_range(), use_instr_nodbg_begin(), and use_instr_nodbg_end().

Referenced by findSingleRegDef(), INITIALIZE_PASS(), isCallerPreservedOrConstPhysReg(), isCopyFeedingInvariantStore(), isVirtualRegisterOperand(), and optimizeVcndVcmpPair().

use_nodbg_operands()

iterator_range<use_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_operands ( unsigned  Reg ) const

inline

Definition at line 520 of file MachineRegisterInfo.h.

References llvm::make_range(), use_nodbg_begin(), and use_nodbg_end().

Referenced by addSegmentsWithValNo(), llvm::SplitAnalysis::clear(), findSingleRegUse(), findUseBetween(), getDPPOp(), HasOneUse(), matchSwap(), OneUseDominatesOtherUses(), rescheduleCanonically(), llvm::LiveIntervals::shrinkToUses(), and llvm::LiveIntervals::HMEditor::updateAllRanges().

use_operands()

iterator_range<use_iterator> llvm::MachineRegisterInfo::use_operands ( unsigned  Reg ) const

inline

Definition at line 460 of file MachineRegisterInfo.h.

References llvm::make_range(), use_begin(), and use_end().

Referenced by clearKillFlags(), and createBBSelectReg().

verifyUseList()

void MachineRegisterInfo::verifyUseList

(

unsigned

Reg

)

const

Verify the sanity of the use list for Reg.

Definition at line 218 of file MachineRegisterInfo.cpp.

References assert(), llvm::errs(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), getTargetRegisterInfo(), llvm::MachineOperand::isReg(), MI, llvm::printReg(), Reg, and reg_operands().

Referenced by clearVirtRegs(), isUpdatedCSRsInitialized(), and verifyUseLists().

verifyUseLists()

void MachineRegisterInfo::verifyUseLists

(

)

const

Verify the use list of all registers.

Definition at line 256 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), getTargetRegisterInfo(), llvm::TargetRegisterInfo::index2VirtReg(), and verifyUseList().

Referenced by isUpdatedCSRsInitialized(), and llvm::MachineFunction::verify().

Friends And Related Function Documentation

defusechain_instr_iterator

template<bool , bool , bool , bool , bool , bool >

friend class defusechain_instr_iterator

friend

Definition at line 276 of file MachineRegisterInfo.h.

defusechain_iterator

template<bool , bool , bool , bool , bool , bool >

friend class defusechain_iterator

friend

Definition at line 270 of file MachineRegisterInfo.h.

---

The documentation for this class was generated from the following files:

• include/llvm/CodeGen/MachineRegisterInfo.h
• lib/CodeGen/MachineRegisterInfo.cpp