Here is a list of all file members with links to the files they belong to:

- d -

• D : BuiltinGCs.cpp
• da : DependenceAnalysis.cpp
• darwinHasSinCos() : TargetLoweringBase.cpp
• data_type : InstrProfReader.cpp
• DbgNVJCount : HexagonNewValueJump.cpp
• dbgprintf() : X86DisassemblerDecoder.cpp
• DbgTimerDescription : DwarfDebug.cpp , AsmPrinter.cpp
• DbgTimerName : AsmPrinter.cpp , DwarfDebug.cpp
• DbgValReplacement : Local.cpp
• DC : DebugCounter.cpp
• DCEInstruction() : DCE.cpp
• DCELimit : StackSlotColoring.cpp
• dcMips16Helper : Mips16ISelLowering.cpp
• DDDDDecoderTable : AArch64Disassembler.cpp
• DDDDecoderTable : AArch64Disassembler.cpp
• DDDecoderTable : AArch64Disassembler.cpp
• DDSig : Mips16HardFloat.cpp
• DeadPHICycle() : InstCombinePHI.cpp
• debug : X86Disassembler.cpp , X86DisassemblerDecoder.cpp
• Debug : Debug.cpp
• DEBUG_COUNTER() : DCE.cpp , DivRemPairs.cpp , EarlyCSE.cpp , NewGVN.cpp , PartiallyInlineLibCalls.cpp , PredicateInfo.cpp , DebugCounter.h , MachineCopyPropagation.cpp , AArch64FalkorHWPFFix.cpp , SIInsertWaitcnts.cpp , InstructionCombining.cpp , ConstantProp.cpp
• DEBUG_KNUTH : APInt.cpp
• DEBUG_PRINT_STAT : InlineCost.cpp
• DEBUG_TYPE : DemandedBits.cpp , InstructionSelect.cpp , RuntimeDyldChecker.cpp , MipsInstPrinter.cpp , MipsELFObjectWriter.cpp , RuntimeDyldCOFF.cpp , MipsMCCodeEmitter.cpp , MipsMCExpr.cpp , InstructionSelector.cpp , RuntimeDyldCOFF.h , MipsNaClELFStreamer.cpp , MicroMipsSizeReduction.cpp , RuntimeDyldELF.cpp , Mips16HardFloat.cpp , Mips16InstrInfo.cpp , DependenceAnalysis.cpp , IRTranslator.cpp , RuntimeDyldMachO.cpp , Mips16ISelDAGToDAG.cpp , Mips16ISelLowering.cpp , RuntimeDyldMachO.h , Mips16RegisterInfo.cpp , MipsAsmPrinter.cpp , Legalizer.cpp , RuntimeDyldCOFFI386.h , MipsBranchExpansion.cpp , MipsConstantIslandPass.cpp , RuntimeDyldCOFFThumb.h , MipsDelaySlotFiller.cpp , MipsExpandPseudo.cpp , DivergenceAnalysis.cpp , LegalizerHelper.cpp , RuntimeDyldCOFFX86_64.h , MipsFastISel.cpp , MipsInstructionSelector.cpp , RuntimeDyldELFMips.cpp , MipsISelDAGToDAG.cpp , MipsISelLowering.cpp , LegalizerInfo.cpp , RuntimeDyldELFMips.h , MipsModuleISelDAGToDAG.cpp , MipsOptimizePICCall.cpp , RuntimeDyldMachOAArch64.h , MipsOs16.cpp , MipsPreLegalizerCombiner.cpp , GlobalsModRef.cpp , Localizer.cpp , RuntimeDyldMachOARM.h , MipsRegisterBankInfo.cpp , MipsRegisterInfo.cpp , RuntimeDyldMachOI386.h , MipsSEISelDAGToDAG.cpp , MipsSEISelLowering.cpp , RegBankSelect.cpp , RuntimeDyldMachOX86_64.h , MipsSERegisterInfo.cpp , MipsSubtarget.cpp , ConstantsContext.h , MipsTargetMachine.cpp , MSP430AsmParser.cpp , IndirectCallPromotionAnalysis.cpp , RegisterBank.cpp , Core.cpp , MSP430Disassembler.cpp , MSP430InstPrinter.cpp , ModuleSummaryIndex.cpp , MSP430MCCodeEmitter.cpp , MSP430AsmPrinter.cpp , RegisterBankInfo.cpp , Pass.cpp , MSP430BranchSelector.cpp , MSP430ISelDAGToDAG.cpp , PassTimingInfo.cpp , MSP430ISelLowering.cpp , MSP430RegisterInfo.cpp , InlineCost.cpp , Utils.cpp , SafepointIRVerifier.cpp , MSP430Subtarget.cpp , NVPTXInstPrinter.cpp , ValueSymbolTable.cpp , NVPTXISelDAGToDAG.cpp , NVPTXISelLowering.cpp , GlobalMerge.cpp , LTO.cpp , NVPTXLowerAggrCopies.cpp , NVPTXMCExpr.cpp , ThinLTOCodeGenerator.cpp , NVPTXPeephole.cpp , NVPTXPrologEpilogPass.cpp , InstCount.cpp , IfConversion.cpp , ELFObjectWriter.cpp , NVPTXRegisterInfo.cpp , NVPTXSubtarget.cpp , MachObjectWriter.cpp , NVPTXTargetTransformInfo.cpp , NVVMIntrRange.cpp , ImplicitNullChecks.cpp , MCAssembler.cpp , NVVMReflect.cpp , PPCDisassembler.cpp , MCExpr.cpp , PPCInstPrinter.cpp , PPCMCCodeEmitter.cpp , InstructionSimplify.cpp , IndirectBrExpandPass.cpp , MCWinCOFFStreamer.cpp , PPCMCExpr.cpp , PPCAsmPrinter.cpp , WasmObjectWriter.cpp , PPCBoolRetToInt.cpp , PPCBranchCoalescing.cpp , InlineSpiller.cpp , WinCOFFObjectWriter.cpp , PPCBranchSelector.cpp , PPCCTRLoops.cpp , LSUnit.cpp , PPCEarlyReturn.cpp , PPCExpandISEL.cpp , IVDescriptors.cpp , InterferenceCache.cpp , RegisterFile.cpp , PPCFastISel.cpp , PPCFrameLowering.cpp , ResourceManager.cpp , PPCHazardRecognizers.cpp , PPCInstrInfo.cpp , InterleavedAccessPass.cpp , RetireControlUnit.cpp , PPCISelDAGToDAG.cpp , PPCISelLowering.cpp , Scheduler.cpp , PPCLoopPreIncPrep.cpp , PPCMIPeephole.cpp , IVUsers.cpp , InterleavedLoadCombinePass.cpp , InstrBuilder.cpp , PPCPreEmitPeephole.cpp , PPCQPXLoadSplat.cpp , Pipeline.cpp , PPCReduceCRLogicals.cpp , PPCRegisterInfo.cpp , LatencyPriorityQueue.cpp , DispatchStage.cpp , PPCSubtarget.cpp , PPCTargetTransformInfo.cpp , ExecuteStage.cpp , PPCTLSDynamicCall.cpp , PPCTOCRegDeps.cpp , LazyBlockFrequencyInfo.cpp , LazyMachineBlockFrequencyInfo.cpp , RetireStage.cpp , PPCVSXCopy.cpp , PPCVSXFMAMutate.cpp , Support.cpp , PPCVSXSwapRemoval.cpp , RISCVDisassembler.cpp , LexicalScopes.cpp , WasmObjectFile.cpp , RISCVInstPrinter.cpp , RISCVMCCodeEmitter.cpp , CoverageMapping.cpp , RISCVMCExpr.cpp , RISCVAsmPrinter.cpp , LazyBranchProbabilityInfo.cpp , LiveDebugValues.cpp , CoverageMappingReader.cpp , RISCVISelDAGToDAG.cpp , RISCVISelLowering.cpp , APInt.cpp , RISCVMergeBaseOffset.cpp , RISCVSubtarget.cpp , LiveDebugVariables.cpp , CachePruning.cpp , DelaySlotFiller.cpp , SparcDisassembler.cpp , CommandLine.cpp , SparcInstPrinter.cpp , SparcMCCodeEmitter.cpp , LazyCallGraph.cpp , LiveIntervals.cpp , DAGDeltaAlgorithm.cpp , SparcMCExpr.cpp , SparcAsmPrinter.cpp , Host.cpp , SparcSubtarget.cpp , SystemZDisassembler.cpp , LiveIntervalUnion.cpp , RandomNumberGenerator.cpp , SystemZInstPrinter.cpp , SystemZMCCodeEmitter.cpp , JSONBackend.cpp , SystemZElimCompare.cpp , SystemZHazardRecognizer.cpp , LazyValueInfo.cpp , LiveRangeCalc.cpp , AArch64A53Fix835769.cpp , SystemZInstrInfo.cpp , SystemZISelDAGToDAG.cpp , AArch64A57FPLoadBalancing.cpp , SystemZISelLowering.cpp , SystemZLongBranch.cpp , LiveRangeEdit.cpp , AArch64AdvSIMDScalarPass.cpp , SystemZMachineScheduler.cpp , SystemZSelectionDAGInfo.cpp , AArch64AsmPrinter.cpp , SystemZShortenInst.cpp , SystemZSubtarget.cpp , LegacyDivergenceAnalysis.cpp , LiveRangeShrink.cpp , AArch64BranchTargets.cpp , SystemZTargetTransformInfo.cpp , WebAssemblyAsmParser.cpp , AArch64CollectLOH.cpp , WebAssemblyDisassembler.cpp , WebAssemblyInstPrinter.cpp , LiveRegMatrix.cpp , AArch64CompressJumpTables.cpp , WebAssemblyMCAsmInfo.cpp , WebAssemblyMCCodeEmitter.cpp , AArch64CondBrTuning.cpp , WebAssemblyMCTargetDesc.cpp , WebAssemblyTargetInfo.cpp , LoopAccessAnalysis.cpp , LiveStacks.cpp , AArch64ConditionalCompares.cpp , WebAssemblyAddMissingPrototypes.cpp , WebAssemblyArgumentMove.cpp , AArch64ConditionOptimizer.cpp , WebAssemblyAsmPrinter.cpp , WebAssemblyCallIndirectFixup.cpp , LocalStackSlotAllocation.cpp , AArch64DeadRegisterDefinitionsPass.cpp , WebAssemblyCFGSort.cpp , WebAssemblyCFGStackify.cpp , AArch64FalkorHWPFFix.cpp , WebAssemblyEHRestoreStackPointer.cpp , WebAssemblyExceptionInfo.cpp , LoopPass.cpp , LowerEmuTLS.cpp , AArch64FrameLowering.cpp , WebAssemblyExplicitLocals.cpp , WebAssemblyFastISel.cpp , AArch64InstructionSelector.cpp , WebAssemblyFixFunctionBitcasts.cpp , WebAssemblyFixIrreducibleControlFlow.cpp , MachineBasicBlock.cpp , AArch64ISelDAGToDAG.cpp , WebAssemblyFrameLowering.cpp , WebAssemblyInstrInfo.cpp , AArch64ISelLowering.cpp , WebAssemblyISelDAGToDAG.cpp , WebAssemblyISelLowering.cpp , MemoryBuiltins.cpp , MachineBlockFrequencyInfo.cpp , AArch64LoadStoreOptimizer.cpp , WebAssemblyLateEHPrepare.cpp , WebAssemblyLowerBrUnless.cpp , AArch64PBQPRegAlloc.cpp , WebAssemblyLowerEmscriptenEHSjLj.cpp , WebAssemblyLowerGlobalDtors.cpp , MachineBlockPlacement.cpp , AArch64PreLegalizerCombiner.cpp , WebAssemblyMemIntrinsicResults.cpp , WebAssemblyOptimizeLiveIntervals.cpp , AArch64PromoteConstant.cpp , WebAssemblyOptimizeReturned.cpp , WebAssemblyPeephole.cpp , BlockFrequencyInfoImpl.h , MemoryDependenceAnalysis.cpp , MachineCombiner.cpp , AArch64RedundantCopyElimination.cpp , WebAssemblyPrepareForLiveIntervals.cpp , WebAssemblyRegColoring.cpp , AArch64SelectionDAGInfo.cpp , WebAssemblyRegisterInfo.cpp , WebAssemblyRegNumbering.cpp , MachineCopyPropagation.cpp , AArch64SIMDInstrOpt.cpp , WebAssemblyRegStackify.cpp , WebAssemblyReplacePhysRegs.cpp , AArch64SpeculationHardening.cpp , WebAssemblySelectionDAGInfo.cpp , WebAssemblySetP2AlignOperands.cpp , MemorySSA.cpp , MachineCSE.cpp , AArch64StorePairSuppress.cpp , WebAssemblySubtarget.cpp , WebAssemblyTargetMachine.cpp , AArch64Subtarget.cpp , WebAssemblyTargetTransformInfo.cpp , X86Disassembler.cpp , MachineFrameInfo.cpp , AArch64TargetTransformInfo.cpp , X86ATTInstPrinter.cpp , X86IntelInstPrinter.cpp , AArch64Disassembler.cpp , X86MCCodeEmitter.cpp , X86AvoidStoreForwardingBlocks.cpp , CGSCCPassManager.h , MemorySSAUpdater.cpp , MachineFunction.cpp , AArch64ExternalSymbolizer.cpp , X86CallFrameOptimization.cpp , X86CmovConversion.cpp , AArch64InstPrinter.cpp , X86CondBrFolding.cpp , X86DiscriminateMemOps.cpp , MachineLICM.cpp , AArch64MCCodeEmitter.cpp , X86DomainReassignment.cpp , X86EvexToVex.cpp , AArch64MCExpr.cpp , X86ExpandPseudo.cpp , X86FixupBWInsts.cpp , ModuleSummaryAnalysis.cpp , MachineOutliner.cpp , AMDGPUAliasAnalysis.cpp , X86FixupLEAs.cpp , X86FixupSetCC.cpp , AMDGPUAnnotateKernelFeatures.cpp , X86FlagsCopyLowering.cpp , X86FloatingPoint.cpp , MachinePipeliner.cpp , AMDGPUAnnotateUniformValues.cpp , X86IndirectBranchTracking.cpp , X86InstrInfo.cpp , AMDGPUArgumentUsageInfo.cpp , X86InstructionSelector.cpp , X86ISelDAGToDAG.cpp , RegionInfoImpl.h , ObjCARCAliasAnalysis.cpp , MachineRegionInfo.cpp , AMDGPUAtomicOptimizer.cpp , X86ISelLowering.cpp , X86OptimizeLEAs.cpp , AMDGPUCodeGenPrepare.cpp , X86PadShortFunction.cpp , X86RetpolineThunks.cpp , MachineScheduler.cpp , AMDGPUFixFunctionBitcasts.cpp , X86SelectionDAGInfo.cpp , X86SpeculativeLoadHardening.cpp , AMDGPUInline.cpp , X86Subtarget.cpp , X86TargetTransformInfo.cpp , PostDominators.cpp , MachineSink.cpp , AMDGPUInstructionSelector.cpp , X86VZeroUpper.cpp , X86WinEHState.cpp , AMDGPULibCalls.cpp , XCoreDisassembler.cpp , XCoreInstPrinter.cpp , MachineSSAUpdater.cpp , AMDGPULowerIntrinsics.cpp , XCoreAsmPrinter.cpp , XCoreISelLowering.cpp , AMDGPULowerKernelArguments.cpp , XCoreLowerThreadLocal.cpp , XCoreRegisterInfo.cpp , SparsePropagation.h , RegionInfo.cpp , MachineTraceMetrics.cpp , AMDGPULowerKernelAttributes.cpp , XCoreSelectionDAGInfo.cpp , XCoreSubtarget.cpp , AMDGPUMachineCFGStructurizer.cpp , AggressiveInstCombine.cpp , TruncInstCombine.cpp , MacroFusion.cpp , AMDGPUOpenCLEnqueuedBlockLowering.cpp , CoroCleanup.cpp , CoroEarly.cpp , AMDGPUPerfHintAnalysis.cpp , CoroElide.cpp , CoroFrame.cpp , RegionPass.cpp , MIRCanonicalizerPass.cpp , AMDGPUPromoteAlloca.cpp , CoroFrame.cpp , CoroSplit.cpp , AMDGPURewriteOutArguments.cpp , Hello.cpp , InstCombineAddSub.cpp , OptimizePHIs.cpp , AMDGPUSubtarget.cpp , InstCombineAndOrXor.cpp , InstCombineCalls.cpp , AMDGPUTargetTransformInfo.cpp , InstCombineCasts.cpp , InstCombineCompares.cpp , LegalizationArtifactCombiner.h , ScalarEvolution.cpp , PeepholeOptimizer.cpp , AMDGPUUnifyDivergentExitNodes.cpp , InstCombineInternal.h , InstCombineLoadStoreAlloca.cpp , AMDILCFGStructurizer.cpp , InstCombineMulDivRem.cpp , InstCombinePHI.cpp , PHIElimination.cpp , AMDGPUDisassembler.cpp , InstCombineSelect.cpp , InstCombineShifts.cpp , GCNDPPCombine.cpp , InstCombineSimplifyDemanded.cpp , InstCombineVectorOps.cpp , StackSafetyAnalysis.cpp , PostRAHazardRecognizer.cpp , GCNILPSched.cpp , InstructionCombining.cpp , AddressSanitizer.cpp , GCNIterativeScheduler.cpp , BoundsChecking.cpp , CFGMST.h , PostRASchedulerList.cpp , GCNMinRegStrategy.cpp , ControlHeightReduction.cpp , EfficiencySanitizer.cpp , GCNRegPressure.cpp , GCOVProfiling.cpp , HWAddressSanitizer.cpp , Core.h , SyncDependenceAnalysis.cpp , ProcessImplicitDefs.cpp , GCNSchedStrategy.cpp , IndirectCallPromotion.cpp , InstrProfiling.cpp , R600ClauseMergePass.cpp , MemorySanitizer.cpp , PGOInstrumentation.cpp , PrologEpilogInserter.cpp , R600ControlFlowFinalizer.cpp , PGOMemOPSizeOpt.cpp , SanitizerCoverage.cpp , R600ExpandSpecialInstrs.cpp , ThreadSanitizer.cpp , AlwaysInliner.cpp , TargetTransformInfo.cpp , ReachingDefAnalysis.cpp , R600MachineScheduler.cpp , ArgumentPromotion.cpp , BlockExtractor.cpp , R600OptimizeVectorRegisters.cpp , CalledValuePropagation.cpp , ConstantMerge.cpp , RegAllocBase.cpp , R600Packetizer.cpp , CrossDSOCFI.cpp , DeadArgumentElimination.cpp , SIAddIMGInit.cpp , ElimAvailExtern.cpp , ForceFunctionAttrs.cpp , OrcRemoteTargetClient.h , VectorUtils.cpp , RegAllocBasic.cpp , SIAnnotateControlFlow.cpp , FunctionAttrs.cpp , FunctionImport.cpp , SIDebuggerInsertNops.cpp , GlobalDCE.cpp , GlobalOpt.cpp , RegAllocFast.cpp , SIFixSGPRCopies.cpp , HotColdSplitting.cpp , InferFunctionAttrs.cpp , SIFixupVectorISel.cpp , Inliner.cpp , InlineSimple.cpp , MetadataLoader.cpp , RegAllocGreedy.cpp , SIFixVGPRCopies.cpp , Internalize.cpp , IPConstantPropagation.cpp , SIFixWWMLiveness.cpp , LoopExtractor.cpp , LowerTypeTests.cpp , RegAllocPBQP.cpp , SIFoldOperands.cpp , MergeFunctions.cpp , PartialInlining.cpp , SIFormMemoryClauses.cpp , PruneEH.cpp , SampleProfile.cpp , OrcRemoteTargetServer.h , AggressiveAntiDepBreaker.cpp , RegisterClassInfo.cpp , SIInsertSkips.cpp , StripDeadPrototypes.cpp , SyntheticCountsPropagation.cpp , SIInsertWaitcnts.cpp , WholeProgramDevirt.cpp , DependencyAnalysis.cpp , RegisterCoalescer.cpp , SIISelLowering.cpp , ObjCARCAPElim.cpp , ObjCARCContract.cpp , SILoadStoreOptimizer.cpp , ObjCARCExpand.cpp , ObjCARCOpts.cpp , AllocationOrder.cpp , RegisterScavenging.cpp , SILowerControlFlow.cpp , PtrState.cpp , ADCE.cpp , SILowerI1Copies.cpp , AlignmentFromAssumptions.cpp , BDCE.cpp , RegUsageInfoCollector.cpp , SIMachineScheduler.cpp , CallSiteSplitting.cpp , ConstantHoisting.cpp , SIMemoryLegalizer.cpp , ConstantProp.cpp , CorrelatedValuePropagation.cpp , GenericDomTreeConstruction.h , AsmPrinter.cpp , RegUsageInfoPropagate.cpp , SIModeRegister.cpp , DCE.cpp , DeadStoreElimination.cpp , SIOptimizeExecMasking.cpp , DivRemPairs.cpp , EarlyCSE.cpp , RenameIndependentSubregs.cpp , SIOptimizeExecMaskingPreRA.cpp , FlattenCFGPass.cpp , Float2Int.cpp , SIPeepholeSDWA.cpp , GuardWidening.cpp , GVN.cpp , AsmPrinterDwarf.cpp , ResetMachineFunctionPass.cpp , SIShrinkInstructions.cpp , GVNHoist.cpp , GVNSink.cpp , SIWholeQuadMode.cpp , InductiveRangeCheckElimination.cpp , IndVarSimplify.cpp , SafeStack.cpp , ARCAsmPrinter.cpp , InferAddressSpaces.cpp , InstSimplifyPass.cpp , ARCBranchFinalize.cpp , IVUsersPrinter.cpp , JumpThreading.cpp , UnicodeCharRanges.h , AsmPrinterInlineAsm.cpp , SafeStackColoring.cpp , ARCExpandPseudos.cpp , LICM.cpp , LoopAccessAnalysisPrinter.cpp , ARCFrameLowering.cpp , LoopDataPrefetch.cpp , LoopDeletion.cpp , SafeStackLayout.cpp , ARCInstrInfo.cpp , LoopDistribute.cpp , LoopIdiomRecognize.cpp , ARCISelLowering.cpp , LoopInstSimplify.cpp , LoopInterchange.cpp , DbgEntityHistoryCalculator.cpp , ScalarizeMaskedMemIntrin.cpp , ARCRegisterInfo.cpp , LoopLoadElimination.cpp , LoopPredication.cpp , ARCSubtarget.cpp , LoopRerollPass.cpp , LoopRotation.cpp , ScheduleDAG.cpp , ARCDisassembler.cpp , LoopSimplifyCFG.cpp , LoopSink.cpp , ARCInstPrinter.cpp , LoopStrengthReduce.cpp , LoopUnrollAndJamPass.cpp , InstCombineWorklist.h , DebugHandlerBase.cpp , ScheduleDAGInstrs.cpp , A15SDOptimizer.cpp , LoopUnrollPass.cpp , LoopUnswitch.cpp , ARMAsmPrinter.cpp , LoopVersioningLICM.cpp , LowerAtomic.cpp , ScoreboardHazardRecognizer.cpp , ARMBaseInstrInfo.cpp , LowerExpectIntrinsic.cpp , MemCpyOptimizer.cpp , ARMBaseRegisterInfo.cpp , MergedLoadStoreMotion.cpp , MergeICmps.cpp , DIE.cpp , DAGCombiner.cpp , ARMCodeGenPrepare.cpp , NaryReassociate.cpp , NewGVN.cpp , ARMConstantIslandPass.cpp , PartiallyInlineLibCalls.cpp , PlaceSafepoints.cpp , FastISel.cpp , ARMExpandPseudoInsts.cpp , Reassociate.cpp , Reg2Mem.cpp , ARMFrameLowering.cpp , RewriteStatepointsForGC.cpp , Scalarizer.cpp , SSAUpdaterImpl.h , DIEHash.cpp , FunctionLoweringInfo.cpp , ARMInstructionSelector.cpp , SCCP.cpp , SimpleLoopUnswitch.cpp , ARMISelDAGToDAG.cpp , SimplifyCFGPass.cpp , Sink.cpp , InstrEmitter.cpp , ARMISelLowering.cpp , SpeculateAroundPHIs.cpp , SpeculativeExecution.cpp , ARMLoadStoreOptimizer.cpp , SROA.cpp , StructurizeCFG.cpp , DwarfDebug.cpp , LegalizeDAG.cpp , ARMOptimizeBarriersPass.cpp , TailRecursionElimination.cpp , WarnMissedTransforms.cpp , ARMParallelDSP.cpp , AddDiscriminators.cpp , BreakCriticalEdges.cpp , LegalizeFloatTypes.cpp , ARMSelectionDAGInfo.cpp , BuildLibCalls.cpp , BypassSlowDivision.cpp , ARMSubtarget.cpp , CallPromotionUtils.cpp , CodeExtractor.cpp , BasicAliasAnalysis.cpp , DwarfUnit.cpp , LegalizeIntegerTypes.cpp , ARMTargetTransformInfo.cpp , CtorUtils.cpp , Evaluator.cpp , ARMAsmParser.cpp , FlattenCFG.cpp , FunctionComparator.cpp , LegalizeTypes.cpp , ARMDisassembler.cpp , IntegerDivision.cpp , LCSSA.cpp , ARMInstPrinter.cpp , LibCallsShrinkWrap.cpp , Local.cpp , AtomicExpandPass.cpp , LegalizeTypesGeneric.cpp , ARMMCCodeEmitter.cpp , LoopRotationUtils.cpp , LoopSimplify.cpp , ARMMCExpr.cpp , LoopUnroll.cpp , LoopUnrollAndJam.cpp , LegalizeVectorOps.cpp , MLxExpansionPass.cpp , LoopUnrollPeel.cpp , LoopUnrollRuntime.cpp , Thumb2ITBlockPass.cpp , LoopUtils.cpp , LoopVersioning.cpp , BlockFrequencyInfo.cpp , BranchFolding.cpp , LegalizeVectorTypes.cpp , Thumb2SizeReduction.cpp , LowerInvoke.cpp , LowerSwitch.cpp , AVRAsmParser.cpp , Mem2Reg.cpp , PredicateInfo.cpp , ResourcePriorityQueue.cpp , AVRAsmPrinter.cpp , PromoteMemoryToRegister.cpp , SimplifyCFG.cpp , AVRISelDAGToDAG.cpp , SimplifyIndVar.cpp , SplitModule.cpp , BranchRelaxation.cpp , ScheduleDAGFast.cpp , AVRSubtarget.cpp , SSAUpdater.cpp , SSAUpdaterBulk.cpp , AVRDisassembler.cpp , SymbolRewriter.cpp , VNCoercion.cpp , ScheduleDAGRRList.cpp , AVRInstPrinter.cpp , LoadStoreVectorizer.cpp , LoopVectorizationLegality.cpp , AVRMCCodeEmitter.cpp , LoopVectorize.cpp , SLPVectorizer.cpp , BlockFrequencyInfoImpl.cpp , BreakFalseDeps.cpp , ScheduleDAGSDNodes.cpp , AVRMCELFStreamer.cpp , VPlan.cpp , VPlanHCFGBuilder.cpp , BPFAsmPrinter.cpp , VPlanSLP.cpp , VPlanVerifier.cpp , ScheduleDAGVLIW.cpp , BPFISelDAGToDAG.cpp , LazyBlockFrequencyInfo.cpp , LazyBranchProbabilityInfo.cpp , BPFISelLowering.cpp , StackSafetyAnalysis.cpp , CodeGenPrepare.cpp , CalcSpillWeights.cpp , SelectionDAG.cpp , BPFMIChecking.cpp , DwarfEHPrepare.cpp , EarlyIfConversion.cpp , BPFMIPeephole.cpp , CSEInfo.cpp , InstructionSelect.cpp , SelectionDAGBuilder.cpp , BPFSelectionDAGInfo.cpp , IRTranslator.cpp , Legalizer.cpp , BPFSubtarget.cpp , ImplicitNullChecks.cpp , InterleavedAccessPass.cpp , BranchProbabilityInfo.cpp , CodeGenPrepare.cpp , SelectionDAGISel.cpp , BPFDisassembler.cpp , InterleavedLoadCombinePass.cpp , LazyMachineBlockFrequencyInfo.cpp , BPFInstPrinter.cpp , LiveDebugVariables.cpp , LiveStacks.cpp , SelectionDAGPrinter.cpp , BPFMCCodeEmitter.cpp , MachineBlockFrequencyInfo.cpp , MachineBlockPlacement.cpp , HexagonAsmParser.cpp , MachineCombiner.cpp , MachineCSE.cpp , CriticalAntiDepBreaker.cpp , StatepointLowering.cpp , HexagonDisassembler.cpp , MachineLICM.cpp , MachinePipeliner.cpp , HexagonAsmPrinter.cpp , MachineRegionInfo.cpp , MachineScheduler.cpp , ShadowStackGCLowering.cpp , HexagonBitSimplify.cpp , MachineSink.cpp , MachineTraceMetrics.cpp , HexagonBlockRanges.cpp , PeepholeOptimizer.cpp , PHIElimination.cpp , CallGraphSCCPass.cpp , DeadMachineInstructionElim.cpp , ShrinkWrap.cpp , HexagonBranchRelaxation.cpp , PrologEpilogInserter.cpp , RenameIndependentSubregs.cpp , HexagonCFGOptimizer.cpp , SafeStack.cpp , ShadowStackGCLowering.cpp , SjLjEHPrepare.cpp , HexagonCommonGEP.cpp , SpillPlacement.cpp , StackColoring.cpp , HexagonConstExtenders.cpp , StackProtector.cpp , StackSlotColoring.cpp , DetectDeadLanes.cpp , SlotIndexes.cpp , HexagonConstPropagation.cpp , TwoAddressInstructionPass.cpp , AArch64A57FPLoadBalancing.cpp , HexagonCopyToCombine.cpp , AArch64FalkorHWPFFix.cpp , AArch64PreLegalizerCombiner.cpp , SpillPlacement.cpp , HexagonEarlyIfConv.cpp , AMDGPUAnnotateUniformValues.cpp , AMDGPUAtomicOptimizer.cpp , HexagonExpandCondsets.cpp , AMDGPUCodeGenPrepare.cpp , AMDGPULowerKernelArguments.cpp , CFLAndersAliasAnalysis.cpp , DFAPacketizer.cpp , SplitKit.cpp , HexagonFrameLowering.cpp , AMDGPULowerKernelAttributes.cpp , AMDGPURewriteOutArguments.cpp , HexagonGenInsert.cpp , AMDGPUUnifyDivergentExitNodes.cpp , R600ClauseMergePass.cpp , StackColoring.cpp , HexagonGenMux.cpp , R600ControlFlowFinalizer.cpp , R600ExpandSpecialInstrs.cpp , HexagonGenPredicate.cpp , R600OptimizeVectorRegisters.cpp , R600Packetizer.cpp , DwarfEHPrepare.cpp , StackMapLivenessAnalysis.cpp , HexagonHardwareLoops.cpp , SIAnnotateControlFlow.cpp , SIFixSGPRCopies.cpp , HexagonHazardRecognizer.cpp , SIFixWWMLiveness.cpp , SIFormMemoryClauses.cpp , StackMaps.cpp , HexagonInstrInfo.cpp , SIInsertWaitcnts.cpp , SILoadStoreOptimizer.cpp , HexagonISelDAGToDAG.cpp , SILowerI1Copies.cpp , SIOptimizeExecMasking.cpp , CFLSteensAliasAnalysis.cpp , EarlyIfConversion.cpp , StackProtector.cpp , HexagonISelDAGToDAGHVX.cpp , SIOptimizeExecMaskingPreRA.cpp , SIWholeQuadMode.cpp , HexagonISelLowering.cpp , ARMCodeGenPrepare.cpp , MipsPreLegalizerCombiner.cpp , StackSlotColoring.cpp , HexagonLoopIdiomRecognition.cpp , PPCBranchCoalescing.cpp , PPCMIPeephole.cpp , HexagonMachineScheduler.cpp , PPCReduceCRLogicals.cpp , PPCTLSDynamicCall.cpp , ExecutionDomainFix.cpp , TailDuplication.cpp , HexagonNewValueJump.cpp , PPCVSXFMAMutate.cpp , PPCVSXSwapRemoval.cpp , HexagonOptAddrMode.cpp , WebAssemblyExceptionInfo.cpp , X86AvoidStoreForwardingBlocks.cpp , TailDuplicator.cpp , HexagonPeephole.cpp , X86CmovConversion.cpp , X86FlagsCopyLowering.cpp , HexagonSelectionDAGInfo.cpp , LoadStoreVectorizer.cpp , CGSCCPassManager.cpp , ExpandISelPseudos.cpp , TargetRegisterInfo.cpp , HexagonSplitConst32AndConst64.cpp , HexagonSplitDouble.cpp , TwoAddressInstructionPass.cpp , HexagonStoreWidening.cpp , HexagonSubtarget.cpp , ExpandMemCmp.cpp , VirtRegMap.cpp , HexagonTargetObjectFile.cpp , HexagonTargetTransformInfo.cpp , WasmEHPrepare.cpp , HexagonVectorLoopCarriedReuse.cpp , HexagonVectorPrint.cpp , CodeMetrics.cpp , ExpandPostRAPseudos.cpp , WinEHPrepare.cpp , HexagonVLIWPacketizer.cpp , HexagonAsmBackend.cpp , DWARFContext.cpp , HexagonELFObjectWriter.cpp , HexagonInstPrinter.cpp , FaultMaps.cpp , ExecutionEngine.cpp , HexagonMCCodeEmitter.cpp , HexagonMCCompound.cpp , ExecutionEngineBindings.cpp , HexagonMCDuplexInfo.cpp , HexagonMCELFStreamer.cpp , CostModel.cpp , FuncletLayout.cpp , IntelJITEventListener.cpp , HexagonMCExpr.cpp , HexagonMCShuffler.cpp , Execution.cpp , HexagonShuffler.cpp , LanaiDisassembler.h , Combiner.cpp , OProfileJITEventListener.cpp , LanaiInstPrinter.cpp , LanaiAsmPrinter.cpp , OProfileWrapper.cpp , LanaiDelaySlotFiller.cpp , LanaiISelDAGToDAG.cpp , Delinearization.cpp , CombinerHelper.cpp , Core.cpp , LanaiISelLowering.cpp , LanaiMemAluCombiner.cpp , Layer.cpp , LanaiSelectionDAGInfo.cpp , LanaiSubtarget.cpp , CSEInfo.cpp , LazyReexports.cpp , LanaiMCCodeEmitter.cpp , LanaiMCExpr.cpp , RuntimeDyld.cpp , MipsAsmParser.cpp , MipsDisassembler.cpp
• debug_user_sig_handler() : Debug.cpp
• DEBUG_WITH_TYPE : Debug.h
• debugAssign() : BlockFrequencyInfoImpl.cpp
• DebugBufferSize : Debug.cpp
• DebugCounterOption() : DebugCounter.cpp
• DebugDiv : AggressiveAntiDepBreaker.cpp , PostRASchedulerList.cpp
• DebugMod : AggressiveAntiDepBreaker.cpp , PostRASchedulerList.cpp
• DebugOnly : Debug.cpp
• DebugOnlyOptLoc : Debug.cpp
• decIncOperator() : LanaiInstPrinter.cpp
• DECLARE_FIELD : LLParser.cpp
• DECLARE_OP0 : DWARFDebugFrame.cpp
• DECLARE_OP1 : DWARFDebugFrame.cpp
• DECLARE_OP2 : DWARFDebugFrame.cpp
• DECLARE_PDB_SYMBOL_CONCRETE_TYPE : PDBSymbol.h
• DECLARE_PDB_SYMBOL_CUSTOM_TYPE : PDBSymbol.h
• DECLARE_TRANSPARENT_OPERAND_ACCESSORS : OperandTraits.h
• decode() : X86DisassemblerDecoder.cpp
• Decode2OpInstruction() : XCoreDisassembler.cpp
• Decode2OpInstructionFail() : XCoreDisassembler.cpp
• Decode2RImmInstruction() : XCoreDisassembler.cpp
• Decode2RInstruction() : XCoreDisassembler.cpp
• Decode2RSrcDstInstruction() : XCoreDisassembler.cpp
• Decode2RUSBitpInstruction() : XCoreDisassembler.cpp
• Decode2RUSInstruction() : XCoreDisassembler.cpp
• Decode3OpInstruction() : XCoreDisassembler.cpp
• Decode3RImmInstruction() : XCoreDisassembler.cpp
• Decode3RInstruction() : XCoreDisassembler.cpp
• DECODE_OPERAND : AMDGPUDisassembler.cpp
• DECODE_OPERAND_REG : AMDGPUDisassembler.cpp
• DECODE_SDWA : AMDGPUDisassembler.cpp
• DecodeACC64DSPRegisterClass() : MipsDisassembler.cpp
• DecodeAddiGroupBranch() : MipsDisassembler.cpp
• DecodeAddiur2Simm7() : MipsDisassembler.cpp
• DecodeADDR64BitRegisterClass() : SystemZDisassembler.cpp
• DecodeAddrMode2IdxInstruction() : ARMDisassembler.cpp
• DecodeAddrMode3Instruction() : ARMDisassembler.cpp
• DecodeAddrMode5FP16Operand() : ARMDisassembler.cpp
• DecodeAddrMode5Operand() : ARMDisassembler.cpp
• DecodeAddrMode6Operand() : ARMDisassembler.cpp
• DecodeAddrMode7Operand() : ARMDisassembler.cpp
• DecodeAddrModeImm12Operand() : ARMDisassembler.cpp
• DecodeAddSubERegInstruction() : AArch64Disassembler.cpp
• DecodeAddSubImmShift() : AArch64Disassembler.cpp
• DecodeAdrInstruction() : AArch64Disassembler.cpp
• DecodeAFGR64RegisterClass() : MipsDisassembler.cpp
• decodeAField() : ARCDisassembler.cpp
• DecodeANDI16Imm() : MipsDisassembler.cpp
• DecodeAR32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeArmMOVTWInstruction() : ARMDisassembler.cpp
• DecodeASRRegsRegisterClass() : SparcDisassembler.cpp
• DecodeBankedReg() : ARMDisassembler.cpp
• decodeBase64StringEntry() : COFFObjectFile.cpp
• decodeBDAddr12Operand() : SystemZDisassembler.cpp
• decodeBDAddr20Operand() : SystemZDisassembler.cpp
• decodeBDAddr32Disp12Operand() : SystemZDisassembler.cpp
• decodeBDAddr32Disp20Operand() : SystemZDisassembler.cpp
• decodeBDAddr64Disp12Operand() : SystemZDisassembler.cpp
• decodeBDAddr64Disp20Operand() : SystemZDisassembler.cpp
• decodeBDLAddr12Len4Operand() : SystemZDisassembler.cpp
• decodeBDLAddr12Len8Operand() : SystemZDisassembler.cpp
• decodeBDLAddr64Disp12Len4Operand() : SystemZDisassembler.cpp
• decodeBDLAddr64Disp12Len8Operand() : SystemZDisassembler.cpp
• decodeBDRAddr12Operand() : SystemZDisassembler.cpp
• decodeBDRAddr64Disp12Operand() : SystemZDisassembler.cpp
• decodeBDVAddr12Operand() : SystemZDisassembler.cpp
• decodeBDVAddr64Disp12Operand() : SystemZDisassembler.cpp
• decodeBDXAddr12Operand() : SystemZDisassembler.cpp
• decodeBDXAddr20Operand() : SystemZDisassembler.cpp
• decodeBDXAddr64Disp12Operand() : SystemZDisassembler.cpp
• decodeBDXAddr64Disp20Operand() : SystemZDisassembler.cpp
• decodeBField() : ARCDisassembler.cpp
• DecodeBgtzGroupBranch() : MipsDisassembler.cpp
• DecodeBgtzGroupBranchMMR6() : MipsDisassembler.cpp
• DecodeBgtzlGroupBranch() : MipsDisassembler.cpp
• DecodeBitfieldMaskOperand() : ARMDisassembler.cpp
• DecodeBitpOperand() : XCoreDisassembler.cpp
• DecodeBlezGroupBranch() : MipsDisassembler.cpp
• DecodeBlezGroupBranchMMR6() : MipsDisassembler.cpp
• DecodeBlezlGroupBranch() : MipsDisassembler.cpp
• decodeBranch() : LanaiDisassembler.cpp
• DecodeBranchImmInstruction() : ARMDisassembler.cpp
• DecodeBranchTarget() : MipsDisassembler.cpp
• DecodeBranchTarget10MM() : MipsDisassembler.cpp
• DecodeBranchTarget1SImm16() : MipsDisassembler.cpp
• DecodeBranchTarget21() : MipsDisassembler.cpp
• DecodeBranchTarget21MM() : MipsDisassembler.cpp
• DecodeBranchTarget26() : MipsDisassembler.cpp
• DecodeBranchTarget26MM() : MipsDisassembler.cpp
• DecodeBranchTarget7MM() : MipsDisassembler.cpp
• DecodeBranchTargetMM() : MipsDisassembler.cpp
• DecodeBranchTargetS() : ARCDisassembler.cpp
• DecodeCacheeOp_CacheOpR6() : MipsDisassembler.cpp
• DecodeCacheOp() : MipsDisassembler.cpp
• DecodeCacheOpMM() : MipsDisassembler.cpp
• DecodeCall() : SparcDisassembler.cpp
• DecodeCCOutOperand() : ARMDisassembler.cpp
• DecodeCCRRegisterClass() : MipsDisassembler.cpp
• decodeCField() : ARCDisassembler.cpp
• DecodeCGImm() : MSP430Disassembler.cpp
• decodeCLUIImmOperand() : RISCVDisassembler.cpp
• DecodeCOP0RegisterClass() : MipsDisassembler.cpp
• DecodeCOP2RegisterClass() : MipsDisassembler.cpp
• DecodeCopMemInstruction() : ARMDisassembler.cpp
• DecodeCoprocessor() : ARMDisassembler.cpp
• DecodeCPPairRegisterClass() : SparcDisassembler.cpp
• DecodeCPRegsRegisterClass() : SparcDisassembler.cpp
• DecodeCPSInstruction() : ARMDisassembler.cpp
• DecodeCPU16RegsRegisterClass() : MipsDisassembler.cpp
• DecodeCR64BitRegisterClass() : SystemZDisassembler.cpp
• decodeCRBitMOperand() : PPCDisassembler.cpp
• DecodeCRBITRCRegisterClass() : PPCDisassembler.cpp
• DecodeCRC() : MipsDisassembler.cpp
• DecodeCRRC0RegisterClass() : PPCDisassembler.cpp
• DecodeCRRCRegisterClass() : PPCDisassembler.cpp
• DecodeCtrRegs64RegisterClass() : HexagonDisassembler.cpp
• DecodeCtrRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeDaddiGroupBranch() : MipsDisassembler.cpp
• DecodeDAHIDATI() : MipsDisassembler.cpp
• DecodeDAHIDATIMMR6() : MipsDisassembler.cpp
• DecodeDDDDRegisterClass() : AArch64Disassembler.cpp
• DecodeDDDRegisterClass() : AArch64Disassembler.cpp
• DecodeDDRegisterClass() : AArch64Disassembler.cpp
• DecodeDEXT() : MipsDisassembler.cpp
• DecodeDFPRegsRegisterClass() : SparcDisassembler.cpp
• DecodeDINS() : MipsDisassembler.cpp
• DecodeDoubleRegLoad() : ARMDisassembler.cpp
• DecodeDoubleRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeDoubleRegStore() : ARMDisassembler.cpp
• DecodeDPairRegisterClass() : ARMDisassembler.cpp
• DecodeDPairSpacedRegisterClass() : ARMDisassembler.cpp
• DecodeDPR_8RegisterClass() : ARMDisassembler.cpp
• DecodeDPR_VFP2RegisterClass() : ARMDisassembler.cpp
• DecodeDPRRegisterClass() : ARMDisassembler.cpp
• DecodeDPRRegListOperand() : ARMDisassembler.cpp
• DecodeDSPRRegisterClass() : MipsDisassembler.cpp
• DecodeDstAddrMode() : MSP430Disassembler.cpp
• DecodeDWARFEncoding() : AsmPrinterDwarf.cpp
• DecodeExclusiveLdStInstruction() : AArch64Disassembler.cpp
• DecodeF4RCRegisterClass() : PPCDisassembler.cpp
• DecodeF8RCRegisterClass() : PPCDisassembler.cpp
• DecodeFCCRegisterClass() : MipsDisassembler.cpp
• DecodeFCCRegsRegisterClass() : SparcDisassembler.cpp
• DecodeFGR32RegisterClass() : MipsDisassembler.cpp
• DecodeFGR64RegisterClass() : MipsDisassembler.cpp
• DecodeFGRCCRegisterClass() : MipsDisassembler.cpp
• DecodeFixedPointScaleImm32() : AArch64Disassembler.cpp
• DecodeFixedPointScaleImm64() : AArch64Disassembler.cpp
• DecodeFixedType() : Function.cpp
• DecodeFMem() : MipsDisassembler.cpp
• DecodeFMem2() : MipsDisassembler.cpp
• DecodeFMem3() : MipsDisassembler.cpp
• DecodeFMemCop2MMR6() : MipsDisassembler.cpp
• DecodeFMemCop2R6() : MipsDisassembler.cpp
• DecodeFMemMMR2() : MipsDisassembler.cpp
• DecodeFMOVLaneInstruction() : AArch64Disassembler.cpp
• DecodeForVMRSandVMSR() : ARMDisassembler.cpp
• DecodeFP128BitRegisterClass() : SystemZDisassembler.cpp
• DecodeFP32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeFP64BitRegisterClass() : SystemZDisassembler.cpp
• DecodeFPR128_loRegisterClass() : AArch64Disassembler.cpp
• DecodeFPR128RegisterClass() : AArch64Disassembler.cpp
• DecodeFPR16RegisterClass() : AArch64Disassembler.cpp
• DecodeFPR32CRegisterClass() : RISCVDisassembler.cpp
• DecodeFPR32RegisterClass() : AArch64Disassembler.cpp , RISCVDisassembler.cpp
• DecodeFPR64CRegisterClass() : RISCVDisassembler.cpp
• DecodeFPR64RegisterClass() : AArch64Disassembler.cpp , RISCVDisassembler.cpp
• DecodeFPR8RegisterClass() : AArch64Disassembler.cpp
• DecodeFPRegsRegisterClass() : SparcDisassembler.cpp
• decodeFRMArg() : RISCVDisassembler.cpp
• DecodeFromCyclicRange() : ARCDisassembler.cpp
• DecodeFunc : AVRDisassembler.cpp , SparcDisassembler.cpp , BPFDisassembler.cpp
• DecodeG8RC_NOX0RegisterClass() : PPCDisassembler.cpp
• DecodeG8RCRegisterClass() : PPCDisassembler.cpp
• DecodeGBR32ShortRegister() : ARCDisassembler.cpp
• DecodeGeneralDoubleLow8RegsRegisterClass() : HexagonDisassembler.cpp
• DecodeGeneralSubRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeGPR32RegisterClass() : AArch64Disassembler.cpp , BPFDisassembler.cpp , MipsDisassembler.cpp , ARCDisassembler.cpp
• DecodeGPR32spRegisterClass() : AArch64Disassembler.cpp
• DecodeGPR64commonRegisterClass() : AArch64Disassembler.cpp
• DecodeGPR64RegisterClass() : AArch64Disassembler.cpp , MipsDisassembler.cpp
• DecodeGPR64spRegisterClass() : AArch64Disassembler.cpp
• DecodeGPR8RegisterClass() : AVRDisassembler.cpp
• DecodeGPRC_NOR0RegisterClass() : PPCDisassembler.cpp
• DecodeGPRCRegisterClass() : PPCDisassembler.cpp , RISCVDisassembler.cpp
• DecodeGPRMM16MovePRegisterClass() : MipsDisassembler.cpp
• DecodeGPRMM16RegisterClass() : MipsDisassembler.cpp
• DecodeGPRMM16ZeroRegisterClass() : MipsDisassembler.cpp
• DecodeGPRnopcRegisterClass() : ARMDisassembler.cpp
• DecodeGPRNoX0RegisterClass() : RISCVDisassembler.cpp
• DecodeGPRNoX0X2RegisterClass() : RISCVDisassembler.cpp
• DecodeGPRPairRegisterClass() : ARMDisassembler.cpp
• DecodeGPRRegisterClass() : ARMDisassembler.cpp , LanaiDisassembler.cpp , RISCVDisassembler.cpp , BPFDisassembler.cpp
• DecodeGPRSeqPairsClassRegisterClass() : AArch64Disassembler.cpp
• DecodeGPRwithAPSRRegisterClass() : ARMDisassembler.cpp
• DecodeGR128BitRegisterClass() : SystemZDisassembler.cpp
• DecodeGR16RegisterClass() : MSP430Disassembler.cpp
• DecodeGR32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeGR64BitRegisterClass() : SystemZDisassembler.cpp
• DecodeGR8RegisterClass() : MSP430Disassembler.cpp
• DecodeGRH32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeGRRegsRegisterClass() : XCoreDisassembler.cpp
• DecodeGuestRegs64RegisterClass() : HexagonDisassembler.cpp
• DecodeGuestRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeHI32DSPRegisterClass() : MipsDisassembler.cpp
• DecodeHINTInstruction() : ARMDisassembler.cpp
• DecodeHPRRegisterClass() : ARMDisassembler.cpp
• DecodeHvxQRRegisterClass() : HexagonDisassembler.cpp
• DecodeHvxVQRRegisterClass() : HexagonDisassembler.cpp
• DecodeHvxVRRegisterClass() : HexagonDisassembler.cpp
• DecodeHvxWRRegisterClass() : HexagonDisassembler.cpp
• DecodeHWRegsRegisterClass() : MipsDisassembler.cpp
• DecodeI64RegsRegisterClass() : SparcDisassembler.cpp
• DecodeIITType() : Function.cpp
• DecodeImm8OptLsl() : AArch64Disassembler.cpp
• DecodeInsSize() : MipsDisassembler.cpp
• DecodeInstSyncBarrierOption() : ARMDisassembler.cpp
• DecodeINSVE_DF() : MipsDisassembler.cpp
• DecodeIntPairRegisterClass() : SparcDisassembler.cpp
• DecodeIntRegsLow8RegisterClass() : HexagonDisassembler.cpp
• DecodeIntRegsRegisterClass() : HexagonDisassembler.cpp , SparcDisassembler.cpp
• DecodeIT() : ARMDisassembler.cpp
• DecodeJMPL() : SparcDisassembler.cpp
• DecodeJumpTarget() : MipsDisassembler.cpp
• DecodeJumpTargetMM() : MipsDisassembler.cpp
• DecodeL2OpInstructionFail() : XCoreDisassembler.cpp
• DecodeL2RInstruction() : XCoreDisassembler.cpp
• DecodeL2RUSBitpInstruction() : XCoreDisassembler.cpp
• DecodeL2RUSInstruction() : XCoreDisassembler.cpp
• DecodeL3RInstruction() : XCoreDisassembler.cpp
• DecodeL3RSrcDstInstruction() : XCoreDisassembler.cpp
• DecodeL4RSrcDstInstruction() : XCoreDisassembler.cpp
• DecodeL4RSrcDstSrcDstInstruction() : XCoreDisassembler.cpp
• DecodeL5RInstruction() : XCoreDisassembler.cpp
• DecodeL5RInstructionFail() : XCoreDisassembler.cpp
• DecodeL6RInstruction() : XCoreDisassembler.cpp
• DecodeLD8RegisterClass() : AVRDisassembler.cpp
• DecodeLdLImmInstruction() : ARCDisassembler.cpp
• DecodeLDR() : ARMDisassembler.cpp
• DecodeLdRLImmInstruction() : ARCDisassembler.cpp
• DecodeLDRPreImm() : ARMDisassembler.cpp
• DecodeLDRPreReg() : ARMDisassembler.cpp
• DecodeLi16Imm() : MipsDisassembler.cpp
• decodeLLVMAttributesForBitcode() : BitcodeReader.cpp
• DecodeLO32DSPRegisterClass() : MipsDisassembler.cpp
• DecodeLoadAllocTagArrayInstruction() : AArch64Disassembler.cpp
• DecodeLoadByte15() : MipsDisassembler.cpp
• DecodeLoadCP() : SparcDisassembler.cpp
• DecodeLoadCPPair() : SparcDisassembler.cpp
• DecodeLoadDFP() : SparcDisassembler.cpp
• DecodeLoadFP() : SparcDisassembler.cpp
• DecodeLoadInt() : SparcDisassembler.cpp
• DecodeLoadIntPair() : SparcDisassembler.cpp
• DecodeLoadQFP() : SparcDisassembler.cpp
• DecodeLogicalImmInstruction() : AArch64Disassembler.cpp
• DecodeLR2RInstruction() : XCoreDisassembler.cpp
• DecodeMem() : MipsDisassembler.cpp , SparcDisassembler.cpp
• DecodeMemBarrierOption() : ARMDisassembler.cpp
• DecodeMemEVA() : MipsDisassembler.cpp
• DecodeMemExtend() : AArch64Disassembler.cpp
• DecodeMemMMGPImm7Lsl2() : MipsDisassembler.cpp
• DecodeMemMMImm12() : MipsDisassembler.cpp
• DecodeMemMMImm16() : MipsDisassembler.cpp
• DecodeMemMMImm4() : MipsDisassembler.cpp
• DecodeMemMMImm9() : MipsDisassembler.cpp
• DecodeMemMMReglistImm4Lsl2() : MipsDisassembler.cpp
• DecodeMemMMSPImm5Lsl2() : MipsDisassembler.cpp
• DecodeMemMultipleWritebackInstruction() : ARMDisassembler.cpp
• DecodeMemOperand() : MSP430Disassembler.cpp
• decodeMemoryOpValue() : BPFDisassembler.cpp
• decodeMemRIOperands() : PPCDisassembler.cpp
• decodeMemRIX16Operands() : PPCDisassembler.cpp
• decodeMemRIXOperands() : PPCDisassembler.cpp
• DecodeMEMrs9() : ARCDisassembler.cpp
• DecodeModImmInstruction() : AArch64Disassembler.cpp
• DecodeModImmTiedInstruction() : AArch64Disassembler.cpp
• DecodeModRegsRegisterClass() : HexagonDisassembler.cpp
• DecodeMoveHRegInstruction() : ARCDisassembler.cpp
• DecodeMoveImmInstruction() : AArch64Disassembler.cpp
• DecodeMovePOperands() : MipsDisassembler.cpp
• DecodeMovePRegPair() : MipsDisassembler.cpp
• DecodeMRSSystemRegister() : AArch64Disassembler.cpp
• DecodeMSA128BRegisterClass() : MipsDisassembler.cpp
• DecodeMSA128DRegisterClass() : MipsDisassembler.cpp
• DecodeMSA128HRegisterClass() : MipsDisassembler.cpp
• DecodeMSA128Mem() : MipsDisassembler.cpp
• DecodeMSA128WRegisterClass() : MipsDisassembler.cpp
• DecodeMSACtrlRegisterClass() : MipsDisassembler.cpp
• DecodeMSRMask() : ARMDisassembler.cpp
• DecodeMSRSystemRegister() : AArch64Disassembler.cpp
• decodeMultiByteChar() : MicrosoftDemangle.cpp
• DecodeNegImmOperand() : XCoreDisassembler.cpp
• DecodeNEONComplexLane64Instruction() : ARMDisassembler.cpp
• DecodeNEONModImmInstruction() : ARMDisassembler.cpp
• decodeOperand_VSrc16() : AMDGPUDisassembler.cpp
• decodeOperand_VSrcV216() : AMDGPUDisassembler.cpp
• DecodePairLdStInstruction() : AArch64Disassembler.cpp
• DecodePALIGNRMask() : X86InterleavedAccess.cpp
• decodePC12DBLBranchOperand() : SystemZDisassembler.cpp
• decodePC16DBLBranchOperand() : SystemZDisassembler.cpp
• decodePC24DBLBranchOperand() : SystemZDisassembler.cpp
• decodePC32DBLBranchOperand() : SystemZDisassembler.cpp
• decodePC32DBLOperand() : SystemZDisassembler.cpp
• decodePCDBLOperand() : SystemZDisassembler.cpp
• DecodePCRel24BranchTarget() : PPCDisassembler.cpp
• DecodePCRelLabel19() : AArch64Disassembler.cpp
• DecodePointerLikeRegClass0 : PPCDisassembler.cpp
• DecodePointerLikeRegClass1 : PPCDisassembler.cpp
• DecodePOOL16BEncodedField() : MipsDisassembler.cpp
• DecodePOP35GroupBranchMMR6() : MipsDisassembler.cpp
• DecodePOP37GroupBranchMMR6() : MipsDisassembler.cpp
• DecodePOP65GroupBranchMMR6() : MipsDisassembler.cpp
• DecodePOP75GroupBranchMMR6() : MipsDisassembler.cpp
• DecodePostIdxReg() : ARMDisassembler.cpp
• DecodePPR_3bRegisterClass() : AArch64Disassembler.cpp
• DecodePPRRegisterClass() : AArch64Disassembler.cpp
• decodePredicateOperand() : LanaiDisassembler.cpp
• DecodePredicateOperand() : ARMDisassembler.cpp
• DecodePredRegsRegisterClass() : HexagonDisassembler.cpp
• DecodePrefeOpMM() : MipsDisassembler.cpp
• DecodePRRegsRegisterClass() : SparcDisassembler.cpp
• DecodePtrRegisterClass() : MipsDisassembler.cpp
• DecodePTRREGSRegisterClass() : AVRDisassembler.cpp
• DecodeQADDInstruction() : ARMDisassembler.cpp
• DecodeQBRCRegisterClass : PPCDisassembler.cpp
• DecodeQFPRegsRegisterClass() : SparcDisassembler.cpp
• DecodeQFRCRegisterClass() : PPCDisassembler.cpp
• DecodeQPRRegisterClass() : ARMDisassembler.cpp
• DecodeQQQQRegisterClass() : AArch64Disassembler.cpp
• DecodeQQQRegisterClass() : AArch64Disassembler.cpp
• DecodeQQRegisterClass() : AArch64Disassembler.cpp
• DecodeQSRCRegisterClass : PPCDisassembler.cpp
• DecodeR2RInstruction() : XCoreDisassembler.cpp
• decodeRegisterClass() : SystemZDisassembler.cpp
• DecodeRegisterClass() : HexagonDisassembler.cpp
• decodeRegisterClass() : PPCDisassembler.cpp
• DecodeRegListOperand() : MipsDisassembler.cpp , ARMDisassembler.cpp
• DecodeRegListOperand16() : MipsDisassembler.cpp
• DecodeReturn() : SparcDisassembler.cpp
• DecodeRFEInstruction() : ARMDisassembler.cpp
• DecoderForMRRC2AndMCRR2() : ARMDisassembler.cpp
• DecoderGPRRegisterClass() : ARMDisassembler.cpp
• decodeRiMemoryValue() : LanaiDisassembler.cpp
• DecodeRRegsRegisterClass() : XCoreDisassembler.cpp
• decodeRrMemoryValue() : LanaiDisassembler.cpp
• DecodeRUSBitpInstruction() : XCoreDisassembler.cpp
• DecodeRUSInstruction() : XCoreDisassembler.cpp
• DecodeRUSSrcDstBitpInstruction() : XCoreDisassembler.cpp
• decodeS16ImmOperand() : SystemZDisassembler.cpp
• decodeS32ImmOperand() : SystemZDisassembler.cpp
• decodeS8ImmOperand() : SystemZDisassembler.cpp
• DecodeSETPANInstruction() : ARMDisassembler.cpp
• decodeShiftImm() : LanaiDisassembler.cpp
• DecodeShiftRight16Imm() : ARMDisassembler.cpp
• DecodeShiftRight32Imm() : ARMDisassembler.cpp
• DecodeShiftRight64Imm() : ARMDisassembler.cpp
• DecodeShiftRight8Imm() : ARMDisassembler.cpp
• DecodeSignedLdStInstruction() : AArch64Disassembler.cpp
• DecodeSignedOperand() : ARCDisassembler.cpp
• DecodeSImm() : AArch64Disassembler.cpp
• DecodeSIMM13() : SparcDisassembler.cpp
• DecodeSimm18Lsl3() : MipsDisassembler.cpp
• DecodeSimm19Lsl2() : MipsDisassembler.cpp
• DecodeSimm23Lsl2() : MipsDisassembler.cpp
• DecodeSimm9SP() : MipsDisassembler.cpp
• decodeSImmNonZeroOperand() : RISCVDisassembler.cpp
• decodeSImmOperand() : PPCDisassembler.cpp , SystemZDisassembler.cpp , RISCVDisassembler.cpp
• decodeSImmOperandAndLsl1() : RISCVDisassembler.cpp
• DecodeSImmWithOffsetAndScale() : MipsDisassembler.cpp
• DecodeSMLAInstruction() : ARMDisassembler.cpp
• decodeSoppBrTarget() : AMDGPUDisassembler.cpp
• DecodeSORegImmOperand() : ARMDisassembler.cpp
• DecodeSORegMemOperand() : ARMDisassembler.cpp
• DecodeSORegRegOperand() : ARMDisassembler.cpp
• decodeSPE2Operands() : PPCDisassembler.cpp
• decodeSPE4Operands() : PPCDisassembler.cpp
• DecodeSPE4RCRegisterClass() : PPCDisassembler.cpp
• decodeSPE8Operands() : PPCDisassembler.cpp
• DecodeSpecial3LlSc() : MipsDisassembler.cpp
• DecodeSPERCRegisterClass() : PPCDisassembler.cpp
• decodeSplsValue() : LanaiDisassembler.cpp
• DecodeSPRRegisterClass() : ARMDisassembler.cpp
• DecodeSPRRegListOperand() : ARMDisassembler.cpp
• DecodeSrcAddrMode() : MSP430Disassembler.cpp
• DecodeSrcAddrModeI() : MSP430Disassembler.cpp
• DecodeSrcAddrModeII() : MSP430Disassembler.cpp
• DecodeStatus : HexagonDisassembler.cpp , PPCDisassembler.cpp , ARCDisassembler.cpp , AArch64Disassembler.cpp , AVRDisassembler.cpp , BPFDisassembler.cpp , MipsDisassembler.cpp , SparcDisassembler.cpp , SystemZDisassembler.cpp , WebAssemblyDisassembler.cpp , XCoreDisassembler.cpp , RISCVDisassembler.cpp , LanaiDisassembler.cpp , ARMDisassembler.cpp , AMDGPUDisassembler.cpp , MSP430Disassembler.cpp
• DecodeStLImmInstruction() : ARCDisassembler.cpp
• DecodeStoreCP() : SparcDisassembler.cpp
• DecodeStoreCPPair() : SparcDisassembler.cpp
• DecodeStoreDFP() : SparcDisassembler.cpp
• DecodeStoreFP() : SparcDisassembler.cpp
• DecodeStoreInt() : SparcDisassembler.cpp
• DecodeStoreIntPair() : SparcDisassembler.cpp
• DecodeStoreQFP() : SparcDisassembler.cpp
• DecodeSTRPreImm() : ARMDisassembler.cpp
• DecodeSTRPreReg() : ARMDisassembler.cpp
• DecodeSVEIncDecImm() : AArch64Disassembler.cpp
• DecodeSVELogicalImmInstruction() : AArch64Disassembler.cpp
• DecodeSwap() : ARMDisassembler.cpp
• DecodeSWAP() : SparcDisassembler.cpp
• DecodeSymbolicOperand() : ARCDisassembler.cpp
• DecodeSymbolicOperandOff() : ARCDisassembler.cpp
• DecodeSyncI() : MipsDisassembler.cpp
• DecodeSyncI_MM() : MipsDisassembler.cpp
• DecodeSynciR6() : MipsDisassembler.cpp
• DecodeSystemPStateInstruction() : AArch64Disassembler.cpp
• DecodeT2AddrModeImm0_1020s4() : ARMDisassembler.cpp
• DecodeT2AddrModeImm12() : ARMDisassembler.cpp
• DecodeT2AddrModeImm8() : ARMDisassembler.cpp
• DecodeT2AddrModeImm8s4() : ARMDisassembler.cpp
• DecodeT2AddrModeSOReg() : ARMDisassembler.cpp
• DecodeT2Adr() : ARMDisassembler.cpp
• DecodeT2BInstruction() : ARMDisassembler.cpp
• DecodeT2BROperand() : ARMDisassembler.cpp
• DecodeT2CPSInstruction() : ARMDisassembler.cpp
• DecodeT2Imm8() : ARMDisassembler.cpp
• DecodeT2Imm8S4() : ARMDisassembler.cpp
• DecodeT2LDRDPreInstruction() : ARMDisassembler.cpp
• DecodeT2LdStPre() : ARMDisassembler.cpp
• DecodeT2LoadImm12() : ARMDisassembler.cpp
• DecodeT2LoadImm8() : ARMDisassembler.cpp
• DecodeT2LoadLabel() : ARMDisassembler.cpp
• DecodeT2LoadShift() : ARMDisassembler.cpp
• DecodeT2LoadT() : ARMDisassembler.cpp
• DecodeT2MOVTWInstruction() : ARMDisassembler.cpp
• DecodeT2ShifterImmOperand() : ARMDisassembler.cpp
• DecodeT2SOImm() : ARMDisassembler.cpp
• DecodeT2STRDPreInstruction() : ARMDisassembler.cpp
• DecodeTBLInstruction() : ARMDisassembler.cpp
• DecodetcGPRRegisterClass() : ARMDisassembler.cpp
• DecodeTestAndBranch() : AArch64Disassembler.cpp
• DecodetGPRRegisterClass() : ARMDisassembler.cpp
• DecodeThreeAddrSRegInstruction() : AArch64Disassembler.cpp
• DecodeThumb2BCCInstruction() : ARMDisassembler.cpp
• DecodeThumbAddrModeIS() : ARMDisassembler.cpp
• DecodeThumbAddrModePC() : ARMDisassembler.cpp
• DecodeThumbAddrModeRR() : ARMDisassembler.cpp
• DecodeThumbAddrModeSP() : ARMDisassembler.cpp
• DecodeThumbAddSpecialReg() : ARMDisassembler.cpp
• DecodeThumbAddSPImm() : ARMDisassembler.cpp
• DecodeThumbAddSPReg() : ARMDisassembler.cpp
• DecodeThumbBCCTargetOperand() : ARMDisassembler.cpp
• DecodeThumbBLTargetOperand() : ARMDisassembler.cpp
• DecodeThumbBLXOffset() : ARMDisassembler.cpp
• DecodeThumbBROperand() : ARMDisassembler.cpp
• DecodeThumbCmpBROperand() : ARMDisassembler.cpp
• DecodeThumbCPS() : ARMDisassembler.cpp
• DecodeThumbTableBranch() : ARMDisassembler.cpp
• DecodeTRAP() : SparcDisassembler.cpp
• DecodeTSTInstruction() : ARMDisassembler.cpp
• decodeU12ImmOperand() : SystemZDisassembler.cpp
• decodeU16ImmOperand() : SystemZDisassembler.cpp
• decodeU1ImmOperand() : SystemZDisassembler.cpp
• decodeU2ImmOperand() : SystemZDisassembler.cpp
• decodeU32ImmOperand() : SystemZDisassembler.cpp
• decodeU3ImmOperand() : SystemZDisassembler.cpp
• decodeU4ImmOperand() : SystemZDisassembler.cpp
• decodeU6ImmOperand() : SystemZDisassembler.cpp
• decodeU8ImmOperand() : SystemZDisassembler.cpp
• decodeUImmNonZeroOperand() : RISCVDisassembler.cpp
• decodeUImmOperand() : SystemZDisassembler.cpp , PPCDisassembler.cpp , RISCVDisassembler.cpp
• DecodeUImmWithOffset() : MipsDisassembler.cpp
• DecodeUImmWithOffsetAndScale() : MipsDisassembler.cpp
• DecodeUnconditionalBranch() : AArch64Disassembler.cpp
• DecodeUnsignedLdStInstruction() : AArch64Disassembler.cpp
• decodeUTF8() : YAMLParser.cpp
• DecodeVCVTD() : ARMDisassembler.cpp
• DecodeVCVTQ() : ARMDisassembler.cpp
• DecodeVecShiftL16Imm() : AArch64Disassembler.cpp
• DecodeVecShiftL32Imm() : AArch64Disassembler.cpp
• DecodeVecShiftL64Imm() : AArch64Disassembler.cpp
• DecodeVecShiftL8Imm() : AArch64Disassembler.cpp
• DecodeVecShiftLImm() : AArch64Disassembler.cpp
• DecodeVecShiftR16Imm() : AArch64Disassembler.cpp
• DecodeVecShiftR16ImmNarrow() : AArch64Disassembler.cpp
• DecodeVecShiftR32Imm() : AArch64Disassembler.cpp
• DecodeVecShiftR32ImmNarrow() : AArch64Disassembler.cpp
• DecodeVecShiftR64Imm() : AArch64Disassembler.cpp
• DecodeVecShiftR64ImmNarrow() : AArch64Disassembler.cpp
• DecodeVecShiftR8Imm() : AArch64Disassembler.cpp
• DecodeVecShiftRImm() : AArch64Disassembler.cpp
• DecodeVectorRegisterClass() : AArch64Disassembler.cpp
• DecodeVFRCRegisterClass() : PPCDisassembler.cpp
• DecodeVLD1DupInstruction() : ARMDisassembler.cpp
• DecodeVLD1LN() : ARMDisassembler.cpp
• DecodeVLD2DupInstruction() : ARMDisassembler.cpp
• DecodeVLD2LN() : ARMDisassembler.cpp
• DecodeVLD3DupInstruction() : ARMDisassembler.cpp
• DecodeVLD3LN() : ARMDisassembler.cpp
• DecodeVLD4DupInstruction() : ARMDisassembler.cpp
• DecodeVLD4LN() : ARMDisassembler.cpp
• DecodeVLDInstruction() : ARMDisassembler.cpp
• DecodeVLDST1Instruction() : ARMDisassembler.cpp
• DecodeVLDST2Instruction() : ARMDisassembler.cpp
• DecodeVLDST3Instruction() : ARMDisassembler.cpp
• DecodeVLDST4Instruction() : ARMDisassembler.cpp
• DecodeVMOVRRS() : ARMDisassembler.cpp
• DecodeVMOVSRR() : ARMDisassembler.cpp
• DecodeVR128BitRegisterClass() : SystemZDisassembler.cpp
• DecodeVR32BitRegisterClass() : SystemZDisassembler.cpp
• DecodeVR64BitRegisterClass() : SystemZDisassembler.cpp
• DecodeVRRCRegisterClass() : PPCDisassembler.cpp
• DecodeVSFRCRegisterClass() : PPCDisassembler.cpp
• DecodeVSHLMaxInstruction() : ARMDisassembler.cpp
• DecodeVSRCRegisterClass() : PPCDisassembler.cpp
• DecodeVSSRCRegisterClass() : PPCDisassembler.cpp
• DecodeVST1LN() : ARMDisassembler.cpp
• DecodeVST2LN() : ARMDisassembler.cpp
• DecodeVST3LN() : ARMDisassembler.cpp
• DecodeVST4LN() : ARMDisassembler.cpp
• DecodeVSTInstruction() : ARMDisassembler.cpp
• DecodeWSeqPairsClassRegisterClass() : AArch64Disassembler.cpp
• DecodeXSeqPairsClassRegisterClass() : AArch64Disassembler.cpp
• DecodeZPR2RegisterClass() : AArch64Disassembler.cpp
• DecodeZPR3RegisterClass() : AArch64Disassembler.cpp
• DecodeZPR4RegisterClass() : AArch64Disassembler.cpp
• DecodeZPR_3bRegisterClass() : AArch64Disassembler.cpp
• DecodeZPR_4bRegisterClass() : AArch64Disassembler.cpp
• DecodeZPRRegisterClass() : AArch64Disassembler.cpp
• decomposeBitTestICmp() : InstCombineAndOrXor.cpp
• decomposeSimpleLinearExpr() : InstCombineCasts.cpp
• decreaseSetPressure() : RegisterPressure.cpp
• decrementVectorConstant() : X86ISelLowering.cpp
• deduceFunctionAttributeInRPO() : FunctionAttrs.cpp
• Default : DwarfDebug.cpp , MCAsmInfo.cpp , AArch64MCAsmInfo.cpp
• DEFAULT_ADDRSPACE : AsmParser.cpp
• DEFAULT_DLLNAME : jitprofiling.c
• DEFAULT_VEC_SLOTS : AMDILCFGStructurizer.cpp
• DefaultAliasRegex : PassBuilder.cpp
• DefaultAlignments : DataLayout.cpp
• DefaultArch : HexagonMCTargetDesc.cpp
• DefaultAS : LLParser.cpp
• DefaultCutoffsData : ProfileSummaryBuilder.cpp
• DefaultExitBlockBeforeBody : GCOVProfiling.cpp
• DefaultGCOVVersion : GCOVProfiling.cpp
• DefaultIT : ARMSubtarget.cpp
• DefaultLinkageNames : DwarfDebug.cpp
• defaultListDAGScheduler : SelectionDAGISel.cpp
• DefaultMappingID : RegisterBankInfo.h
• DefaultOnOff : DwarfDebug.cpp , MCAsmInfo.cpp
• defaultRegAlloc : TargetPassConfig.cpp
• DefaultRotationThreshold : LoopRotation.cpp
• DefaultSafeSPDisplacement : AArch64FrameLowering.cpp
• DefaultSchedRegistry : MachineScheduler.cpp
• DefaultTimerGroup : Timer.cpp
• DEFINE_GETIMPL_LOOKUP : DebugInfoMetadata.cpp
• DEFINE_GETIMPL_STORE : DebugInfoMetadata.cpp
• DEFINE_GETIMPL_STORE_N : DebugInfoMetadata.cpp
• DEFINE_GETIMPL_STORE_NO_CONSTRUCTOR_ARGS : DebugInfoMetadata.cpp
• DEFINE_GETIMPL_STORE_NO_OPS : DebugInfoMetadata.cpp
• DEFINE_HELPERS : InstrTypes.h
• DEFINE_ISA_CONVERSION_FUNCTIONS : CBindingWrapping.h
• DEFINE_MDNODE_GET : DebugInfoMetadata.h
• DEFINE_MDNODE_GET_DISTINCT_TEMPORARY : DebugInfoMetadata.h
• DEFINE_MDNODE_GET_UNPACK : DebugInfoMetadata.h
• DEFINE_MDNODE_GET_UNPACK_IMPL : DebugInfoMetadata.h
• DEFINE_PPC_REGCLASSES : PPCAsmParser.cpp , PPCDisassembler.cpp , PPCMCTargetDesc.h
• DEFINE_SIMPLE_CONVERSION_FUNCTIONS : CBindingWrapping.h
• DEFINE_STDCXX_CONVERSION_FUNCTIONS : CBindingWrapping.h
• DEFINE_SYMBOL_TABLE_PARENT_TYPE : SymbolTableListTraits.h
• DEFINE_TRANSPARENT_OPERAND_ACCESSORS : OperandTraits.h
• definedInCaller() : CodeExtractor.cpp
• definedInRegion() : CodeExtractor.cpp
• defineExternalNode() : ModuleSummaryIndex.cpp
• definesFullReg() : RegisterCoalescer.cpp
• DefMI : AArch64ExpandPseudoInsts.cpp
• DELEGATE : InstVisitor.h
• DeleteBasicBlock() : PruneEH.cpp
• deleteDeadBlocksFromLoop() : SimpleLoopUnswitch.cpp
• deleteDeadClonedBlocks() : SimpleLoopUnswitch.cpp
• deleteDeadInstruction() : LoopIdiomRecognize.cpp , DeadStoreElimination.cpp
• deleteIfDead() : GlobalOpt.cpp
• deleteLoopIfDead() : LoopDeletion.cpp
• DeleteTriviallyDeadInstructions() : LoopStrengthReduce.cpp
• deletion : LoopDeletion.cpp
• delinearization_name : Delinearization.cpp
• Delinearize : DependenceAnalysis.cpp
• demangleFunctionRefQualifier() : MicrosoftDemangle.cpp
• demanglePointerCVQualifiers() : MicrosoftDemangle.cpp
• Demangler : ItaniumDemangle.cpp
• DemoteCatchSwitchPHIOnlyOpt : WinEHPrepare.cpp
• Denormalize : ScalarEvolutionNormalization.cpp
• dependencies() : DwarfCompileUnit.cpp
• DependFilename : Main.cpp
• dependsOnLocalPhi() : AMDGPUTargetTransformInfo.cpp
• DEPOTNAME : NVPTXAsmPrinter.cpp
• deriveAttrsInPostOrder() : FunctionAttrs.cpp
• despeculateCountZeros() : CodeGenPrepare.cpp
• detectAVGPattern() : X86ISelLowering.cpp
• detectAVX512SSatPattern() : X86ISelLowering.cpp
• detectAVX512USatPattern() : X86ISelLowering.cpp
• detectPMADDUBSW() : X86ISelLowering.cpp
• detectPopcountIdiom() : LoopIdiomRecognize.cpp
• detectShiftUntilZeroIdiom() : LoopIdiomRecognize.cpp
• detectSSatPattern() : X86ISelLowering.cpp
• detectUSatPattern() : X86ISelLowering.cpp
• detectZextAbsDiff() : X86ISelLowering.cpp
• determineLastCalleeSave() : ARCFrameLowering.cpp
• determineLocInfo() : MipsCallLowering.cpp
• determinePointerReadAttrs() : FunctionAttrs.cpp
• devirtualization : WholeProgramDevirt.cpp
• DFA_MAX_RESOURCES : DFAPacketizer.h
• DFA_MAX_RESTERMS : DFAPacketizer.h
• DFA_TBLTYPE : DFAPacketizer.h
• dfMips16Helper : Mips16ISelLowering.cpp
• DFPRegDecoderTable : SparcDisassembler.cpp
• DFS() : AMDGPUAnnotateUniformValues.cpp
• DFSig : Mips16HardFloat.cpp
• DI_FLAG_LARGEST_NEEDED : DebugInfoMetadata.h
• DIACategory : DIAError.cpp
• diagnosePossiblyInvalidConstraint() : SelectionDAGBuilder.cpp
• Disable : MCAsmInfo.cpp , DwarfDebug.cpp
• Disable2AddrHack : ScheduleDAGRRList.cpp
• DisableA15SDOptimization : ARMTargetMachine.cpp
• DisableAdvCopyOpt : PeepholeOptimizer.cpp
• DisableAllLoopOptsOnLoop() : InductiveRangeCheckElimination.cpp
• DisableAModeOpt : HexagonTargetMachine.cpp
• DisableBackwardSearch : MipsDelaySlotFiller.cpp
• DisableBasicAA : AliasAnalysis.cpp
• DisableBlockPlacement : TargetPassConfig.cpp
• DisableBranchFold : TargetPassConfig.cpp
• DisableBranchOpts : CodeGenPrepare.cpp
• DisableCGP : ARMCodeGenPrepare.cpp , TargetPassConfig.cpp
• DisableCleanups : WinEHPrepare.cpp
• DisableCmpOpt : PPCInstrInfo.cpp
• DisableColoring : StackColoring.cpp
• DisableComplexAddrModes : CodeGenPrepare.cpp
• DisableConstantHoisting : TargetPassConfig.cpp
• DisableCopyProp : TargetPassConfig.cpp
• DisableCTRLoopAnal : PPCInstrInfo.cpp
• DisableCTRLoops : PPCTargetMachine.cpp
• DisableDeallocRet : HexagonFrameLowering.cpp
• DisableDebugInfoPrinting : DwarfDebug.cpp
• DisableDelaySlotFiller : DelaySlotFiller.cpp , MipsDelaySlotFiller.cpp
• DisableDemotion : WinEHPrepare.cpp
• DisableDFASched : ResourcePriorityQueue.cpp
• DisableDiamond : IfConversion.cpp
• DisableEarlyIfConversion : TargetPassConfig.cpp
• DisableEarlyTailDup : TargetPassConfig.cpp
• DisableEdgeSplitting : PHIElimination.cpp
• DisableExtLdPromotion : CodeGenPrepare.cpp
• DisableFixup : HexagonAsmBackend.cpp
• DisableForkedDiamond : IfConversion.cpp
• DisableForwardSearch : MipsDelaySlotFiller.cpp
• DisableGCOpts : CodeGenPrepare.cpp
• DisableHardwareLoops : HexagonTargetMachine.cpp
• DisableHazardRecognizer : TargetInstrInfo.cpp
• DisableHCP : HexagonTargetMachine.cpp
• DisableHexagonCFGOpt : HexagonTargetMachine.cpp
• DisableHexagonMISched : HexagonSubtarget.cpp
• DisableHexagonPeephole : HexagonPeephole.cpp
• DisableHoisting : InlineSpiller.cpp
• DisableHSDR : HexagonTargetMachine.cpp
• DisableHVX : HexagonMCTargetDesc.cpp
• DisableICP : IndirectCallPromotion.cpp
• DisableILPPref : PPCISelLowering.cpp
• DisableInlinedAllocaMerging : Inliner.cpp
• DisableLazyLoading : MetadataLoader.cpp
• DisableLeafProc : SparcFrameLowering.cpp
• DisableLFTR : IndVarSimplify.cpp
• DisableLibCallsShrinkWrap : PassManagerBuilder.cpp
• DisableLoadStoreVectorizer : NVPTXTargetMachine.cpp
• DisableLSR : TargetPassConfig.cpp
• DisableMachineCSE : TargetPassConfig.cpp
• DisableMachineDCE : TargetPassConfig.cpp
• DisableMachineLICM : TargetPassConfig.cpp
• DisableMachineSink : TargetPassConfig.cpp
• DisableMemAluCombiner : LanaiMemAluCombiner.cpp
• DisableMemcpyIdiom : HexagonLoopIdiomRecognition.cpp
• DisableMemmoveIdiom : HexagonLoopIdiomRecognition.cpp
• DisableMemOPOPT : PGOMemOPSizeOpt.cpp
• DisableMergeICmps : TargetPassConfig.cpp
• DisableMIPeephole : BPFTargetMachine.cpp , PPCTargetMachine.cpp
• DisableMultiRegionPartialInline : PartialInlining.cpp
• DisableNAPhysCopyOpt : PeepholeOptimizer.cpp
• DisableNewValueJumps : HexagonNewValueJump.cpp
• DisableNoUnwindInference : FunctionAttrs.cpp
• DisableNVSchedule : HexagonInstrInfo.cpp
• DisableOptExtTo64 : HexagonPeephole.cpp
• DisableOptSZExt : HexagonPeephole.cpp
• DisablePacketizer : HexagonVLIWPacketizer.cpp
• DisableParallelDSP : ARMParallelDSP.cpp
• DisablePartialInlining : PartialInlining.cpp
• DisablePartialLibcallInlining : TargetPassConfig.cpp
• DisablePeephole : PeepholeOptimizer.cpp
• DisablePNotP : HexagonPeephole.cpp
• DisablePostRAMachineLICM : TargetPassConfig.cpp
• DisablePostRAMachineSink : TargetPassConfig.cpp
• DisablePostRASched : TargetPassConfig.cpp
• DisablePPCConstHoist : PPCTargetTransformInfo.cpp
• DisablePPCPreinc : PPCISelLowering.cpp
• DisablePPCUnaligned : PPCISelLowering.cpp
• DisablePreheaderProtect : CodeGenPrepare.cpp
• DisablePreIncPrep : PPCTargetMachine.cpp
• DisablePreInliner : PassManagerBuilder.cpp
• DisablePromotion : LICM.cpp
• DisableQPXLoadSplat : PPCTargetMachine.cpp
• DisableRequireStructuredCFG : NVPTXTargetMachine.cpp
• DisableSchedCriticalPath : ScheduleDAGRRList.cpp
• DisableSchedCycles : ScheduleDAGRRList.cpp
• DisableSchedHeight : ScheduleDAGRRList.cpp
• DisableSchedLiveUses : ScheduleDAGRRList.cpp
• DisableSchedPhysRegJoin : ScheduleDAGRRList.cpp
• DisableSchedRegPressure : ScheduleDAGRRList.cpp
• DisableSchedStalls : ScheduleDAGRRList.cpp
• DisableSchedVRegCycle : ScheduleDAGRRList.cpp
• DisableSCO : PPCISelLowering.cpp
• DisableSelectToBranch : CodeGenPrepare.cpp
• DisableSeparateConstOffsetFromGEP : SeparateConstOffsetFromGEP.cpp
• DisableSharing : StackSlotColoring.cpp
• DisableShifterOp : ARMISelDAGToDAG.cpp
• DisableShuffle : HexagonMCShuffler.cpp
• DisableSimple : IfConversion.cpp
• DisableSimpleF : IfConversion.cpp
• DisableSSC : TargetPassConfig.cpp
• DisableStoreExtract : CodeGenPrepare.cpp
• DisableStoreWidening : HexagonTargetMachine.cpp
• DisableSuccBBSearch : MipsDelaySlotFiller.cpp
• DisableSymbolication : Signals.cpp
• DisableSymbolicationFlag : Signals.cpp
• DisableTailDuplicate : TargetPassConfig.cpp
• DisableTriangle : IfConversion.cpp
• DisableTriangleF : IfConversion.cpp
• DisableTriangleFR : IfConversion.cpp
• DisableTriangleR : IfConversion.cpp
• DisableValueProfiling : PGOInstrumentation.cpp
• DisableVecDblNVStores : HexagonVLIWPacketizer.cpp
• DisableVSXFMAMutate : PPCVSXFMAMutate.cpp
• DisableVSXSwapRemoval : PPCTargetMachine.cpp
• DisableWebAssemblyFallthroughReturnOpt : WebAssemblyPeephole.cpp
• DisableX86AvoidStoreForwardBlocks : X86AvoidStoreForwardingBlocks.cpp
• DisableX86DomainReassignment : X86DomainReassignment.cpp
• DisableX86LEAOpt : X86OptimizeLEAs.cpp
• DiscoverDependentGlobals() : NVPTXAsmPrinter.cpp
• discoverTypeIndices() : TypeIndexDiscovery.cpp
• discriminators : AddDiscriminators.cpp
• DISP_FLAG_LARGEST_NEEDED : DebugInfoMetadata.h
• DispatchPackedOffsets : AMDGPULowerKernelAttributes.cpp
• DistributeNonIfConvertible : LoopDistribute.cpp
• distributeOpThroughSelect() : AMDGPUISelLowering.cpp
• DistributeSCEVCheckThreshold : LoopDistribute.cpp
• divergence : LegacyDivergenceAnalysis.cpp
• DL_NAME : Delinearization.cpp
• DLL_ENVIRONMENT_VAR : jitprofiling.c
• doCallSiteSplitting() : CallSiteSplitting.cpp
• doCandidateWalk() : MIRCanonicalizerPass.cpp
• DoComdatRenaming : PGOInstrumentation.cpp
• doDefKillClear() : MIRCanonicalizerPass.cpp
• doemit() : regcomp.c
• doesIgnoreDataTypeSuffix() : ARMAsmParser.cpp
• doesModifyCalleeSavedReg() : HexagonVLIWPacketizer.cpp
• doesNotGeneratecode() : PatchableFunction.cpp
• doesNotRequireEntrySafepointBefore() : PlaceSafepoints.cpp
• doesRoundUp() : ScaledNumber.cpp
• doesStoreDominatesAllLatches() : LoopLoadElimination.cpp
• dofwd() : regcomp.c
• doHexLookAhead() : AsmLexer.cpp
• doImportingForModule() : FunctionImport.cpp
• DoInitialMatch() : LoopStrengthReduce.cpp
• doinsert() : regcomp.c
• doInstrumentAddress() : AddressSanitizer.cpp
• DomConditionsMaxUses : ValueTracking.cpp
• domfrontier : MachineDominanceFrontier.cpp , DominanceFrontier.cpp
• DominatesMergePoint() : SimplifyCFG.cpp
• doNotCSE() : SelectionDAG.cpp
• DONT_GET_PLUGIN_LOADER_OPTION : PluginLoader.cpp
• DontExpandCondPseudos16 : Mips16ISelLowering.cpp
• DontProcessAdds : CorrelatedValuePropagation.cpp
• doPromotion() : ArgumentPromotion.cpp
• dot : GraphWriter.h
• DoubleCalcBits : BasicAliasAnalysis.cpp
• DoubleRegs : SparcAsmParser.cpp
• DoubleTyID : Mips16HardFloat.cpp
• doVRegRenaming() : MIRCanonicalizerPass.cpp
• DPairDecoderTable : ARMDisassembler.cpp
• DPairSpacedDecoderTable : ARMDisassembler.cpp
• DPP_CTRL : AMDGPUAtomicOptimizer.cpp
• DPRDecoderTable : ARMDisassembler.cpp
• DRet : Mips16HardFloat.cpp
• DROP : regcomp.c
• dropDeadSymbols() : LTOBackend.cpp
• dropRegDescribedVar() : DbgEntityHistoryCalculator.cpp
• dse : DeadStoreElimination.cpp
• DSig : Mips16HardFloat.cpp
• dsp : ARMParallelDSP.cpp
• dump() : CoroFrame.cpp
• dump_intrs : MachineCombiner.cpp
• dump_registers() : HexagonFrameLowering.cpp
• dumpAddrSection() : DWARFContext.cpp
• dumpApplePropertyAttribute() : DWARFDie.cpp
• dumpArrayType() : DWARFDie.cpp
• dumpAttribute() : DWARFDie.cpp
• dumpDataAux() : DWARFDebugFrame.cpp
• dumpDWARFv5StringOffsetsSection() : DWARFContext.cpp
• dumpExampleDependence() : DependenceAnalysis.cpp
• dumpExpression() : DWARFDebugLoc.cpp
• dumpImportListForModule() : FunctionImport.cpp
• dumpIR() : ControlHeightReduction.cpp
• dumpLocation() : DWARFDie.cpp
• dumpLoclistsSection() : DWARFContext.cpp
• dumpMachineInstrRangeWithSlotIndex() : InlineSpiller.cpp
• DumpNodes() : SelectionDAGDumper.cpp
• DumpNodesr() : SelectionDAGDumper.cpp
• dumpParentChain() : DWARFDie.cpp
• dumpRanges() : DWARFDie.cpp
• DumpRegUsage : RegisterUsageInfo.cpp
• dumpRelocs() : MipsELFObjectWriter.cpp
• dumpRnglistsSection() : DWARFContext.cpp
• dumpScopes() : ControlHeightReduction.cpp
• dumpSmallBitVector() : DependenceAnalysis.cpp
• dumpStringOffsetsSection() : DWARFContext.cpp
• dumpSUList() : ScheduleDAGInstrs.cpp
• DumpThinCGSCCs : LTO.cpp
• dumpTypeName() : DWARFDie.cpp
• dumpTypeTagName() : DWARFDie.cpp
• dumpUUID() : DWARFContext.cpp
• dupl() : regcomp.c
• duplicateCPV() : ARMBaseInstrInfo.cpp
• DuplicationThreshold : CallSiteSplitting.cpp
• DUPMAX : regcomp.c
• DupRet : SimplifyCFG.cpp
• DWARF2_FLAG_BASIC_BLOCK : MCDwarf.h
• DWARF2_FLAG_EPILOGUE_BEGIN : MCDwarf.h
• DWARF2_FLAG_IS_STMT : MCDwarf.h
• DWARF2_FLAG_PROLOGUE_END : MCDwarf.h
• DWARF2_LINE_DEFAULT_IS_STMT : MCDwarf.h
• DWARF5FormClasses : DWARFFormValue.cpp
• DWARF_CFI_PRIMARY_OPCODE_MASK : DWARFDebugFrame.cpp
• DWARF_CFI_PRIMARY_OPERAND_MASK : DWARFDebugFrame.cpp
• dwarfCCToCodeView() : CodeViewDebug.cpp
• DwarfExtendedLoc : MCAsmInfo.cpp
• DWARFGroupDescription : DwarfDebug.cpp , AsmPrinter.cpp
• DWARFGroupName : AsmPrinter.cpp , DwarfDebug.cpp
• DwarfInlinedStrings : DwarfDebug.cpp
• DWARFLineTable : DWARFContext.cpp
• DwarfLinkageNames : DwarfDebug.cpp
• DwarfSectionsAsReferences : DwarfDebug.cpp
• DWKEYWORD : LLLexer.cpp
• DYNAMIC_STRINGIFY_ENUM : ELF.cpp
• DYNAMIC_TAG : ELF.cpp , ELF.h
• DYNAMIC_TAG_MARKER : ELF.h , ELF.cpp
• DYNAMIC_TAG_MARKER_DEFINED : ELF.h
• llvm::DomTreeBuilder::ApplyUpdates< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::ApplyUpdates< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::Calculate< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::Calculate< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::CalculateWithUpdates< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::DeleteEdge< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::DeleteEdge< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::InsertEdge< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::InsertEdge< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::Verify< DomTreeBuilder::BBDomTree >() : Dominators.cpp
• llvm::DomTreeBuilder::Verify< DomTreeBuilder::BBPostDomTree >() : Dominators.cpp