LLVM
8.0.1
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This pass inserts intrinsics to handle small types that would otherwise be promoted during legalization. More...
#include "ARM.h"
#include "ARMSubtarget.h"
#include "ARMTargetMachine.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Instruction.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/IR/Verifier.h"
#include "llvm/Pass.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "arm-codegenprepare" |
Functions | |
static bool | generateSignBits (Value *V) |
static bool | EqualTypeSize (Value *V) |
static bool | LessOrEqualTypeSize (Value *V) |
static bool | GreaterThanTypeSize (Value *V) |
static bool | LessThanTypeSize (Value *V) |
static bool | isSupportedType (Value *V) |
Some instructions can use 8- and 16-bit operands, and we don't need to promote anything larger. More... | |
static bool | isSource (Value *V) |
Return true if the given value is a source in the use-def chain, producing a narrow 'TypeSize' value. More... | |
static bool | isSink (Value *V) |
Return true if V will require any promoted values to be truncated for the the IR to remain valid. More... | |
static bool | shouldPromote (Value *V) |
static bool | isPromotedResultSafe (Value *V) |
Return whether we can safely mutate V's type to ExtTy without having to be concerned with zero extending or truncation. More... | |
static Intrinsic::ID | getNarrowIntrinsic (Instruction *I) |
Return the intrinsic for the instruction that can perform the same operation but on a narrow type. More... | |
INITIALIZE_PASS_BEGIN (ARMCodeGenPrepare, DEBUG_TYPE, "ARM IR optimizations", false, false) INITIALIZE_PASS_END(ARMCodeGenPrepare | |
Variables | |
static cl::opt< bool > | DisableCGP ("arm-disable-cgp", cl::Hidden, cl::init(true), cl::desc("Disable ARM specific CodeGenPrepare pass")) |
static cl::opt< bool > | EnableDSP ("arm-enable-scalar-dsp", cl::Hidden, cl::init(false), cl::desc("Use DSP instructions for scalar operations")) |
static cl::opt< bool > | EnableDSPWithImms ("arm-enable-scalar-dsp-imms", cl::Hidden, cl::init(false), cl::desc("Use DSP instructions for scalar operations\ with immediate operands")) |
DEBUG_TYPE | |
ARM IR | optimizations |
ARM IR | false |
This pass inserts intrinsics to handle small types that would otherwise be promoted during legalization.
Here we can manually promote types or insert intrinsics which can handle narrow types that aren't supported by the register classes.
Definition in file ARMCodeGenPrepare.cpp.
#define DEBUG_TYPE "arm-codegenprepare" |
Definition at line 40 of file ARMCodeGenPrepare.cpp.
Referenced by getNarrowIntrinsic().
Definition at line 184 of file ARMCodeGenPrepare.cpp.
References llvm::Type::getScalarSizeInBits(), and llvm::Value::getType().
Referenced by getNarrowIntrinsic(), and isSource().
Definition at line 175 of file ARMCodeGenPrepare.cpp.
References getOpcode().
Referenced by getNarrowIntrinsic(), and isPromotedResultSafe().
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Return the intrinsic for the instruction that can perform the same operation but on a narrow type.
This is using the parallel dsp intrinsics on scalar values.
Definition at line 423 of file ARMCodeGenPrepare.cpp.
References llvm::MCID::Add, Arg, llvm::AMDGPU::HSAMD::Kernel::Key::Args, llvm::Intrinsic::arm_uadd16, llvm::Intrinsic::arm_uadd8, llvm::Intrinsic::arm_usub16, llvm::Intrinsic::arm_usub8, assert(), llvm::SetVector< T, Vector, Set >::back(), llvm::SmallPtrSetImplBase::clear(), llvm::iplist_impl< IntrusiveListT, TraitsT >::clear(), llvm::SmallPtrSetImpl< PtrType >::count(), llvm::dbgs(), DEBUG_TYPE, DisableCGP, llvm::User::dropAllReferences(), llvm::Value::dump(), llvm::dyn_cast(), llvm::SetVector< T, Vector, Set >::empty(), EnableDSP, EnableDSPWithImms, EqualTypeSize(), llvm::Instruction::eraseFromParent(), F(), From, generateSignBits(), llvm::ConstantInt::get(), llvm::UndefValue::get(), llvm::Instruction::getDebugLoc(), llvm::Intrinsic::getDeclaration(), llvm::BasicBlock::getFirstInsertionPt(), llvm::APInt::getMaxValue(), llvm::Value::getName(), llvm::User::getNumOperands(), llvm::Instruction::getOpcode(), llvm::User::getOperand(), llvm::Type::getPrimitiveSizeInBits(), getScalarSizeInBits(), llvm::TargetMachine::getSubtarget(), llvm::Value::getType(), llvm::ConstantExpr::getZExt(), I, INITIALIZE_PASS_BEGIN(), llvm::SetVector< T, Vector, Set >::insert(), llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::isLegalToPromote(), isPromotedResultSafe(), isSink(), isSource(), isSupportedType(), LessThanTypeSize(), LLVM_DEBUG, llvm_unreachable, llvm::BitmaskEnumDetail::Mask(), llvm::Instruction::moveAfter(), llvm::Instruction::moveBefore(), llvm::Value::mutateType(), llvm::User::operands(), llvm::SetVector< T, Vector, Set >::pop_back(), llvm::SmallVectorTemplateBase< T >::push_back(), llvm::Value::replaceAllUsesWith(), llvm::report_fatal_error(), runOnFunction(), llvm::User::setOperand(), shouldPromote(), llvm::ARM_MB::ST, llvm::SystemZISD::TM, Users, llvm::Value::uses(), and llvm::verifyFunction().
Definition at line 192 of file ARMCodeGenPrepare.cpp.
References llvm::Type::getScalarSizeInBits(), and llvm::Value::getType().
Referenced by isSink().
INITIALIZE_PASS_BEGIN | ( | ARMCodeGenPrepare | , |
DEBUG_TYPE | , | ||
"ARM IR optimizations" | , | ||
false | , | ||
false | |||
) |
Referenced by getNarrowIntrinsic().
Return whether we can safely mutate V's type to ExtTy without having to be concerned with zero extending or truncation.
Definition at line 410 of file ARMCodeGenPrepare.cpp.
References generateSignBits().
Referenced by getNarrowIntrinsic().
Return true if V will require any promoted values to be truncated for the the IR to remain valid.
We can't mutate the value type of these instructions.
Definition at line 249 of file ARMCodeGenPrepare.cpp.
References llvm::APInt::abs(), llvm::MCID::Add, llvm::dbgs(), llvm::APInt::getAllOnesValue(), llvm::APInt::getBitWidth(), llvm::Instruction::getOpcode(), llvm::User::getOperand(), llvm::ConstantInt::getValue(), GreaterThanTypeSize(), llvm::Instruction::hasNoUnsignedWrap(), llvm::Value::hasOneUse(), I, llvm::ConstantInt::isNegative(), LessOrEqualTypeSize(), LessThanTypeSize(), LLVM_DEBUG, llvm::MCID::Return, llvm::SPII::Store, llvm::APInt::ugt(), llvm::Value::user_begin(), and llvm::APInt::zext().
Referenced by getNarrowIntrinsic(), and shouldPromote().
Return true if the given value is a source in the use-def chain, producing a narrow 'TypeSize' value.
These values will be zext to start the promotion of the tree to i32. We guarantee that these won't populate the upper bits of the register. ZExt on the loads will be free, and the same for call return values because we only accept ones that guarantee a zeroext ret val. Many arguments will have the zeroext attribute too, so those would be free too.
Definition at line 228 of file ARMCodeGenPrepare.cpp.
References EqualTypeSize(), and llvm::Value::getType().
Referenced by getNarrowIntrinsic(), and shouldPromote().
Some instructions can use 8- and 16-bit operands, and we don't need to promote anything larger.
We disallow booleans to make life easier when dealing with icmps but allow any other integer that is <= 16 bits. Void types are accepted so we can handle switches.
Definition at line 204 of file ARMCodeGenPrepare.cpp.
References getBitWidth(), llvm::Value::getType(), llvm::Type::isPointerTy(), llvm::Type::isVoidTy(), and LessOrEqualTypeSize().
Referenced by getNarrowIntrinsic().
Definition at line 188 of file ARMCodeGenPrepare.cpp.
References llvm::Type::getScalarSizeInBits(), and llvm::Value::getType().
Referenced by isSink(), and isSupportedType().
Definition at line 196 of file ARMCodeGenPrepare.cpp.
References llvm::Type::getScalarSizeInBits(), and llvm::Value::getType().
Referenced by getNarrowIntrinsic(), and isSink().
Definition at line 391 of file ARMCodeGenPrepare.cpp.
References llvm::dyn_cast(), llvm::Value::getType(), isSink(), and isSource().
Referenced by getNarrowIntrinsic().
DEBUG_TYPE |
Definition at line 1074 of file ARMCodeGenPrepare.cpp.
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static |
Referenced by getNarrowIntrinsic().
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static |
Referenced by getNarrowIntrinsic().
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static |
Referenced by getNarrowIntrinsic().
ARM IR false |
Definition at line 1074 of file ARMCodeGenPrepare.cpp.
ARM IR optimizations |
Definition at line 1074 of file ARMCodeGenPrepare.cpp.