LLVM
8.0.1
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This file implements the targeting of the InstructionSelector class for AMDGPU. More...
#include "AMDGPUInstructionSelector.h"
#include "AMDGPUInstrInfo.h"
#include "AMDGPURegisterBankInfo.h"
#include "AMDGPURegisterInfo.h"
#include "AMDGPUSubtarget.h"
#include "AMDGPUTargetMachine.h"
#include "SIMachineFunctionInfo.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "AMDGPUGenGlobalISel.inc"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "amdgpu-isel" |
#define | GET_GLOBALISEL_IMPL |
#define | AMDGPUSubtarget GCNSubtarget |
#define | GET_GLOBALISEL_PREDICATES_INIT |
#define | GET_GLOBALISEL_TEMPORARIES_INIT |
Functions | |
static int64_t | getConstant (const MachineInstr *MI) |
static MachineInstr * | buildEXP (const TargetInstrInfo &TII, MachineInstr *Insert, unsigned Tgt, unsigned Reg0, unsigned Reg1, unsigned Reg2, unsigned Reg3, unsigned VM, bool Compr, unsigned Enabled, bool Done) |
static bool | isConstant (const MachineInstr &MI) |
static bool | isInstrUniform (const MachineInstr &MI) |
static unsigned | getSmrdOpcode (unsigned BaseOpcode, unsigned LoadSize) |
This file implements the targeting of the InstructionSelector class for AMDGPU.
Definition in file AMDGPUInstructionSelector.cpp.
#define AMDGPUSubtarget GCNSubtarget |
Definition at line 40 of file AMDGPUInstructionSelector.cpp.
#define DEBUG_TYPE "amdgpu-isel" |
Definition at line 35 of file AMDGPUInstructionSelector.cpp.
Referenced by llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector().
#define GET_GLOBALISEL_IMPL |
Definition at line 39 of file AMDGPUInstructionSelector.cpp.
#define GET_GLOBALISEL_PREDICATES_INIT |
#define GET_GLOBALISEL_TEMPORARIES_INIT |
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Definition at line 217 of file AMDGPUInstructionSelector.cpp.
References llvm::ARM_AM::add, llvm::MachineInstrBuilder::addImm(), llvm::MachineInstr::addImplicitDefUseOperands(), llvm::MachineInstrBuilder::addReg(), llvm::Intrinsic::amdgcn_exp, llvm::Intrinsic::amdgcn_exp_compr, llvm::APInt::ashr(), llvm::APFloat::bitcastToAPInt(), llvm::BuildMI(), llvm::MachineOperand::ChangeToImmediate(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::constrainSelectedInstRegOperands(), llvm::MachineRegisterInfo::createVirtualRegister(), Enabled, llvm::MachineInstr::eraseFromParent(), llvm::SIInstrFlags::EXP, llvm::MCInstrInfo::get(), llvm::MachineOperand::getCImm(), getConstant(), llvm::SIRegisterInfo::getConstrainedRegClassForOperand(), llvm::MachineInstr::getDebugLoc(), llvm::MachineOperand::getFPImm(), llvm::RegisterBank::getID(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIntrinsicID(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegBankOrNull(), llvm::SIRegisterInfo::getRegClassForReg(), llvm::MachineFunction::getRegInfo(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), llvm::ConstantFP::getValueAPF(), llvm::MachineRegisterInfo::getVRegDef(), llvm::ConstantInt::getZExtValue(), llvm::APInt::getZExtValue(), llvm::MachineOperand::isCImm(), llvm::MachineOperand::isFPImm(), llvm::SIRegisterInfo::isSGPRClass(), MRI, llvm::MipsISD::Ret, llvm::MachineInstr::setDesc(), Size, llvm::APInt::trunc(), and llvm::RegState::Undef.
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Definition at line 117 of file AMDGPUInstructionSelector.cpp.
References llvm::ARM_AM::add, llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::Intrinsic::amdgcn_cvt_pkrtz, llvm::Intrinsic::amdgcn_kernarg_segment_ptr, llvm::BuildMI(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineInstr::eraseFromParent(), llvm::MachineInstr::explicit_operands(), llvm::MachineOperand::getCImm(), llvm::SIRegisterInfo::getConstrainedRegClassForOperand(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getInfo(), llvm::MachineOperand::getIntrinsicID(), llvm::MachineRegisterInfo::getLiveInVirtReg(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::SIMachineFunctionInfo::getPreloadedValue(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::ConstantInt::getSExtValue(), I, llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::MachineOperand::isReg(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm::Intrinsic::maxnum, llvm::Intrinsic::minnum, MRI, llvm::report_fatal_error(), llvm::MachineInstr::setDesc(), and Size.
Referenced by buildEXP(), EvaluateConstantChrecAtConstant(), llvm::ScalarEvolution::forgetValue(), llvm::ScalarEvolution::getAddExpr(), llvm::SelectionDAG::getAllOnesConstant(), llvm::ScalarEvolution::getConstant(), llvm::ScalarEvolution::getContext(), llvm::ScalarEvolution::getMulExpr(), llvm::ScalarEvolution::getNegativeSCEV(), llvm::ScalarEvolution::getNotSCEV(), llvm::SelectionDAG::getObjectPtrOffset(), llvm::ScalarEvolution::getOffsetOfExpr(), llvm::ScalarEvolution::getOne(), getOtherIncomingValue(), getRangeForAffineARHelper(), llvm::ScalarEvolution::getSignExtendExpr(), llvm::ScalarEvolution::getSizeOfExpr(), llvm::ScalarEvolution::getSMaxExpr(), llvm::SelectionDAG::getTargetConstant(), llvm::ScalarEvolution::getTruncateExpr(), llvm::ScalarEvolution::getUDivExactExpr(), llvm::ScalarEvolution::getUDivExpr(), llvm::ScalarEvolution::getUMaxExpr(), llvm::ScalarEvolution::getZero(), llvm::ScalarEvolution::getZeroExtendExpr(), IsKnownPredicateViaMinOrMax(), llvm::ScalarEvolution::isLoopEntryGuardedByCond(), llvm::SelectionDAG::setRoot(), llvm::ScalarEvolution::SimplifyICmpOperands(), SolveQuadraticAddRecRange(), llvm::SelectionDAG::SplitVector(), and llvm::SelectionDAG::UnrollVectorOp().
Definition at line 448 of file AMDGPUInstructionSelector.cpp.
References llvm::ARM_AM::add, llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), AMDGPUAS::CONSTANT_ADDRESS, AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::constrainSelectedInstRegOperands(), llvm::ArrayRef< T >::empty(), llvm::MachineInstr::eraseFromParent(), getAddrSpace(), llvm::MachineInstr::getDebugLoc(), llvm::GCNSubtarget::getGeneration(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::AMDGPU::getSMRDEncodedOffset(), llvm::MachineFunction::getSubtarget(), llvm::MachineInstr::hasOneMemOperand(), isInstrUniform(), llvm::AMDGPU::isLegalSMRDImmOffset(), llvm::isUInt< 32 >(), llvm_unreachable, llvm::MachineInstr::memoperands_begin(), llvm::MipsISD::Ret, llvm::AMDGPUSubtarget::SEA_ISLANDS, llvm::ArrayRef< T >::size(), and llvm::SIInstrFlags::SMRD.
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Definition at line 388 of file AMDGPUInstructionSelector.cpp.
References assert(), llvm::MachineOperand::getCImm(), llvm::RegisterBank::getID(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::ConstantInt::getSExtValue(), llvm::MachineRegisterInfo::getUniqueVRegDef(), llvm::SPII::Load, MRI, and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by ConstantBuildVector(), llvm::MDBuilder::createAnonymousAliasScope(), ExpandBVWithShuffles(), foldBitcastedFPLogic(), llvm::DIExpression::getElement(), inferDSOLocal(), INITIALIZE_PASS(), isDebug(), IsSingleInstrConstant(), and LLVMIsGlobalConstant().
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Definition at line 426 of file AMDGPUInstructionSelector.cpp.
References AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::dyn_cast(), llvm::MachineMemOperand::getAddrSpace(), llvm::Instruction::getMetadata(), llvm::MachineMemOperand::getValue(), llvm::MachineInstr::hasOneMemOperand(), and llvm::MachineInstr::memoperands_begin().
Referenced by getSmrdOpcode().