#include "MCTargetDesc/MipsMCTargetDesc.h"#include "Mips.h"#include "llvm/ADT/ArrayRef.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCDisassembler/MCDisassembler.h"#include "llvm/MC/MCFixedLenDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/TargetRegistry.h"#include "llvm/Support/raw_ostream.h"#include <cassert>#include <cstdint>#include "MipsGenDisassemblerTables.inc"
Go to the source code of this file.
Namespaces | |
| llvm | |
| This class represents lattice values for constants. | |
Macros | |
| #define | DEBUG_TYPE "mips-disassembler" |
Typedefs | |
| using | DecodeStatus = MCDisassembler::DecodeStatus |
Functions | |
| static DecodeStatus | DecodeGPR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCPU16RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16ZeroRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16MovePRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePtrRegisterClass (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCCRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFCCRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGRCCRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeHWRegsRegisterClass (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAFGR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeACC64DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeHI32DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLO32DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128BRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128HRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128WRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128DRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSACtrlRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCOP0RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCOP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget1SImm16 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTarget (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget21 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget21MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget26 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget7MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget10MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTargetMM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget26MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTargetMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemEVA (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLoadByte15 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheOp (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheeOp_CacheOpR6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheOpMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePrefeOpMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSyncI (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSyncI_MM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSynciR6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128Mem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm4 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMSPImm5Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMGPImm7Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMReglistImm4Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm9 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMemMMR2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem3 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMemCop2R6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMemCop2MMR6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSpecial3LlSc (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddiur2Simm7 (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLi16Imm (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePOOL16BEncodedField (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| template<unsigned Bits, int Offset, int Scale> | |
| static DecodeStatus | DecodeUImmWithOffsetAndScale (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| template<unsigned Bits, int Offset> | |
| static DecodeStatus | DecodeUImmWithOffset (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| template<unsigned Bits, int Offset = 0, int ScaleBy = 1> | |
| static DecodeStatus | DecodeSImmWithOffsetAndScale (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeInsSize (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm19Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm18Lsl3 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm9SP (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeANDI16Imm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm23Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeINSVE_DF (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| INSVE_[BHWD] have an implicit operand that the generated decoder doesn't handle. More... | |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDAHIDATIMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDAHIDATI (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeAddiGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodePOP35GroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDaddiGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodePOP37GroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodePOP65GroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodePOP75GroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezlGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzlGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzGroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezGroupBranchMMR6 (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDINS (MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDEXT (MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeCRC (MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeRegListOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeRegListOperand16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMovePRegPair (MCInst &Inst, unsigned RegPair, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMovePOperands (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| Target & | llvm::getTheMipselTarget () |
| Target & | llvm::getTheMipsTarget () |
| Target & | llvm::getTheMips64Target () |
| Target & | llvm::getTheMips64elTarget () |
| static MCDisassembler * | createMipsDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| static MCDisassembler * | createMipselDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| void | LLVMInitializeMipsDisassembler () |
| static unsigned | getReg (const void *D, unsigned RC, unsigned RegNo) |
| static DecodeStatus | readInstruction16 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsBigEndian) |
| Read two bytes from the ArrayRef and return 16 bit halfword sorted according to the given endianness. More... | |
| static DecodeStatus | readInstruction32 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsBigEndian, bool IsMicroMips) |
| Read four bytes from the ArrayRef and return 32 bit word sorted according to the given endianness. More... | |
Macro Definition Documentation
◆ DEBUG_TYPE
| #define DEBUG_TYPE "mips-disassembler" |
Definition at line 34 of file MipsDisassembler.cpp.
Typedef Documentation
◆ DecodeStatus
Definition at line 36 of file MipsDisassembler.cpp.
Function Documentation
◆ createMipsDisassembler()
|
static |
Definition at line 553 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
◆ createMipselDisassembler()
|
static |
Definition at line 560 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
◆ DecodeACC64DSPRegisterClass()
|
static |
Definition at line 2080 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeAddiGroupBranch()
|
static |
Definition at line 663 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeAddiur2Simm7()
|
static |
Definition at line 2303 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeAFGR64RegisterClass()
|
static |
Definition at line 2068 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeANDI16Imm()
|
static |
Definition at line 2393 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeBgtzGroupBranch()
|
static |
Definition at line 974 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeBgtzGroupBranchMMR6()
|
static |
Definition at line 2531 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeBgtzlGroupBranch()
|
static |
Definition at line 930 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeBlezGroupBranch()
|
static |
Definition at line 1023 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeBlezGroupBranchMMR6()
|
static |
Definition at line 2580 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeBlezlGroupBranch()
|
static |
Definition at line 887 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeBranchTarget()
|
static |
Definition at line 2200 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget10MM()
|
static |
Definition at line 2266 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget1SImm16()
|
static |
Definition at line 2209 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget21()
|
static |
Definition at line 2227 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget21MM()
|
static |
Definition at line 2237 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget26()
|
static |
Definition at line 2247 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget26MM()
|
static |
Definition at line 2284 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTarget7MM()
|
static |
Definition at line 2257 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeBranchTargetMM()
|
static |
Definition at line 2275 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeCacheeOp_CacheOpR6()
|
static |
Definition at line 1634 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodeCacheOp()
|
static |
Definition at line 1583 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodeCacheOpMM()
|
static |
Definition at line 1600 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodeCCRRegisterClass()
|
static |
Definition at line 1489 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeCOP0RegisterClass()
|
static |
Definition at line 2176 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeCOP2RegisterClass()
|
static |
Definition at line 2188 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeCPU16RegsRegisterClass()
|
static |
Definition at line 1385 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail.
◆ DecodeCRC()
|
static |
Definition at line 1147 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeDaddiGroupBranch()
|
static |
Definition at line 736 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeDAHIDATI()
|
static |
Definition at line 649 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeDAHIDATIMMR6()
|
static |
Definition at line 635 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeDEXT()
|
static |
Definition at line 1067 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), llvm_unreachable, llvm::MCInst::setOpcode(), Size, and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeDINS()
|
static |
Definition at line 1107 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), llvm_unreachable, llvm::MCInst::setOpcode(), Size, and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeDSPRRegisterClass()
|
static |
Definition at line 1458 of file MipsDisassembler.cpp.
References DecodeGPR32RegisterClass().
◆ DecodeFCCRegisterClass()
|
static |
Definition at line 1500 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFGR32RegisterClass()
|
static |
Definition at line 1477 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFGR64RegisterClass()
|
static |
Definition at line 1465 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFGRCCRegisterClass()
|
static |
Definition at line 1511 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMem()
|
static |
Definition at line 1929 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMem2()
|
static |
Definition at line 1965 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMem3()
|
static |
Definition at line 1983 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMemCop2MMR6()
|
static |
Definition at line 2019 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMemCop2R6()
|
static |
Definition at line 2001 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeFMemMMR2()
|
static |
Definition at line 1947 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeGPR32RegisterClass()
|
static |
Definition at line 1437 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeDSPRRegisterClass(), and DecodePtrRegisterClass().
◆ DecodeGPR64RegisterClass()
|
static |
Definition at line 1392 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodePtrRegisterClass().
◆ DecodeGPRMM16MovePRegisterClass()
|
static |
Definition at line 1426 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeMovePOperands().
◆ DecodeGPRMM16RegisterClass()
|
static |
Definition at line 1404 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm4().
◆ DecodeGPRMM16ZeroRegisterClass()
|
static |
Definition at line 1415 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm4().
◆ DecodeHI32DSPRegisterClass()
|
static |
Definition at line 2092 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeHWRegsRegisterClass()
|
static |
Definition at line 2057 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
◆ DecodeInsSize()
|
static |
Definition at line 2354 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), Size, and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeINSVE_DF()
|
static |
INSVE_[BHWD] have an implicit operand that the generated decoder doesn't handle.
Definition at line 588 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128WRegisterClass(), llvm::MCDisassembler::Fail, llvm_unreachable, and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeJumpTarget()
|
static |
Definition at line 2218 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeJumpTargetMM()
|
static |
Definition at line 2294 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeLi16Imm()
|
static |
Definition at line 2316 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodeLO32DSPRegisterClass()
|
static |
Definition at line 2104 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeLoadByte15()
|
static |
Definition at line 1565 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeMem()
|
static |
Definition at line 1522 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), Reg, llvm::PPCISD::SC, and llvm::MCDisassembler::Success.
◆ DecodeMemEVA()
|
static |
Definition at line 1544 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMGPImm7Lsl2()
|
static |
Definition at line 1814 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMImm12()
|
static |
Definition at line 1876 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeRegListOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), getReg(), LLVM_FALLTHROUGH, Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMImm16()
|
static |
Definition at line 1911 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMImm4()
|
static |
Definition at line 1740 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPRMM16RegisterClass(), DecodeGPRMM16ZeroRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMImm9()
|
static |
Definition at line 1855 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeMemMMReglistImm4Lsl2()
|
static |
Definition at line 1830 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeRegListOperand16(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
◆ DecodeMemMMSPImm5Lsl2()
|
static |
Definition at line 1798 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeMovePOperands()
|
static |
Definition at line 2456 of file MipsDisassembler.cpp.
References DecodeGPRMM16MovePRegisterClass(), DecodeMovePRegPair(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeMovePRegPair()
|
static |
Definition at line 2482 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeMovePOperands(), and DecodeUImmWithOffset().
◆ DecodeMSA128BRegisterClass()
|
static |
Definition at line 2116 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
◆ DecodeMSA128DRegisterClass()
|
static |
Definition at line 2152 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
◆ DecodeMSA128HRegisterClass()
|
static |
Definition at line 2128 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
◆ DecodeMSA128Mem()
|
static |
Definition at line 1694 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodeMSA128WRegisterClass()
|
static |
Definition at line 2140 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
◆ DecodeMSACtrlRegisterClass()
|
static |
Definition at line 2164 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
◆ DecodePOOL16BEncodedField()
|
static |
Definition at line 2327 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ DecodePOP35GroupBranchMMR6()
|
static |
Definition at line 702 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodePOP37GroupBranchMMR6()
|
static |
Definition at line 775 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodePOP65GroupBranchMMR6()
|
static |
Definition at line 809 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodePOP75GroupBranchMMR6()
|
static |
Definition at line 848 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodePrefeOpMM()
|
static |
Definition at line 1617 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodePtrRegisterClass()
|
static |
Definition at line 1448 of file MipsDisassembler.cpp.
References DecodeGPR32RegisterClass(), and DecodeGPR64RegisterClass().
◆ DecodeRegListOperand()
|
static |
Definition at line 2403 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, RA, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm12(), and DecodeUImmWithOffset().
◆ DecodeRegListOperand16()
|
static |
Definition at line 2432 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), RA, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMReglistImm4Lsl2(), and DecodeUImmWithOffset().
◆ DecodeSimm18Lsl3()
|
static |
Definition at line 2373 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeSimm19Lsl2()
|
static |
Definition at line 2367 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeSimm23Lsl2()
|
static |
Definition at line 2524 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeSimm9SP()
|
static |
Definition at line 2379 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeSImmWithOffsetAndScale()
|
static |
Definition at line 2346 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeUImmWithOffset().
◆ DecodeSpecial3LlSc()
|
static |
Definition at line 2035 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodeSyncI()
|
static |
Definition at line 1651 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodeSyncI_MM()
|
static |
Definition at line 1666 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodeSynciR6()
|
static |
Definition at line 1679 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
◆ DecodeUImmWithOffset()
|
static |
Definition at line 403 of file MipsDisassembler.cpp.
References llvm::Address, DecodeAddiGroupBranch(), DecodeANDI16Imm(), DecodeBgtzGroupBranch(), DecodeBgtzGroupBranchMMR6(), DecodeBgtzlGroupBranch(), DecodeBlezGroupBranch(), DecodeBlezGroupBranchMMR6(), DecodeBlezlGroupBranch(), DecodeCRC(), DecodeDaddiGroupBranch(), DecodeDAHIDATI(), DecodeDAHIDATIMMR6(), DecodeDEXT(), DecodeDINS(), DecodeInsSize(), DecodeINSVE_DF(), DecodeMovePOperands(), DecodeMovePRegPair(), DecodePOP35GroupBranchMMR6(), DecodePOP37GroupBranchMMR6(), DecodePOP65GroupBranchMMR6(), DecodePOP75GroupBranchMMR6(), DecodeRegListOperand(), DecodeRegListOperand16(), DecodeSimm18Lsl3(), DecodeSimm19Lsl2(), DecodeSimm23Lsl2(), DecodeSimm9SP(), DecodeSImmWithOffsetAndScale(), llvm::getTheMips64elTarget(), llvm::getTheMips64Target(), llvm::getTheMipselTarget(), llvm::getTheMipsTarget(), and MI.
◆ DecodeUImmWithOffsetAndScale()
|
static |
Definition at line 2336 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::tgtok::Bits, llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
◆ getReg()
Definition at line 581 of file MipsDisassembler.cpp.
References llvm::MCRegisterClass::begin(), D, and llvm::MCRegisterInfo::getRegClass().
Referenced by AddNodeIDCustom(), areCandidatesToMergeOrPair(), llvm::HexagonFrameLowering::assignCalleeSavedSpillSlots(), llvm::CSEMIRBuilder::buildInstr(), CallingConvSupported(), canClobberPhysRegDefs(), llvm::PPCInstrInfo::canInsertSelect(), canMoveInstsAcrossMemOp(), CheckForPhysRegDependency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), llvm::createR600ExpandSpecialInstrsPass(), llvm::createR600ISelDag(), DecodeACC64DSPRegisterClass(), DecodeAddiGroupBranch(), DecodeAFGR64RegisterClass(), DecodeBgtzGroupBranch(), DecodeBgtzGroupBranchMMR6(), DecodeBgtzlGroupBranch(), DecodeBlezGroupBranch(), DecodeBlezGroupBranchMMR6(), DecodeBlezlGroupBranch(), DecodeCacheeOp_CacheOpR6(), DecodeCacheOp(), DecodeCacheOpMM(), DecodeCCRRegisterClass(), DecodeCOP0RegisterClass(), DecodeCOP2RegisterClass(), DecodeCRC(), DecodeDaddiGroupBranch(), DecodeDAHIDATI(), DecodeDAHIDATIMMR6(), DecodeDEXT(), DecodeDINS(), DecodeFCCRegisterClass(), DecodeFGR32RegisterClass(), DecodeFGR64RegisterClass(), DecodeFGRCCRegisterClass(), DecodeFMem(), DecodeFMem2(), DecodeFMem3(), DecodeFMemCop2MMR6(), DecodeFMemCop2R6(), DecodeFMemMMR2(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPRMM16MovePRegisterClass(), DecodeGPRMM16RegisterClass(), DecodeGPRMM16ZeroRegisterClass(), DecodeHI32DSPRegisterClass(), DecodeLO32DSPRegisterClass(), DecodeLoadByte15(), DecodeMem(), DecodeMemEVA(), DecodeMemMMGPImm7Lsl2(), DecodeMemMMImm12(), DecodeMemMMImm16(), DecodeMemMMImm9(), DecodeMemMMSPImm5Lsl2(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128Mem(), DecodeMSA128WRegisterClass(), DecodeMSACtrlRegisterClass(), DecodePOP35GroupBranchMMR6(), DecodePOP37GroupBranchMMR6(), DecodePOP65GroupBranchMMR6(), DecodePOP75GroupBranchMMR6(), DecodePrefeOpMM(), DecodeSpecial3LlSc(), DecodeSyncI(), DecodeSyncI_MM(), DecodeSynciR6(), llvm::SDep::dump(), emitAlignedDPRCS2Restores(), emitClzero(), llvm::InstrEmitter::EmitDbgLabel(), findSingleRegDef(), getARClassRegisterMask(), getCondFromOpc(), getDwarfRegNum(), getMaxCalleeSavedReg(), getTypeFromTypeIdx(), getUnderlyingArgReg(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), llvm::XCoreInstrInfo::insertBranch(), llvm::NVPTXInstrInfo::insertBranch(), llvm::HexagonInstrInfo::insertBranch(), llvm::PPCInstrInfo::insertBranch(), llvm::AArch64InstrInfo::insertSelect(), llvm::PPCInstrInfo::insertSelect(), llvm::MachineInstr::isConstantValuePHI(), isCopy(), IsSafeAndProfitableToMove(), llvm::HexagonTargetLowering::LowerINLINEASM(), MatchingStackOffset(), matchPair(), mayAlias(), mayCombineMisaligned(), mayUseCarryFlag(), llvm::TargetLowering::parametersInCSRMatch(), parseCond(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::R600InstrInfo::PredicateInstruction(), llvm::PPCInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), PrepareCall(), llvm::RegisterBankInfo::OperandsMapper::print(), printExtendedName(), printMCExpr(), RefineErrorLoc(), llvm::PPCInstrInfo::reverseBranchCondition(), llvm::rewriteT2FrameIndex(), llvm::PPCInstrInfo::SubsumesPredicate(), llvm::LegalizationArtifactCombiner::tryCombineInstruction(), tryToElideArgumentCopy(), and VerifyLowRegs().
◆ LLVMInitializeMipsDisassembler()
| void LLVMInitializeMipsDisassembler | ( | ) |
Definition at line 567 of file MipsDisassembler.cpp.
References createMipsDisassembler(), createMipselDisassembler(), llvm::getTheMips64elTarget(), llvm::getTheMips64Target(), llvm::getTheMipselTarget(), llvm::getTheMipsTarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
◆ readInstruction16()
|
static |
Read two bytes from the ArrayRef and return 16 bit halfword sorted according to the given endianness.
Definition at line 1162 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.
Referenced by readInstruction32().
◆ readInstruction32()
|
static |
Read four bytes from the ArrayRef and return 32 bit word sorted according to the given endianness.
Definition at line 1182 of file MipsDisassembler.cpp.
References llvm::Address, llvm::dbgs(), llvm::X86Disassembler::decodeInstruction(), llvm::MCDisassembler::Fail, LLVM_DEBUG, readInstruction16(), Size, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.
