#include "MCTargetDesc/RISCVMCTargetDesc.h"
#include "Utils/RISCVBaseInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/TargetRegistry.h"
#include "RISCVGenDisassemblerTables.inc"

Include dependency graph for RISCVDisassembler.cpp:

Macros
#define	DEBUG_TYPE "riscv-disassembler"

Typedefs
typedef MCDisassembler::DecodeStatus	DecodeStatus

Functions
static MCDisassembler *	createRISCVDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)

void	LLVMInitializeRISCVDisassembler ()

static DecodeStatus	DecodeGPRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR32RegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR32CRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR64RegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR64CRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeGPRNoX0RegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeGPRNoX0X2RegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeGPRCRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static void	addImplySP (MCInst &Inst, int64_t Address, const void *Decoder)

template<unsigned N>
static DecodeStatus	decodeUImmOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

template<unsigned N>
static DecodeStatus	decodeUImmNonZeroOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

template<unsigned N>
static DecodeStatus	decodeSImmOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

template<unsigned N>
static DecodeStatus	decodeSImmNonZeroOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

template<unsigned N>
static DecodeStatus	decodeSImmOperandAndLsl1 (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeCLUIImmOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeFRMArg (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

Variables
static const unsigned	GPRDecoderTable []

static const unsigned	FPR32DecoderTable []

static const unsigned	FPR64DecoderTable []

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "riscv-disassembler"

Definition at line 27 of file RISCVDisassembler.cpp.

Typedef Documentation

◆ DecodeStatus

typedef MCDisassembler::DecodeStatus DecodeStatus

Definition at line 29 of file RISCVDisassembler.cpp.

Function Documentation

◆ addImplySP()

static void addImplySP	(	MCInst &	Inst,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 189 of file RISCVDisassembler.cpp.

References DecodeGPRRegisterClass(), and llvm::MCInst::getOpcode().

Referenced by decodeSImmOperand(), and decodeUImmOperand().

◆ createRISCVDisassembler()

static MCDisassembler* createRISCVDisassembler	(	const Target &	T,
		const MCSubtargetInfo &	STI,
		MCContext &	Ctx
	)

static

Definition at line 45 of file RISCVDisassembler.cpp.

Referenced by LLVMInitializeRISCVDisassembler().

◆ decodeCLUIImmOperand()

static DecodeStatus decodeCLUIImmOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 254 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ DecodeFPR32CRegisterClass()

static DecodeStatus DecodeFPR32CRegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 109 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

◆ DecodeFPR32RegisterClass()

static DecodeStatus DecodeFPR32RegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 95 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

◆ DecodeFPR64CRegisterClass()

static DecodeStatus DecodeFPR64CRegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 145 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

◆ DecodeFPR64RegisterClass()

static DecodeStatus DecodeFPR64RegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 131 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

◆ decodeFRMArg()

static DecodeStatus decodeFRMArg	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 265 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::Address, assert(), llvm::MCOperand::createImm(), llvm::ArrayRef< T >::data(), llvm::dbgs(), llvm::X86Disassembler::decodeInstruction(), llvm::MCDisassembler::Fail, llvm::RISCVFPRndMode::isValidRoundingMode(), LLVM_DEBUG, MI, llvm::support::endian::read16le(), llvm::support::endian::read32le(), Size, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.

◆ DecodeGPRCRegisterClass()

static DecodeStatus DecodeGPRCRegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 176 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

◆ DecodeGPRNoX0RegisterClass()

static DecodeStatus DecodeGPRNoX0RegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 156 of file RISCVDisassembler.cpp.

References DecodeGPRRegisterClass(), and llvm::MCDisassembler::Fail.

Referenced by DecodeGPRNoX0X2RegisterClass().

◆ DecodeGPRNoX0X2RegisterClass()

static DecodeStatus DecodeGPRNoX0X2RegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 166 of file RISCVDisassembler.cpp.

References DecodeGPRNoX0RegisterClass(), and llvm::MCDisassembler::Fail.

◆ DecodeGPRRegisterClass()

static DecodeStatus DecodeGPRRegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 70 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

Referenced by addImplySP(), and DecodeGPRNoX0RegisterClass().

◆ decodeSImmNonZeroOperand()

template<unsigned N>

static DecodeStatus decodeSImmNonZeroOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 234 of file RISCVDisassembler.cpp.

References llvm::Address, and llvm::MCDisassembler::Fail.

◆ decodeSImmOperand()

template<unsigned N>

static DecodeStatus decodeSImmOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 224 of file RISCVDisassembler.cpp.

References addImplySP(), llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeSImmOperandAndLsl1()

template<unsigned N>

static DecodeStatus decodeSImmOperandAndLsl1	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 243 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeUImmNonZeroOperand()

template<unsigned N>

static DecodeStatus decodeUImmNonZeroOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 215 of file RISCVDisassembler.cpp.

References llvm::Address, and llvm::MCDisassembler::Fail.

◆ decodeUImmOperand()

template<unsigned N>

static DecodeStatus decodeUImmOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 206 of file RISCVDisassembler.cpp.

References addImplySP(), llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ LLVMInitializeRISCVDisassembler()

void LLVMInitializeRISCVDisassembler ( )

Definition at line 51 of file RISCVDisassembler.cpp.

References createRISCVDisassembler(), llvm::getTheRISCV32Target(), llvm::getTheRISCV64Target(), and llvm::TargetRegistry::RegisterMCDisassembler().

Variable Documentation

◆ FPR32DecoderTable

const unsigned FPR32DecoderTable[]

static

Initial value:

= {
  RISCV::F0_32,  RISCV::F1_32,  RISCV::F2_32,  RISCV::F3_32,
  RISCV::F4_32,  RISCV::F5_32,  RISCV::F6_32,  RISCV::F7_32,
  RISCV::F8_32,  RISCV::F9_32,  RISCV::F10_32, RISCV::F11_32,
  RISCV::F12_32, RISCV::F13_32, RISCV::F14_32, RISCV::F15_32,
  RISCV::F16_32, RISCV::F17_32, RISCV::F18_32, RISCV::F19_32,
  RISCV::F20_32, RISCV::F21_32, RISCV::F22_32, RISCV::F23_32,
  RISCV::F24_32, RISCV::F25_32, RISCV::F26_32, RISCV::F27_32,
  RISCV::F28_32, RISCV::F29_32, RISCV::F30_32, RISCV::F31_32
}

Definition at line 84 of file RISCVDisassembler.cpp.

◆ FPR64DecoderTable

const unsigned FPR64DecoderTable[]

static

Initial value:

= {
  RISCV::F0_64,  RISCV::F1_64,  RISCV::F2_64,  RISCV::F3_64,
  RISCV::F4_64,  RISCV::F5_64,  RISCV::F6_64,  RISCV::F7_64,
  RISCV::F8_64,  RISCV::F9_64,  RISCV::F10_64, RISCV::F11_64,
  RISCV::F12_64, RISCV::F13_64, RISCV::F14_64, RISCV::F15_64,
  RISCV::F16_64, RISCV::F17_64, RISCV::F18_64, RISCV::F19_64,
  RISCV::F20_64, RISCV::F21_64, RISCV::F22_64, RISCV::F23_64,
  RISCV::F24_64, RISCV::F25_64, RISCV::F26_64, RISCV::F27_64,
  RISCV::F28_64, RISCV::F29_64, RISCV::F30_64, RISCV::F31_64
}

Definition at line 120 of file RISCVDisassembler.cpp.

◆ GPRDecoderTable

const unsigned GPRDecoderTable[]

static

Initial value:

= {
  RISCV::X0,  RISCV::X1,  RISCV::X2,  RISCV::X3,
  RISCV::X4,  RISCV::X5,  RISCV::X6,  RISCV::X7,
  RISCV::X8,  RISCV::X9,  RISCV::X10, RISCV::X11,
  RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15,
  RISCV::X16, RISCV::X17, RISCV::X18, RISCV::X19,
  RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23,
  RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27,
  RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31
}

Definition at line 59 of file RISCVDisassembler.cpp.

Macros

Typedefs

Functions

Variables

Macro Definition Documentation

◆ DEBUG_TYPE

Typedef Documentation

◆ DecodeStatus

Function Documentation

◆ addImplySP()

◆ createRISCVDisassembler()

◆ decodeCLUIImmOperand()

◆ DecodeFPR32CRegisterClass()

◆ DecodeFPR32RegisterClass()

◆ DecodeFPR64CRegisterClass()

◆ DecodeFPR64RegisterClass()

◆ decodeFRMArg()

◆ DecodeGPRCRegisterClass()

◆ DecodeGPRNoX0RegisterClass()

◆ DecodeGPRNoX0X2RegisterClass()

◆ DecodeGPRRegisterClass()

◆ decodeSImmNonZeroOperand()

◆ decodeSImmOperand()

◆ decodeSImmOperandAndLsl1()

◆ decodeUImmNonZeroOperand()

◆ decodeUImmOperand()

◆ LLVMInitializeRISCVDisassembler()

Variable Documentation

◆ FPR32DecoderTable

◆ FPR64DecoderTable

◆ GPRDecoderTable