HexagonSubtarget.cpp File Reference

#include "Hexagon.h"
#include "HexagonInstrInfo.h"
#include "HexagonRegisterInfo.h"
#include "HexagonSubtarget.h"
#include "MCTargetDesc/HexagonMCTargetDesc.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <cassert>
#include <map>
#include "HexagonGenSubtargetInfo.inc"

Include dependency graph for HexagonSubtarget.cpp:

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "hexagon-subtarget"
#define	GET_SUBTARGETINFO_CTOR
#define	GET_SUBTARGETINFO_TARGET_DESC

Functions
static SUnit *	getZeroLatency (SUnit *N, SmallVector< SDep, 4 > &Deps)
	If the SUnit has a zero latency edge, return the other SUnit. More...

Variables
static cl::opt< bool >	EnableBSBSched ("enable-bsb-sched", cl::Hidden, cl::ZeroOrMore, cl::init(true))
static cl::opt< bool >	EnableTCLatencySched ("enable-tc-latency-sched", cl::Hidden, cl::ZeroOrMore, cl::init(false))
static cl::opt< bool >	EnableDotCurSched ("enable-cur-sched", cl::Hidden, cl::ZeroOrMore, cl::init(true), cl::desc("Enable the scheduler to generate .cur"))
static cl::opt< bool >	DisableHexagonMISched ("disable-hexagon-misched", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Hexagon MI Scheduling"))
static cl::opt< bool >	EnableSubregLiveness ("hexagon-subreg-liveness", cl::Hidden, cl::ZeroOrMore, cl::init(true), cl::desc("Enable subregister liveness tracking for Hexagon"))
static cl::opt< bool >	OverrideLongCalls ("hexagon-long-calls", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("If present, forces/disables the use of long calls"))
static cl::opt< bool >	EnablePredicatedCalls ("hexagon-pred-calls", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Consider calls to be predicable"))
static cl::opt< bool >	SchedPredsCloser ("sched-preds-closer", cl::Hidden, cl::ZeroOrMore, cl::init(true))
static cl::opt< bool >	SchedRetvalOptimization ("sched-retval-optimization", cl::Hidden, cl::ZeroOrMore, cl::init(true))
static cl::opt< bool >	EnableCheckBankConflict ("hexagon-check-bank-conflict", cl::Hidden, cl::ZeroOrMore, cl::init(true), cl::desc("Enable checking for cache bank conflicts"))

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "hexagon-subtarget"

Definition at line 36 of file HexagonSubtarget.cpp.

GET_SUBTARGETINFO_CTOR

#define GET_SUBTARGETINFO_CTOR

Definition at line 38 of file HexagonSubtarget.cpp.

GET_SUBTARGETINFO_TARGET_DESC

#define GET_SUBTARGETINFO_TARGET_DESC

Definition at line 39 of file HexagonSubtarget.cpp.

Function Documentation

getZeroLatency()

static SUnit* getZeroLatency ( SUnit *  N, SmallVector< SDep, 4 > &  Deps  )

static

If the SUnit has a zero latency edge, return the other SUnit.

Definition at line 476 of file HexagonSubtarget.cpp.

References llvm::HexagonInstrInfo::canExecuteInBundle(), llvm::SmallSet< T, N, C >::count(), llvm::SUnit::getInstr(), llvm::HexagonSubtarget::hasV60Ops(), I, llvm::SmallSet< T, N, C >::insert(), llvm::SUnit::isBoundaryNode(), llvm::MachineInstr::isPHI(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), llvm::SUnit::NodeNum, llvm::SUnit::Preds, llvm::SUnit::Succs, and TII.

Variable Documentation

DisableHexagonMISched

cl::opt<bool> DisableHexagonMISched("disable-hexagon-misched", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Hexagon MI Scheduling"))

static

Referenced by llvm::HexagonSubtarget::enableMachineScheduler().

EnableBSBSched

cl::opt<bool> EnableBSBSched("enable-bsb-sched", cl::Hidden, cl::ZeroOrMore, cl::init(true))

static

Referenced by llvm::HexagonSubtarget::initializeSubtargetDependencies().

EnableCheckBankConflict

cl::opt<bool> EnableCheckBankConflict("hexagon-check-bank-conflict", cl::Hidden, cl::ZeroOrMore, cl::init(true), cl::desc("Enable checking for cache bank conflicts"))

static

Referenced by llvm::HexagonSubtarget::BankConflictMutation::apply().

EnableDotCurSched

cl::opt<bool> EnableDotCurSched("enable-cur-sched", cl::Hidden, cl::ZeroOrMore, cl::init(true), cl::desc("Enable the scheduler to generate .cur"))

static

Referenced by llvm::HexagonSubtarget::adjustSchedDependency().

EnablePredicatedCalls

cl::opt<bool> EnablePredicatedCalls("hexagon-pred-calls", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Consider calls to be predicable"))

static

Referenced by llvm::HexagonSubtarget::usePredicatedCalls().

EnableSubregLiveness

cl::opt<bool> EnableSubregLiveness("hexagon-subreg-liveness", cl::Hidden, cl::ZeroOrMore, cl::init(true), cl::desc("Enable subregister liveness tracking for Hexagon"))

static

Referenced by llvm::HexagonSubtarget::enableSubRegLiveness().

EnableTCLatencySched

cl::opt<bool> EnableTCLatencySched("enable-tc-latency-sched", cl::Hidden, cl::ZeroOrMore, cl::init(false))

static

OverrideLongCalls

cl::opt<bool> OverrideLongCalls("hexagon-long-calls", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("If present, forces/disables the use of long calls"))

static

Referenced by llvm::HexagonSubtarget::initializeSubtargetDependencies().

SchedPredsCloser

cl::opt<bool> SchedPredsCloser("sched-preds-closer", cl::Hidden, cl::ZeroOrMore, cl::init(true))

static

Referenced by llvm::HexagonSubtarget::CallMutation::apply().

SchedRetvalOptimization

cl::opt<bool> SchedRetvalOptimization("sched-retval-optimization", cl::Hidden, cl::ZeroOrMore, cl::init(true))

static

Referenced by llvm::HexagonSubtarget::CallMutation::apply().