SI Machine Scheduler interface. More...
#include "SIMachineScheduler.h"#include "AMDGPU.h"#include "SIInstrInfo.h"#include "SIRegisterInfo.h"#include "MCTargetDesc/AMDGPUMCTargetDesc.h"#include "llvm/ADT/STLExtras.h"#include "llvm/ADT/SmallVector.h"#include "llvm/CodeGen/LiveInterval.h"#include "llvm/CodeGen/LiveIntervals.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/MachineScheduler.h"#include "llvm/CodeGen/RegisterPressure.h"#include "llvm/CodeGen/SlotIndexes.h"#include "llvm/CodeGen/TargetRegisterInfo.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/raw_ostream.h"#include <algorithm>#include <cassert>#include <map>#include <set>#include <utility>#include <vector>
Go to the source code of this file.
Namespaces | |
| llvm | |
| This class represents lattice values for constants. | |
| llvm::SISched | |
Macros | |
| #define | DEBUG_TYPE "machine-scheduler" |
Functions | |
| static const char * | getReasonStr (SIScheduleCandReason Reason) |
| static bool | llvm::SISched::tryLess (int TryVal, int CandVal, SISchedulerCandidate &TryCand, SISchedulerCandidate &Cand, SIScheduleCandReason Reason) |
| static bool | llvm::SISched::tryGreater (int TryVal, int CandVal, SISchedulerCandidate &TryCand, SISchedulerCandidate &Cand, SIScheduleCandReason Reason) |
| static bool | isDefBetween (unsigned Reg, SlotIndex First, SlotIndex Last, const MachineRegisterInfo *MRI, const LiveIntervals *LIS) |
| static bool | hasDataDependencyPred (const SUnit &SU, const SUnit &FromSU) |
| static MachineBasicBlock::iterator | nextIfDebug (MachineBasicBlock::iterator I, MachineBasicBlock::const_iterator End) |
| Non-const version. More... | |
Detailed Description
SI Machine Scheduler interface.
Definition in file SIMachineScheduler.cpp.
Macro Definition Documentation
◆ DEBUG_TYPE
| #define DEBUG_TYPE "machine-scheduler" |
Definition at line 42 of file SIMachineScheduler.cpp.
Function Documentation
◆ getReasonStr()
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static |
Definition at line 144 of file SIMachineScheduler.cpp.
References llvm::Depth, llvm::Latency, llvm_unreachable, llvm::NoCand, llvm::NodeOrder, llvm::RegUsage, and llvm::Successor.
Referenced by llvm::SIScheduleBlock::addUnit(), llvm::SIScheduleBlockScheduler::SIScheduleBlockScheduler(), and llvm::GenericSchedulerBase::traceCandidate().
◆ hasDataDependencyPred()
Definition at line 671 of file SIMachineScheduler.cpp.
References assert(), llvm::SIScheduleDAGMI::BottomUpIndex2SU, llvm::SDep::Data, llvm::Data, llvm::dbgs(), llvm::SIScheduleBlock::finalizeUnits(), llvm::SUnit::getInstr(), llvm::ScheduleDAGTopologicalSort::GetSubGraph(), llvm::SDep::getSUnit(), llvm::SIScheduleDAGMI::GetTopo(), llvm::SDep::isCtrl(), llvm::SIInstrInfo::isEXP(), llvm::SIScheduleDAGMI::IsHighLatencySU, llvm::SIScheduleDAGMI::IsLowLatencySU, llvm::SDep::isWeak(), llvm::LatenciesAlonePlusConsecutive, llvm::LatenciesGrouped, LLVM_DEBUG, llvm::NoData, llvm::SUnit::NodeNum, llvm::SUnit::Preds, llvm::SIScheduleBlock::printDebug(), llvm::SIScheduleDAGMI::restoreSULinksLeft(), llvm::SUnit::Succs, llvm::ScheduleDAG::SUnits, and llvm::SIScheduleDAGMI::TopDownIndex2SU.
◆ isDefBetween()
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Definition at line 309 of file SIMachineScheduler.cpp.
References llvm::RegPressureTracker::addLiveRegs(), llvm::MachineRegisterInfo::def_instr_begin(), llvm::MachineRegisterInfo::def_instr_end(), llvm::LiveIntervals::getInstructionIndex(), llvm::SlotIndex::getRegSlot(), llvm::MachineInstr::isDebugValue(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::RegisterPressure::MaxSetPressure, MI, MRI, and Reg.
◆ nextIfDebug()
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static |
Non-const version.
Definition at line 1277 of file SIMachineScheduler.cpp.
