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LLVM
8.0.1
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#include "HexagonInstrInfo.h"#include "HexagonRegisterInfo.h"#include "HexagonSubtarget.h"#include "llvm/ADT/SmallPtrSet.h"#include "llvm/Analysis/AliasAnalysis.h"#include "llvm/Analysis/MemoryLocation.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineFunctionPass.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineMemOperand.h"#include "llvm/CodeGen/MachineOperand.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/IR/DebugLoc.h"#include "llvm/MC/MCInstrDesc.h"#include "llvm/Pass.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/raw_ostream.h"#include <algorithm>#include <cassert>#include <cstdint>#include <iterator>#include <vector>
Go to the source code of this file.
Namespaces | |
| llvm | |
| This class represents lattice values for constants. | |
Macros | |
| #define | DEBUG_TYPE "hexagon-widen-stores" |
Functions | |
| FunctionPass * | llvm::createHexagonStoreWidening () |
| void | llvm::initializeHexagonStoreWideningPass (PassRegistry &) |
| INITIALIZE_PASS_BEGIN (HexagonStoreWidening, "hexagon-widen-stores", "Hexason Store Widening", false, false) INITIALIZE_PASS_END(HexagonStoreWidening | |
| hexagon widen Hexagon Store static false unsigned | getBaseAddressRegister (const MachineInstr *MI) |
| static int64_t | getStoreOffset (const MachineInstr *MI) |
| static const MachineMemOperand & | getStoreTarget (const MachineInstr *MI) |
Variables | |
| hexagon widen | stores |
| hexagon widen Hexagon Store | Widening |
| hexagon widen Hexagon Store | false |
| #define DEBUG_TYPE "hexagon-widen-stores" |
Definition at line 24 of file HexagonStoreWidening.cpp.
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Definition at line 122 of file HexagonStoreWidening.cpp.
References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and MI.
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Definition at line 128 of file HexagonStoreWidening.cpp.
References assert(), llvm::dbgs(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::isImm(), llvm_unreachable, and MI.
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Definition at line 146 of file HexagonStoreWidening.cpp.
References assert(), E, G, llvm::MachineMemOperand::getAAInfo(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineMemOperand::getSize(), llvm::MachineMemOperand::getValue(), I, llvm::MachineOperand::isReg(), llvm::MachineInstr::memoperands(), llvm::MachineInstr::memoperands_begin(), llvm::MachineInstr::memoperands_empty(), MI, and SI.
| INITIALIZE_PASS_BEGIN | ( | HexagonStoreWidening | , |
| "hexagon-widen-stores" | , | ||
| "Hexason Store Widening" | , | ||
| false | , | ||
| false | |||
| ) |
| hexagon widen Hexagon Store false |
Definition at line 118 of file HexagonStoreWidening.cpp.
| hexagon widen stores |
Definition at line 118 of file HexagonStoreWidening.cpp.
Referenced by llvm::HexagonShuffler::check(), and matchPair().
| hexagon widen Hexagon Store Widening |
Definition at line 118 of file HexagonStoreWidening.cpp.
1.8.13