Copies from VGPR to SGPR registers are illegal and the register coalescer will sometimes generate these illegal copies in situations like this: More...

#include "AMDGPU.h"
#include "AMDGPUSubtarget.h"
#include "SIInstrInfo.h"
#include "SIRegisterInfo.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include <cassert>
#include <cstdint>
#include <iterator>
#include <list>
#include <map>
#include <tuple>
#include <utility>

Include dependency graph for SIFixSGPRCopies.cpp:

Go to the source code of this file.

Macros
#define	DEBUG_TYPE "si-fix-sgpr-copies"

Functions
	INITIALIZE_PASS_BEGIN (SIFixSGPRCopies, DEBUG_TYPE, "SI Fix SGPR copies", false, false) INITIALIZE_PASS_END(SIFixSGPRCopies

static bool	hasVGPROperands (const MachineInstr &MI, const SIRegisterInfo *TRI)

static std::pair< const TargetRegisterClass , const TargetRegisterClass >	getCopyRegClasses (const MachineInstr &Copy, const SIRegisterInfo &TRI, const MachineRegisterInfo &MRI)

static bool	isVGPRToSGPRCopy (const TargetRegisterClass SrcRC, const TargetRegisterClass DstRC, const SIRegisterInfo &TRI)

static bool	isSGPRToVGPRCopy (const TargetRegisterClass SrcRC, const TargetRegisterClass DstRC, const SIRegisterInfo &TRI)

static bool	tryChangeVGPRtoSGPRinCopy (MachineInstr &MI, const SIRegisterInfo TRI, const SIInstrInfo TII)

static bool	foldVGPRCopyIntoRegSequence (MachineInstr &MI, const SIRegisterInfo TRI, const SIInstrInfo TII, MachineRegisterInfo &MRI)

static bool	phiHasVGPROperands (const MachineInstr &PHI, const MachineRegisterInfo &MRI, const SIRegisterInfo TRI, const SIInstrInfo TII)

static bool	phiHasBreakDef (const MachineInstr &PHI, const MachineRegisterInfo &MRI, SmallSet< unsigned, 8 > &Visited)

static bool	hasTerminatorThatModifiesExec (const MachineBasicBlock &MBB, const TargetRegisterInfo &TRI)

static bool	isSafeToFoldImmIntoCopy (const MachineInstr Copy, const MachineInstr MoveImm, const SIInstrInfo *TII, unsigned &SMovOp, int64_t &Imm)

template<class UnaryPredicate >
bool	searchPredecessors (const MachineBasicBlock MBB, const MachineBasicBlock CutOff, UnaryPredicate Predicate)

static bool	predsHasDivergentTerminator (MachineBasicBlock MBB, const TargetRegisterInfo TRI)

static bool	isReachable (const MachineInstr From, const MachineInstr To, const MachineBasicBlock *CutOff, MachineDominatorTree &MDT)

static bool	hoistAndMergeSGPRInits (unsigned Reg, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT)

Variables
static cl::opt< bool >	EnableM0Merge ("amdgpu-enable-merge-m0", cl::desc("Merge and hoist M0 initializations"), cl::init(false))

	DEBUG_TYPE

SI Fix SGPR	copies

SI Fix SGPR	false

Detailed Description

Copies from VGPR to SGPR registers are illegal and the register coalescer will sometimes generate these illegal copies in situations like this:

Register Class <vsrc> is the union of <vgpr> and <sgpr>

BB0: %0 <sgpr> = SCALAR_INST %1 <vsrc> = COPY %0 <sgpr> ... BRANCH cond BB1, BB2 BB1: %2 <vgpr> = VECTOR_INST %3 <vsrc> = COPY %2 <vgpr> BB2: %4 <vsrc> = PHI %1 <vsrc>, <bb.0>, %3 <vrsc>, <bb.1> %5 <vgpr> = VECTOR_INST %4 <vsrc>

The coalescer will begin at BB0 and eliminate its copy, then the resulting code will look like this:

BB0: %0 <sgpr> = SCALAR_INST ... BRANCH cond BB1, BB2 BB1: %2 <vgpr> = VECTOR_INST %3 <vsrc> = COPY %2 <vgpr> BB2: %4 <sgpr> = PHI %0 <sgpr>, <bb.0>, %3 <vsrc>, <bb.1> %5 <vgpr> = VECTOR_INST %4 <sgpr>

Now that the result of the PHI instruction is an SGPR, the register allocator is now forced to constrain the register class of %3 to <sgpr> so we end up with final code like this:

BB0: %0 <sgpr> = SCALAR_INST ... BRANCH cond BB1, BB2 BB1: %2 <vgpr> = VECTOR_INST %3 <sgpr> = COPY %2 <vgpr> BB2: %4 <sgpr> = PHI %0 <sgpr>, <bb.0>, %3 <sgpr>, <bb.1> %5 <vgpr> = VECTOR_INST %4 <sgpr>

Now this code contains an illegal copy from a VGPR to an SGPR.

In order to avoid this problem, this pass searches for PHI instructions which define a <vsrc> register and constrains its definition class to <vgpr> if the user of the PHI's definition register is a vector instruction. If the PHI's definition class is constrained to <vgpr> then the coalescer will be unable to perform the COPY removal from the above example which ultimately led to the creation of an illegal COPY.

Definition in file SIFixSGPRCopies.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "si-fix-sgpr-copies"

Definition at line 102 of file SIFixSGPRCopies.cpp.

Function Documentation

◆ foldVGPRCopyIntoRegSequence()

static bool foldVGPRCopyIntoRegSequence	(	MachineInstr &	MI,
		const SIRegisterInfo *	TRI,
		const SIInstrInfo *	TII,
		MachineRegisterInfo &	MRI
	)

static

Definition at line 235 of file SIFixSGPRCopies.cpp.

References llvm::ARM_AM::add, assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineInstr::eraseFromParent(), getCopyRegClasses(), llvm::MachineInstr::getDebugLoc(), llvm::SIRegisterInfo::getEquivalentVGPRClass(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineOperand::getSubReg(), llvm::SIRegisterInfo::getSubRegClass(), llvm::MachineRegisterInfo::hasOneUse(), I, llvm::MachineInstr::isCopy(), llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::MachineInstr::isRegSequence(), llvm::SIRegisterInfo::isSGPRClass(), isSGPRToVGPRCopy(), MI, N, llvm::MachineOperand::setReg(), llvm::MachineRegisterInfo::setRegClass(), SubReg, tryChangeVGPRtoSGPRinCopy(), and llvm::MachineRegisterInfo::use_instr_begin().

Referenced by hoistAndMergeSGPRInits().

◆ getCopyRegClasses()

static std::pair<const TargetRegisterClass , const TargetRegisterClass > getCopyRegClasses	(	const MachineInstr &	Copy,
		const SIRegisterInfo &	TRI,
		const MachineRegisterInfo &	MRI
	)

static

Definition at line 161 of file SIFixSGPRCopies.cpp.

References llvm::MachineInstr::getOperand(), llvm::SIRegisterInfo::getPhysRegClass(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by foldVGPRCopyIntoRegSequence(), and hoistAndMergeSGPRInits().

◆ hasTerminatorThatModifiesExec()

static bool hasTerminatorThatModifiesExec	(	const MachineBasicBlock &	MBB,
		const TargetRegisterInfo &	TRI
	)

static

Definition at line 342 of file SIFixSGPRCopies.cpp.

References E, llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getFirstTerminator(), and I.

Referenced by predsHasDivergentTerminator().

◆ hasVGPROperands()

static bool hasVGPROperands	(	const MachineInstr &	MI,
		const SIRegisterInfo *	TRI
	)

static

Definition at line 147 of file SIFixSGPRCopies.cpp.

References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::SIRegisterInfo::hasVGPRs(), llvm::MachineOperand::isReg(), llvm::TargetRegisterInfo::isVirtualRegister(), and MRI.

Referenced by hoistAndMergeSGPRInits().

◆ hoistAndMergeSGPRInits()

static bool hoistAndMergeSGPRInits	(	unsigned	Reg,
		const MachineRegisterInfo &	MRI,
		MachineDominatorTree &	MDT
	)

static

Definition at line 447 of file SIFixSGPRCopies.cpp.

References llvm::MachineInstr::addImplicitDefUseOperands(), llvm::any_of(), assert(), llvm::MachineBasicBlock::begin(), llvm::MachineFunction::begin(), C, llvm::MachineOperand::ChangeToImmediate(), llvm::MachineRegisterInfo::clearKillFlags(), llvm::dbgs(), llvm::MachineRegisterInfo::def_instructions(), DefMI, llvm::MachineDominatorTree::dominates(), E, EnableM0Merge, llvm::MachineBasicBlock::end(), llvm::MachineFunction::end(), llvm::MachineInstr::eraseFromParent(), llvm::MachineDominatorTree::findNearestCommonDominator(), foldVGPRCopyIntoRegSequence(), From, getCopyRegClasses(), llvm::MachineOperand::getImm(), llvm::GCNSubtarget::getInstrInfo(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getNumExplicitOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::SIInstrInfo::getOpRegClass(), llvm::TargetMachine::getOptLevel(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::GCNSubtarget::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineFunction::getTarget(), hasVGPROperands(), llvm::SIRegisterInfo::hasVGPRs(), I, isReachable(), isSafeToFoldImmIntoCopy(), llvm::SIRegisterInfo::isSGPRClass(), isSGPRToVGPRCopy(), isVGPRToSGPRCopy(), llvm::TargetRegisterInfo::isVirtualRegister(), LLVM_DEBUG, MI, llvm::SIInstrInfo::moveToVALU(), MRI, llvm::CodeGenOpt::None, phiHasBreakDef(), phiHasVGPROperands(), predsHasDivergentTerminator(), llvm::printMBBReference(), llvm::MachineDominatorTree::properlyDominates(), llvm::SmallVectorTemplateBase< T >::push_back(), Reg, llvm::MachineInstr::setDesc(), llvm::ARM_MB::ST, TII, TRI, tryChangeVGPRtoSGPRinCopy(), and llvm::SIInstrFlags::WQM.

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN	(	SIFixSGPRCopies	,
		DEBUG_TYPE	,
		"SI Fix SGPR copies"	,
		false	,
		false
	)

◆ isReachable()

static bool isReachable	(	const MachineInstr *	From,
		const MachineInstr *	To,
		const MachineBasicBlock *	CutOff,
		MachineDominatorTree &	MDT
	)

static

Definition at line 422 of file SIFixSGPRCopies.cpp.

References llvm::MachineDominatorTree::dominates(), llvm::MachineInstr::getParent(), and searchPredecessors().

Referenced by hoistAndMergeSGPRInits().

◆ isSafeToFoldImmIntoCopy()

static bool isSafeToFoldImmIntoCopy	(	const MachineInstr *	Copy,
		const MachineInstr *	MoveImm,
		const SIInstrInfo *	TII,
		unsigned &	SMovOp,
		int64_t &	Imm
	)