LLVM  8.0.1
Macros | Functions | Variables
HexagonMachineScheduler.cpp File Reference
#include "HexagonMachineScheduler.h"
#include "HexagonInstrInfo.h"
#include "HexagonSubtarget.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/DFAPacketizer.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/RegisterPressure.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSchedule.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <iomanip>
#include <limits>
#include <memory>
#include <sstream>
Include dependency graph for HexagonMachineScheduler.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "machine-scheduler"
 

Functions

static bool hasDependence (const SUnit *SUd, const SUnit *SUu, const HexagonInstrInfo &QII)
 Return true if there is a dependence between SUd and SUu. More...
 
static bool isSingleUnscheduledPred (SUnit *SU, SUnit *SU2)
 isSingleUnscheduledPred - If SU2 is the only unscheduled predecessor of SU, return true (we may have duplicates) More...
 
static bool isSingleUnscheduledSucc (SUnit *SU, SUnit *SU2)
 isSingleUnscheduledSucc - If SU2 is the only unscheduled successor of SU, return true (we may have duplicates) More...
 

Variables

static cl::opt< boolIgnoreBBRegPressure ("ignore-bb-reg-pressure", cl::Hidden, cl::ZeroOrMore, cl::init(false))
 
static cl::opt< boolUseNewerCandidate ("use-newer-candidate", cl::Hidden, cl::ZeroOrMore, cl::init(true))
 
static cl::opt< unsignedSchedDebugVerboseLevel ("misched-verbose-level", cl::Hidden, cl::ZeroOrMore, cl::init(1))
 
static cl::opt< boolCheckEarlyAvail ("check-early-avail", cl::Hidden, cl::ZeroOrMore, cl::init(true))
 
static cl::opt< float > RPThreshold ("hexagon-reg-pressure", cl::Hidden, cl::init(0.75f), cl::desc("High register pressure threhold."))
 
static const unsigned PriorityOne = 200
 
static const unsigned PriorityTwo = 50
 
static const unsigned PriorityThree = 75
 
static const unsigned ScaleTwo = 10
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "machine-scheduler"

Definition at line 46 of file HexagonMachineScheduler.cpp.

Function Documentation

◆ hasDependence()

static bool hasDependence ( const SUnit SUd,
const SUnit SUu,
const HexagonInstrInfo QII 
)
static

◆ isSingleUnscheduledPred()

static bool isSingleUnscheduledPred ( SUnit SU,
SUnit SU2 
)
inlinestatic

isSingleUnscheduledPred - If SU2 is the only unscheduled predecessor of SU, return true (we may have duplicates)

Definition at line 520 of file HexagonMachineScheduler.cpp.

References llvm::SUnit::NumPredsLeft, and llvm::SUnit::Preds.

Referenced by llvm::ConvergingVLIWScheduler::SchedulingCost().

◆ isSingleUnscheduledSucc()

static bool isSingleUnscheduledSucc ( SUnit SU,
SUnit SU2 
)
inlinestatic

isSingleUnscheduledSucc - If SU2 is the only unscheduled successor of SU, return true (we may have duplicates)

Definition at line 535 of file HexagonMachineScheduler.cpp.

References llvm::SUnit::NumSuccsLeft, and llvm::SUnit::Succs.

Referenced by llvm::ConvergingVLIWScheduler::SchedulingCost().

Variable Documentation

◆ CheckEarlyAvail

cl::opt<bool> CheckEarlyAvail("check-early-avail", cl::Hidden, cl::ZeroOrMore, cl::init(true))
static

◆ IgnoreBBRegPressure

cl::opt<bool> IgnoreBBRegPressure("ignore-bb-reg-pressure", cl::Hidden, cl::ZeroOrMore, cl::init(false))
static

◆ PriorityOne

const unsigned PriorityOne = 200
static

◆ PriorityThree

const unsigned PriorityThree = 75
static

◆ PriorityTwo

const unsigned PriorityTwo = 50
static

◆ RPThreshold

cl::opt<float> RPThreshold("hexagon-reg-pressure", cl::Hidden, cl::init(0.75f), cl::desc("High register pressure threhold."))
static

◆ ScaleTwo

const unsigned ScaleTwo = 10
static

◆ SchedDebugVerboseLevel

cl::opt<unsigned> SchedDebugVerboseLevel("misched-verbose-level", cl::Hidden, cl::ZeroOrMore, cl::init(1))
static

◆ UseNewerCandidate

cl::opt<bool> UseNewerCandidate("use-newer-candidate", cl::Hidden, cl::ZeroOrMore, cl::init(true))
static