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static cl::opt< bool > | EnablePostRAScheduler ("post-RA-scheduler", cl::desc("Enable scheduling after register allocation"), cl::init(false), cl::Hidden) |
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static cl::opt< std::string > | EnableAntiDepBreaking ("break-anti-dependencies", cl::desc("Break post-RA scheduling anti-dependencies: " "\ritical\ \ll\ or \one\), cl::init("none"), cl::Hidden) |
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static cl::opt< int > | DebugDiv ("postra-sched-debugdiv", cl::desc("Debug control MBBs that are scheduled"), cl::init(0), cl::Hidden) |
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static cl::opt< int > | DebugMod ("postra-sched-debugmod", cl::desc("Debug control MBBs that are scheduled"), cl::init(0), cl::Hidden) |
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◆ DEBUG_TYPE
#define DEBUG_TYPE "post-RA-sched" |
◆ INITIALIZE_PASS()
Definition at line 203 of file PostRASchedulerList.cpp.
References assert(), llvm::sys::path::begin(), llvm::ScheduleDAG::clearDAG(), llvm::dbgs(), DebugDiv, DebugMod, llvm::dump(), E, EnableAntiDepBreaking, EnablePostRAScheduler, llvm::TargetSubtargetInfo::enablePostRAScheduler(), llvm::sys::path::end(), llvm::ScheduleDAGInstrs::enterRegion(), llvm::ScheduleDAGInstrs::exitRegion(), llvm::ScheduleDAGInstrs::finishBlock(), llvm::TargetSubtargetInfo::getAntiDepBreakMode(), llvm::MachineInstr::getBundleSize(), llvm::TargetSubtargetInfo::getCriticalPathRCs(), llvm::SUnit::getDepth(), llvm::MachineFunction::getFunction(), llvm::SUnit::getInstr(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetPassConfig::getOptLevel(), llvm::TargetSubtargetInfo::getOptLevelToEnablePostRAScheduler(), llvm::MachineFunction::getSubtarget(), llvm::SDep::getSUnit(), I, llvm::HexagonInstrInfo::insertNoop(), llvm::zlib::isAvailable(), llvm::MachineInstr::isBundle(), llvm::MachineInstr::isCall(), llvm::SUnit::isScheduled, llvm::HexagonInstrInfo::isSchedulingBoundary(), llvm::SDep::isWeak(), LLVM_DEBUG, LLVM_DUMP_METHOD, llvm_unreachable, MI, Mode, MRI, llvm::ScheduleHazardRecognizer::NoHazard, llvm::ScheduleHazardRecognizer::NoopHazard, llvm::SUnit::NumPredsLeft, P, llvm::printMBBReference(), Scheduler, llvm::SUnit::setDepthToAtLeast(), llvm::MachineBasicBlock::splice(), llvm::ARM_MB::ST, llvm::ScheduleDAGInstrs::startBlock(), llvm::SUnit::Succs, TII, and llvm::SUnit::WeakPredsLeft.
◆ STATISTIC() [1/3]
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NumNoops |
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"Number of noops inserted" |
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◆ STATISTIC() [2/3]
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NumStalls |
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"Number of pipeline stalls" |
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◆ STATISTIC() [3/3]
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NumFixedAnti |
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"Number of fixed anti-dependencies" |
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◆ DebugDiv
cl::opt<int> DebugDiv("postra-sched-debugdiv", cl::desc("Debug control MBBs that are scheduled"), cl::init(0), cl::Hidden) |
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◆ DebugMod
cl::opt<int> DebugMod("postra-sched-debugmod", cl::desc("Debug control MBBs that are scheduled"), cl::init(0), cl::Hidden) |
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◆ EnableAntiDepBreaking
cl::opt<std::string> EnableAntiDepBreaking("break-anti-dependencies", cl::desc("Break post-RA scheduling anti-dependencies: " "\critical\, \all\, or \none\"), cl::init("none"), cl::Hidden) |
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◆ EnablePostRAScheduler
cl::opt<bool> EnablePostRAScheduler("post-RA-scheduler", cl::desc("Enable scheduling after register allocation"), cl::init(false), cl::Hidden) |
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