LLVM
8.0.1
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#include "XCoreISelLowering.h"
#include "XCore.h"
#include "XCoreMachineFunctionInfo.h"
#include "XCoreSubtarget.h"
#include "XCoreTargetMachine.h"
#include "XCoreTargetObjectFile.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalAlias.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include "XCoreGenCallingConv.inc"
Go to the source code of this file.
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#define | DEBUG_TYPE "xcore-lower" |
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static bool | IsSmallObject (const GlobalValue *GV, const XCoreTargetLowering &XTL) |
static bool | isWordAligned (SDValue Value, SelectionDAG &DAG) |
static bool | isADDADDMUL (SDValue Op, SDValue &Mul0, SDValue &Mul1, SDValue &Addend0, SDValue &Addend1, bool requireIntermediatesHaveOneUse) |
isADDADDMUL - Return whether Op is in a form that is equivalent to add(add(mul(x,y),a),b). More... | |
static SDValue | LowerCallResult (SDValue Chain, SDValue InFlag, const SmallVectorImpl< CCValAssign > &RVLocs, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) |
LowerCallResult - Lower the result values of a call into the appropriate copies out of appropriate physical registers / memory locations. More... | |
static bool | isImmUs (int64_t val) |
static bool | isImmUs2 (int64_t val) |
static bool | isImmUs4 (int64_t val) |
#define DEBUG_TYPE "xcore-lower" |
Definition at line 43 of file XCoreISelLowering.cpp.
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isADDADDMUL - Return whether Op is in a form that is equivalent to add(add(mul(x,y),a),b).
If requireIntermediatesHaveOneUse is true then each intermediate result in the calculation must also have a single use. If the Op is in the correct form the constituent parts are written to Mul0, Mul1, Addend0 and Addend1.
Definition at line 593 of file XCoreISelLowering.cpp.
References llvm::ISD::ADD, assert(), llvm::ISD::BUILD_PAIR, llvm::SelectionDAG::ComputeNumSignBits(), llvm::ISD::EXTRACT_ELEMENT, llvm::SelectionDAG::getConstant(), llvm::APInt::getHighBitsSet(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getVTList(), llvm::SDValue::hasOneUse(), llvm::MipsISD::Hi, llvm::MVT::i32, llvm::MVT::i64, llvm::XCoreISD::LADD, llvm::MipsISD::Lo, llvm::XCoreISD::LSUB, llvm::XCoreISD::MACCS, llvm::XCoreISD::MACCU, llvm::SelectionDAG::MaskedValueIsZero(), llvm::ISD::MUL, N, Other, and llvm::ISD::SUB.
Referenced by llvm::XCoreTargetLowering::EmitInstrWithCustomInserter().
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Definition at line 1865 of file XCoreISelLowering.cpp.
Referenced by isImmUs2(), isImmUs4(), and llvm::XCoreTargetLowering::isLegalAddressingMode().
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Definition at line 1870 of file XCoreISelLowering.cpp.
References isImmUs().
Referenced by llvm::XCoreTargetLowering::isLegalAddressingMode().
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Definition at line 1875 of file XCoreISelLowering.cpp.
References isImmUs().
Referenced by llvm::XCoreTargetLowering::isLegalAddressingMode().
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Definition at line 265 of file XCoreISelLowering.cpp.
References llvm::ISD::ADD, llvm::CodeModelLargeSize, llvm::HexagonISD::CP, llvm::XCoreISD::CPRelativeWrapper, llvm::ConstantInt::get(), llvm::ConstantPoolSDNode::getAlignment(), llvm::ConstantExpr::getBitCast(), llvm::TargetMachine::getCodeModel(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getConstantPool(), llvm::ConstantPoolSDNode::getConstVal(), llvm::SelectionDAG::getContext(), llvm::Module::getDataLayout(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getEntryNode(), llvm::ConstantExpr::getGetElementPtr(), llvm::GlobalAddressSDNode::getGlobal(), llvm::Type::getInt32Ty(), llvm::Type::getInt8PtrTy(), llvm::Type::getInt8Ty(), llvm::SelectionDAG::getLoad(), llvm::ConstantPoolSDNode::getMachineCPVal(), llvm::SelectionDAG::getNode(), llvm::GlobalAddressSDNode::getOffset(), llvm::ConstantPoolSDNode::getOffset(), llvm::GlobalValue::getParent(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetBlockAddress(), llvm::SelectionDAG::getTargetConstantPool(), llvm::SelectionDAG::getTargetGlobalAddress(), llvm::TargetLoweringBase::getTargetMachine(), llvm::DataLayout::getTypeAllocSize(), llvm::SDValue::getValueType(), llvm::GlobalValue::getValueType(), llvm::MVT::i32, llvm::ConstantPoolSDNode::isMachineConstantPoolEntry(), llvm::Type::isSized(), llvm::max(), llvm::XCoreISD::PCRelativeWrapper, and llvm::CodeModel::Small.
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Definition at line 404 of file XCoreISelLowering.cpp.
References llvm::ISD::ADD, llvm::TargetLoweringBase::allowsMisalignedMemoryAccesses(), llvm::AMDGPU::HSAMD::Kernel::Key::Args, assert(), llvm::CallingConv::C, llvm::SelectionDAG::computeKnownBits(), llvm::KnownBits::countMinTrailingZeros(), llvm::ISD::EXTLOAD, llvm::DataLayout::getABITypeAlignment(), llvm::MemSDNode::getAddressSpace(), llvm::GlobalValue::getAlignment(), llvm::MemSDNode::getAlignment(), llvm::LoadSDNode::getBasePtr(), llvm::StoreSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getExternalSymbol(), llvm::SelectionDAG::getExtLoad(), llvm::MachineMemOperand::getFlags(), llvm::SelectionDAG::getGlobalAddress(), llvm::DataLayout::getIntPtrType(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SelectionDAG::getMergeValues(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::MemSDNode::getPointerInfo(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getTruncStore(), llvm::EVT::getTypeForEVT(), llvm::SDValue::getValue(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::Type::getVoidTy(), llvm::SelectionDAG::getVTList(), llvm::MachinePointerInfo::getWithOffset(), llvm::MipsISD::Hi, High, llvm::MVT::i16, llvm::MVT::i32, llvm::SelectionDAG::isBaseWithConstantOffset(), llvm::TargetLowering::isGAPlusOffset(), llvm::StoreSDNode::isTruncatingStore(), llvm::MemSDNode::isVolatile(), llvm::ARM_MB::LD, llvm::XCoreISD::LMUL, llvm::MipsISD::Lo, llvm::TargetLowering::LowerCallTo(), llvm::XCoreISD::MACCS, llvm::MinAlign(), llvm::ISD::NON_EXTLOAD, llvm::ISD::OR, llvm::MVT::Other, llvm::TargetLowering::CallLoweringInfo::setCallee(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setLibCallee(), llvm::ISD::SHL, llvm::ISD::SMUL_LOHI, llvm::ISD::SRL, llvm::ARM_MB::ST, llvm::ISD::TokenFactor, llvm::ISD::UMUL_LOHI, and llvm::ISD::ZEXTLOAD.
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LowerCallResult - Lower the result values of a call into the appropriate copies out of appropriate physical registers / memory locations.
Definition at line 1054 of file XCoreISelLowering.cpp.
References llvm::MachineRegisterInfo::addLiveIn(), llvm::CCValAssign::AExt, llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, llvm::CCState::AllocateStack(), llvm::CCState::AnalyzeFormalArguments(), llvm::ISD::ANY_EXTEND, Arg, llvm::array_lengthof(), assert(), llvm::SmallVectorTemplateCommon< T >::begin(), llvm::XCoreISD::BL, llvm::CallingConv::C, Callee, llvm::CCState::CheckReturn(), Context, llvm::MachineFrameInfo::CreateFixedObject(), llvm::MachineFrameInfo::CreateStackObject(), llvm::MachineRegisterInfo::createVirtualRegister(), E, llvm::SmallVectorBase::empty(), llvm::SmallVectorTemplateCommon< T >::end(), llvm::errs(), llvm::CallingConv::Fast, first, llvm::CCValAssign::Full, G, llvm::SelectionDAG::getCALLSEQ_END(), llvm::SelectionDAG::getCALLSEQ_START(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getDataLayout(), llvm::EVT::getEVTString(), llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::SelectionDAG::getLoad(), llvm::CCValAssign::getLocInfo(), llvm::CCValAssign::getLocMemOffset(), llvm::CCValAssign::getLocReg(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getMemcpy(), llvm::CCState::getNextStackOffset(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getNumValues(), llvm::TargetLoweringBase::getPointerTy(), llvm::MachineFunction::getRegInfo(), llvm::SelectionDAG::getRegister(), llvm::XCoreFunctionInfo::getReturnStackOffset(), llvm::EVT::getSimpleVT(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getTargetExternalSymbol(), llvm::SelectionDAG::getTargetGlobalAddress(), llvm::SDValue::getValue(), llvm::CCValAssign::getValVT(), llvm::SelectionDAG::getVTList(), llvm::MVT::Glue, llvm::MVT::i32, llvm::MipsISD::Ins, llvm::CCValAssign::isMemLoc(), llvm::CCValAssign::isRegLoc(), llvm::XCoreISD::LDWSP, llvm_unreachable, llvm::max(), llvm::MVT::Other, llvm::SmallVectorTemplateBase< T >::push_back(), R2, llvm::report_fatal_error(), llvm::XCoreISD::RETSP, second, llvm::XCoreFunctionInfo::setReturnStackOffset(), llvm::XCoreFunctionInfo::setVarArgsFrameIndex(), llvm::CCValAssign::SExt, llvm::ISD::SIGN_EXTEND, llvm::MVT::SimpleTy, Size, llvm::SmallVectorBase::size(), llvm::XCoreFrameLowering::stackSlotSize(), llvm::SPII::Store, llvm::XCoreISD::STWSP, llvm::ISD::TokenFactor, llvm::ISD::ZERO_EXTEND, and llvm::CCValAssign::ZExt.
Referenced by llvm::PPCTargetLowering::functionArgumentNeedsConsecutiveRegisters(), llvm::AVRTargetLowering::getCmpLibcallReturnType(), llvm::BPFTargetLowering::getHasJmpExt(), llvm::X86TargetLowering::getMaxSupportedInterleaveFactor(), llvm::MSP430TargetLowering::getScalarShiftAmountTy(), llvm::ARMTargetLowering::hasStandaloneRem(), llvm::HexagonTargetLowering::isCtlzFast(), llvm::HexagonTargetLowering::LowerCall(), and llvm::AArch64TargetLowering::supportSwiftError().