LLVM
8.0.1
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This file is part of the XCore Disassembler. More...
#include "XCore.h"
#include "XCoreRegisterInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/TargetRegistry.h"
#include "XCoreGenDisassemblerTables.inc"
Go to the source code of this file.
Namespaces | |
llvm | |
This class represents lattice values for constants. | |
Macros | |
#define | DEBUG_TYPE "xcore-disassembler" |
Typedefs | |
typedef MCDisassembler::DecodeStatus | DecodeStatus |
Functions | |
static bool | readInstruction16 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint16_t &Insn) |
static bool | readInstruction32 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn) |
static unsigned | getReg (const void *D, unsigned RC, unsigned RegNo) |
static DecodeStatus | DecodeGRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBitpOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeNegImmOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | Decode2RInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | Decode2RImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeR2RInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | Decode2RSrcDstInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRUSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRUSBitpInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRUSSrcDstBitpInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL2RInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLR2RInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | Decode3RInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | Decode3RImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | Decode2RUSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | Decode2RUSBitpInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL3RInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL3RSrcDstInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL2RUSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL2RUSBitpInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL6RInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL5RInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL4RSrcDstInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL4RSrcDstSrcDstInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | Decode2OpInstruction (unsigned Insn, unsigned &Op1, unsigned &Op2) |
static DecodeStatus | Decode3OpInstruction (unsigned Insn, unsigned &Op1, unsigned &Op2, unsigned &Op3) |
static DecodeStatus | Decode2OpInstructionFail (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL2OpInstructionFail (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeL5RInstructionFail (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
Target & | llvm::getTheXCoreTarget () |
static MCDisassembler * | createXCoreDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
void | LLVMInitializeXCoreDisassembler () |
This file is part of the XCore Disassembler.
Definition in file XCoreDisassembler.cpp.
#define DEBUG_TYPE "xcore-disassembler" |
Definition at line 26 of file XCoreDisassembler.cpp.
Definition at line 28 of file XCoreDisassembler.cpp.
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Definition at line 775 of file XCoreDisassembler.cpp.
Referenced by LLVMInitializeXCoreDisassembler().
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Definition at line 241 of file XCoreDisassembler.cpp.
References llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Decode2RImmInstruction(), Decode2RInstruction(), Decode2RSrcDstInstruction(), DecodeL2RInstruction(), DecodeL5RInstruction(), DecodeLR2RInstruction(), DecodeR2RInstruction(), DecodeRUSBitpInstruction(), DecodeRUSInstruction(), and DecodeRUSSrcDstBitpInstruction().
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Definition at line 275 of file XCoreDisassembler.cpp.
References Decode2RUSBitpInstruction(), Decode2RUSInstruction(), Decode3RImmInstruction(), Decode3RInstruction(), llvm::MCDisassembler::Fail, and llvm::MCInst::setOpcode().
Referenced by Decode2RImmInstruction(), Decode2RInstruction(), Decode2RSrcDstInstruction(), DecodeR2RInstruction(), DecodeRUSBitpInstruction(), DecodeRUSInstruction(), and DecodeRUSSrcDstBitpInstruction().
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Definition at line 358 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Decode2OpInstruction(), Decode2OpInstructionFail(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 345 of file XCoreDisassembler.cpp.
References Decode2OpInstruction(), Decode2OpInstructionFail(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 384 of file XCoreDisassembler.cpp.
References Decode2OpInstruction(), Decode2OpInstructionFail(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 576 of file XCoreDisassembler.cpp.
References Decode3OpInstruction(), DecodeBitpOperand(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by Decode2OpInstructionFail(), and getReg().
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Definition at line 563 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Decode3OpInstruction(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by Decode2OpInstructionFail(), and getReg().
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Definition at line 259 of file XCoreDisassembler.cpp.
References llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Decode2RUSBitpInstruction(), Decode2RUSInstruction(), Decode3RImmInstruction(), Decode3RInstruction(), DecodeL2RUSBitpInstruction(), DecodeL2RUSInstruction(), DecodeL3RInstruction(), DecodeL3RSrcDstInstruction(), DecodeL4RSrcDstInstruction(), DecodeL4RSrcDstSrcDstInstruction(), DecodeL5RInstruction(), and DecodeL6RInstruction().
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Definition at line 550 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Decode3OpInstruction(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by Decode2OpInstructionFail(), and getReg().
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Definition at line 537 of file XCoreDisassembler.cpp.
References Decode3OpInstruction(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by Decode2OpInstructionFail(), and getReg().
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Definition at line 223 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Decode2RUSBitpInstruction(), DecodeL2RUSBitpInstruction(), DecodeRUSBitpInstruction(), DecodeRUSSrcDstBitpInstruction(), and getReg().
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Definition at line 199 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by Decode2RImmInstruction(), Decode2RInstruction(), Decode2RSrcDstInstruction(), Decode2RUSBitpInstruction(), Decode2RUSInstruction(), Decode3RImmInstruction(), Decode3RInstruction(), DecodeL2RInstruction(), DecodeL2RUSBitpInstruction(), DecodeL2RUSInstruction(), DecodeL3RInstruction(), DecodeL3RSrcDstInstruction(), DecodeL4RSrcDstInstruction(), DecodeL4RSrcDstSrcDstInstruction(), DecodeL5RInstruction(), DecodeL6RInstruction(), DecodeLR2RInstruction(), DecodeR2RInstruction(), DecodeRUSBitpInstruction(), DecodeRUSInstruction(), DecodeRUSSrcDstBitpInstruction(), and getReg().
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Definition at line 438 of file XCoreDisassembler.cpp.
References DecodeL2RUSBitpInstruction(), DecodeL2RUSInstruction(), DecodeL3RInstruction(), DecodeL3RSrcDstInstruction(), llvm::MCDisassembler::Fail, and llvm::MCInst::setOpcode().
Referenced by DecodeL2RInstruction(), and DecodeLR2RInstruction().
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Definition at line 509 of file XCoreDisassembler.cpp.
References Decode2OpInstruction(), DecodeGRRegsRegisterClass(), DecodeL2OpInstructionFail(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 632 of file XCoreDisassembler.cpp.
References Decode3OpInstruction(), DecodeBitpOperand(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by DecodeL2OpInstructionFail(), and getReg().
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Definition at line 618 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Decode3OpInstruction(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by DecodeL2OpInstructionFail(), and getReg().
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Definition at line 589 of file XCoreDisassembler.cpp.
References Decode3OpInstruction(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by DecodeL2OpInstructionFail(), and getReg().
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Definition at line 603 of file XCoreDisassembler.cpp.
References Decode3OpInstruction(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by DecodeL2OpInstructionFail(), and getReg().
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Definition at line 700 of file XCoreDisassembler.cpp.
References Decode3OpInstruction(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 719 of file XCoreDisassembler.cpp.
References llvm::Address, Decode3OpInstruction(), DecodeGRRegsRegisterClass(), llvm::X86Disassembler::decodeInstruction(), Fail, llvm::getTheXCoreTarget(), readInstruction16(), readInstruction32(), Size, and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 680 of file XCoreDisassembler.cpp.
References Decode2OpInstruction(), Decode3OpInstruction(), DecodeGRRegsRegisterClass(), DecodeL5RInstructionFail(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 666 of file XCoreDisassembler.cpp.
References llvm::MCInst::clear(), DecodeL6RInstruction(), llvm::MCDisassembler::Fail, and llvm::MCInst::setOpcode().
Referenced by DecodeL5RInstruction().
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Definition at line 646 of file XCoreDisassembler.cpp.
References Decode3OpInstruction(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by DecodeL5RInstructionFail(), and getReg().
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Definition at line 523 of file XCoreDisassembler.cpp.
References Decode2OpInstruction(), DecodeGRRegsRegisterClass(), DecodeL2OpInstructionFail(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 234 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 371 of file XCoreDisassembler.cpp.
References Decode2OpInstruction(), Decode2OpInstructionFail(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 211 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), Reg, and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 411 of file XCoreDisassembler.cpp.
References Decode2OpInstruction(), Decode2OpInstructionFail(), DecodeBitpOperand(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 398 of file XCoreDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Decode2OpInstruction(), Decode2OpInstructionFail(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by getReg().
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Definition at line 424 of file XCoreDisassembler.cpp.
References Decode2OpInstruction(), Decode2OpInstructionFail(), DecodeBitpOperand(), DecodeGRRegsRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by getReg().
Definition at line 70 of file XCoreDisassembler.cpp.
References llvm::Address, llvm::MCRegisterClass::begin(), D, Decode2RImmInstruction(), Decode2RInstruction(), Decode2RSrcDstInstruction(), Decode2RUSBitpInstruction(), Decode2RUSInstruction(), Decode3RImmInstruction(), Decode3RInstruction(), DecodeBitpOperand(), DecodeGRRegsRegisterClass(), DecodeL2RInstruction(), DecodeL2RUSBitpInstruction(), DecodeL2RUSInstruction(), DecodeL3RInstruction(), DecodeL3RSrcDstInstruction(), DecodeL4RSrcDstInstruction(), DecodeL4RSrcDstSrcDstInstruction(), DecodeL5RInstruction(), DecodeL6RInstruction(), DecodeLR2RInstruction(), DecodeNegImmOperand(), DecodeR2RInstruction(), DecodeRRegsRegisterClass(), DecodeRUSBitpInstruction(), DecodeRUSInstruction(), DecodeRUSSrcDstBitpInstruction(), and llvm::MCRegisterInfo::getRegClass().
Referenced by DecodeGRRegsRegisterClass(), and DecodeRRegsRegisterClass().
void LLVMInitializeXCoreDisassembler | ( | ) |
Definition at line 781 of file XCoreDisassembler.cpp.
References createXCoreDisassembler(), llvm::getTheXCoreTarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
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Definition at line 45 of file XCoreDisassembler.cpp.
References llvm::ArrayRef< T >::size().
Referenced by DecodeL4RSrcDstSrcDstInstruction().
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Definition at line 57 of file XCoreDisassembler.cpp.
References llvm::ArrayRef< T >::size().
Referenced by DecodeL4RSrcDstSrcDstInstruction().