MipsSEISelLowering.cpp File Reference

#include "MipsSEISelLowering.h"
#include "MipsMachineFunction.h"
#include "MipsRegisterInfo.h"
#include "MipsSubtarget.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Triple.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MachineValueType.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <iterator>
#include <utility>

Include dependency graph for MipsSEISelLowering.cpp:

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "mips-isel"

Functions
static SDValue	performANDCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static bool	isVSplat (SDValue N, APInt &Imm, bool IsLittleEndian)
static bool	isVectorAllOnes (SDValue N)
static bool	isBitwiseInverse (SDValue N, SDValue OfNode)
static SDValue	performORCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static bool	shouldTransformMulToShiftsAddsSubs (APInt C, EVT VT, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
static SDValue	genConstMult (SDValue X, APInt C, const SDLoc &DL, EVT VT, EVT ShiftTy, SelectionDAG &DAG)
static SDValue	performMULCombine (SDNode *N, SelectionDAG &DAG, const TargetLowering::DAGCombinerInfo &DCI, const MipsSETargetLowering *TL, const MipsSubtarget &Subtarget)
static SDValue	performDSPShiftCombine (unsigned Opc, SDNode *N, EVT Ty, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
static SDValue	performSHLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue	performSRACombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue	performSRLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static bool	isLegalDSPCondCode (EVT Ty, ISD::CondCode CC)
static SDValue	performSETCCCombine (SDNode *N, SelectionDAG &DAG)
static SDValue	performVSELECTCombine (SDNode *N, SelectionDAG &DAG)
static SDValue	performXORCombine (SDNode *N, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
static SDValue	initAccumulator (SDValue In, const SDLoc &DL, SelectionDAG &DAG)
static SDValue	extractLOHI (SDValue Op, const SDLoc &DL, SelectionDAG &DAG)
static SDValue	lowerDSPIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc)
static SDValue	lowerMSACopyIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc)
static SDValue	lowerMSASplatZExt (SDValue Op, unsigned OpNr, SelectionDAG &DAG)
static SDValue	lowerMSASplatImm (SDValue Op, unsigned ImmOp, SelectionDAG &DAG, bool IsSigned=false)
static SDValue	getBuildVectorSplat (EVT VecTy, SDValue SplatValue, bool BigEndian, SelectionDAG &DAG)
static SDValue	lowerMSABinaryBitImmIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc, SDValue Imm, bool BigEndian)
static SDValue	truncateVecElts (SDValue Op, SelectionDAG &DAG)
static SDValue	lowerMSABitClear (SDValue Op, SelectionDAG &DAG)
static SDValue	lowerMSABitClearImm (SDValue Op, SelectionDAG &DAG)
static SDValue	lowerMSALoadIntr (SDValue Op, SelectionDAG &DAG, unsigned Intr, const MipsSubtarget &Subtarget)
static SDValue	lowerMSAStoreIntr (SDValue Op, SelectionDAG &DAG, unsigned Intr, const MipsSubtarget &Subtarget)
static bool	isConstantOrUndef (const SDValue Op)
static bool	isConstantOrUndefBUILD_VECTOR (const BuildVectorSDNode *Op)
static SDValue	lowerVECTOR_SHUFFLE_SHF (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
template<typename ValType >
static bool	fitsRegularPattern (typename SmallVectorImpl< ValType >::const_iterator Begin, unsigned CheckStride, typename SmallVectorImpl< ValType >::const_iterator End, ValType ExpectedIndex, unsigned ExpectedIndexStride)
	Determine whether a range fits a regular pattern of values. More...
static bool	isVECTOR_SHUFFLE_SPLATI (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue	lowerVECTOR_SHUFFLE_ILVEV (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue	lowerVECTOR_SHUFFLE_ILVOD (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue	lowerVECTOR_SHUFFLE_ILVR (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue	lowerVECTOR_SHUFFLE_ILVL (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue	lowerVECTOR_SHUFFLE_PCKEV (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue	lowerVECTOR_SHUFFLE_PCKOD (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue	lowerVECTOR_SHUFFLE_VSHF (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)

Variables
static cl::opt< bool >	UseMipsTailCalls ("mips-tail-calls", cl::Hidden, cl::desc("MIPS: permit tail calls."), cl::init(false))
static cl::opt< bool >	NoDPLoadStore ("mno-ldc1-sdc1", cl::init(false), cl::desc("Expand double precision loads and " "stores to their single precision " "counterparts"))

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "mips-isel"

Definition at line 53 of file MipsSEISelLowering.cpp.

Function Documentation

extractLOHI()

static SDValue extractLOHI ( SDValue  Op, const SDLoc &  DL, SelectionDAG &  DAG  )

static

Definition at line 1256 of file MipsSEISelLowering.cpp.

References llvm::ISD::BUILD_PAIR, llvm::SelectionDAG::getNode(), llvm::MipsISD::Hi, llvm::MVT::i32, llvm::MVT::i64, llvm::MipsISD::Lo, llvm::MipsISD::MFHI, and llvm::MipsISD::MFLO.

Referenced by lowerDSPIntr().

fitsRegularPattern()

template<typename ValType >

static bool fitsRegularPattern ( typename SmallVectorImpl< ValType >::const_iterator  Begin, unsigned  CheckStride, typename SmallVectorImpl< ValType >::const_iterator  End, ValType  ExpectedIndex, unsigned  ExpectedIndexStride  )

static

Determine whether a range fits a regular pattern of values.

This function accounts for the possibility of jumping over the End iterator.

Definition at line 2567 of file MipsSEISelLowering.cpp.

genConstMult()

static SDValue genConstMult ( SDValue  X, APInt  C, const SDLoc &  DL, EVT  VT, EVT  ShiftTy, SelectionDAG &  DAG  )

static

Definition at line 784 of file MipsSEISelLowering.cpp.

References llvm::ISD::ADD, llvm::APInt::ceilLogBase2(), llvm::APInt::getBitWidth(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::APInt::isNegative(), llvm::APInt::isPowerOf2(), llvm::APInt::logBase2(), llvm::ISD::SHL, llvm::ISD::SUB, and X.

Referenced by performMULCombine().

getBuildVectorSplat()

static SDValue getBuildVectorSplat ( EVT  VecTy, SDValue  SplatValue, bool  BigEndian, SelectionDAG &  DAG  )

static

Definition at line 1388 of file MipsSEISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::EVT::getVectorNumElements(), llvm::MVT::i32, llvm::MVT::i64, llvm::makeArrayRef(), llvm::ISD::SRL, std::swap(), llvm::ISD::TRUNCATE, llvm::MVT::v2i64, and llvm::MVT::v4i32.

Referenced by lowerMSABinaryBitImmIntr(), and truncateVecElts().

initAccumulator()

static SDValue initAccumulator ( SDValue  In, const SDLoc &  DL, SelectionDAG &  DAG  )

static

Definition at line 1248 of file MipsSEISelLowering.cpp.

References llvm::ISD::EXTRACT_ELEMENT, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::MVT::i32, llvm::MipsISD::MTLOHI, and llvm::MVT::Untyped.

Referenced by lowerDSPIntr().

isBitwiseInverse()

static bool isBitwiseInverse ( SDValue  N, SDValue  OfNode  )

static

Definition at line 574 of file MipsSEISelLowering.cpp.

References llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), isVectorAllOnes(), and llvm::ISD::XOR.

Referenced by performORCombine().

isConstantOrUndef()

static bool isConstantOrUndef ( const SDValue  Op )

static

Definition at line 2390 of file MipsSEISelLowering.cpp.

References llvm::SDNode::isUndef().

Referenced by isConstantOrUndefBUILD_VECTOR().

isConstantOrUndefBUILD_VECTOR()

static bool isConstantOrUndefBUILD_VECTOR ( const BuildVectorSDNode *  Op )

static

Definition at line 2400 of file MipsSEISelLowering.cpp.

References llvm::SDNode::getNumOperands(), llvm::SDNode::getOperand(), and isConstantOrUndef().

isLegalDSPCondCode()

static bool isLegalDSPCondCode ( EVT  Ty, ISD::CondCode  CC  )

static

Definition at line 941 of file MipsSEISelLowering.cpp.

References llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, and llvm::MVT::v2i16.

Referenced by performSETCCCombine().

isVECTOR_SHUFFLE_SPLATI()

static bool isVECTOR_SHUFFLE_SPLATI ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2594 of file MipsSEISelLowering.cpp.

References assert(), and llvm::SmallVectorBase::size().

isVectorAllOnes()

static bool isVectorAllOnes ( SDValue  N )

static

Definition at line 550 of file MipsSEISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::dyn_cast(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::APInt::isAllOnesValue(), llvm::BuildVectorSDNode::isConstantSplat(), and N.

Referenced by isBitwiseInverse().

isVSplat()

static bool isVSplat ( SDValue  N, APInt &  Imm, bool  IsLittleEndian  )

static

Definition at line 530 of file MipsSEISelLowering.cpp.

Referenced by performORCombine().

lowerDSPIntr()

static SDValue lowerDSPIntr ( SDValue  Op, SelectionDAG &  DAG, unsigned  Opc  )

static

Definition at line 1274 of file MipsSEISelLowering.cpp.

References assert(), E, extractLOHI(), llvm::SelectionDAG::getMergeValues(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), I, llvm::MVT::i64, initAccumulator(), llvm::MVT::Other, llvm::SmallVectorTemplateBase< T >::push_back(), llvm::ISD::TargetConstant, llvm::MVT::Untyped, llvm::SDNode::value_begin(), and llvm::SDNode::value_end().

Referenced by lowerMSABitClearImm(), and lowerMSALoadIntr().

lowerMSABinaryBitImmIntr()

static SDValue lowerMSABinaryBitImmIntr ( SDValue  Op, SelectionDAG &  DAG, unsigned  Opc, SDValue  Imm, bool  BigEndian  )

static

Definition at line 1424 of file MipsSEISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::SelectionDAG::getBuildVector(), getBuildVectorSplat(), llvm::SelectionDAG::getConstant(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::MVT::i32, llvm::MVT::i64, llvm::APInt::lshr(), llvm::ISD::SHL, std::swap(), llvm::APInt::trunc(), llvm::MVT::v2i64, llvm::MVT::v4i32, and llvm::ISD::ZERO_EXTEND.

Referenced by lowerMSABitClearImm().

lowerMSABitClear()

static SDValue lowerMSABitClear ( SDValue  Op, SelectionDAG &  DAG  )

static

Definition at line 1481 of file MipsSEISelLowering.cpp.

References llvm::ISD::AND, llvm::tgtok::Bit, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::ISD::SHL, and truncateVecElts().

Referenced by lowerMSABitClearImm().

lowerMSABitClearImm()

static SDValue lowerMSABitClearImm ( SDValue  Op, SelectionDAG &  DAG  )

static

Definition at line 1491 of file MipsSEISelLowering.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, llvm::ISD::CTLZ, llvm::ISD::CTPOP, llvm::MipsISD::DPA_W_PH, llvm::MipsISD::DPAU_H_QBL, llvm::MipsISD::DPAU_H_QBR, llvm::MipsISD::DPAX_W_PH, llvm::MipsISD::DPS_W_PH, llvm::MipsISD::DPSU_H_QBL, llvm::MipsISD::DPSU_H_QBR, llvm::MipsISD::DPSX_W_PH, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FADD, llvm::ISD::FDIV, llvm::ISD::FEXP2, llvm::ISD::FLOG2, llvm::ISD::FMA, llvm::MipsISD::FMS, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FRINT, llvm::ISD::FSQRT, llvm::ISD::FSUB, llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getConstant(), llvm::SDNode::getConstantOperandVal(), llvm::SelectionDAG::getDataLayout(), llvm::APInt::getHighBitsSet(), llvm::APInt::getLowBitsSet(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::SDNode::getOperand(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getScalarSizeInBits(), llvm::SelectionDAG::getSetCC(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::MipsSubtarget::hasMips64(), llvm::MVT::i32, llvm::MipsISD::ILVEV, llvm::MipsISD::ILVL, llvm::MipsISD::ILVOD, llvm::MipsISD::ILVR, llvm::ISD::INSERT_VECTOR_ELT, llvm::MipsISD::INSVE, llvm::MipsSubtarget::isLittle(), llvm_unreachable, lowerDSPIntr(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSACopyIntr(), lowerMSASplatImm(), lowerMSASplatZExt(), llvm::MipsISD::MAdd, llvm::MipsISD::MAddu, llvm::BitmaskEnumDetail::Mask(), llvm::Intrinsic::mips_addv_b, llvm::Intrinsic::mips_addv_d, llvm::Intrinsic::mips_addv_h, llvm::Intrinsic::mips_addv_w, llvm::Intrinsic::mips_addvi_b, llvm::Intrinsic::mips_addvi_d, llvm::Intrinsic::mips_addvi_h, llvm::Intrinsic::mips_addvi_w, llvm::Intrinsic::mips_and_v, llvm::Intrinsic::mips_andi_b, llvm::Intrinsic::mips_bclr_b, llvm::Intrinsic::mips_bclr_d, llvm::Intrinsic::mips_bclr_h, llvm::Intrinsic::mips_bclr_w, llvm::Intrinsic::mips_bclri_b, llvm::Intrinsic::mips_bclri_d, llvm::Intrinsic::mips_bclri_h, llvm::Intrinsic::mips_bclri_w, llvm::Intrinsic::mips_binsli_b, llvm::Intrinsic::mips_binsli_d, llvm::Intrinsic::mips_binsli_h, llvm::Intrinsic::mips_binsli_w, llvm::Intrinsic::mips_binsri_b, llvm::Intrinsic::mips_binsri_d, llvm::Intrinsic::mips_binsri_h, llvm::Intrinsic::mips_binsri_w, llvm::Intrinsic::mips_bmnz_v, llvm::Intrinsic::mips_bmnzi_b, llvm::Intrinsic::mips_bmz_v, llvm::Intrinsic::mips_bmzi_b, llvm::Intrinsic::mips_bneg_b, llvm::Intrinsic::mips_bneg_d, llvm::Intrinsic::mips_bneg_h, llvm::Intrinsic::mips_bneg_w, llvm::Intrinsic::mips_bnegi_b, llvm::Intrinsic::mips_bnegi_d, llvm::Intrinsic::mips_bnegi_h, llvm::Intrinsic::mips_bnegi_w, llvm::Intrinsic::mips_bnz_b, llvm::Intrinsic::mips_bnz_d, llvm::Intrinsic::mips_bnz_h, llvm::Intrinsic::mips_bnz_v, llvm::Intrinsic::mips_bnz_w, llvm::Intrinsic::mips_bsel_v, llvm::Intrinsic::mips_bseli_b, llvm::Intrinsic::mips_bset_b, llvm::Intrinsic::mips_bset_d, llvm::Intrinsic::mips_bset_h, llvm::Intrinsic::mips_bset_w, llvm::Intrinsic::mips_bseti_b, llvm::Intrinsic::mips_bseti_d, llvm::Intrinsic::mips_bseti_h, llvm::Intrinsic::mips_bseti_w, llvm::Intrinsic::mips_bz_b, llvm::Intrinsic::mips_bz_d, llvm::Intrinsic::mips_bz_h, llvm::Intrinsic::mips_bz_v, llvm::Intrinsic::mips_bz_w, llvm::Intrinsic::mips_ceq_b, llvm::Intrinsic::mips_ceq_d, llvm::Intrinsic::mips_ceq_h, llvm::Intrinsic::mips_ceq_w, llvm::Intrinsic::mips_ceqi_b, llvm::Intrinsic::mips_ceqi_d, llvm::Intrinsic::mips_ceqi_h, llvm::Intrinsic::mips_ceqi_w, llvm::Intrinsic::mips_cle_s_b, llvm::Intrinsic::mips_cle_s_d, llvm::Intrinsic::mips_cle_s_h, llvm::Intrinsic::mips_cle_s_w, llvm::Intrinsic::mips_cle_u_b, llvm::Intrinsic::mips_cle_u_d, llvm::Intrinsic::mips_cle_u_h, llvm::Intrinsic::mips_cle_u_w, llvm::Intrinsic::mips_clei_s_b, llvm::Intrinsic::mips_clei_s_d, llvm::Intrinsic::mips_clei_s_h, llvm::Intrinsic::mips_clei_s_w, llvm::Intrinsic::mips_clei_u_b, llvm::Intrinsic::mips_clei_u_d, llvm::Intrinsic::mips_clei_u_h, llvm::Intrinsic::mips_clei_u_w, llvm::Intrinsic::mips_clt_s_b, llvm::Intrinsic::mips_clt_s_d, llvm::Intrinsic::mips_clt_s_h, llvm::Intrinsic::mips_clt_s_w, llvm::Intrinsic::mips_clt_u_b, llvm::Intrinsic::mips_clt_u_d, llvm::Intrinsic::mips_clt_u_h, llvm::Intrinsic::mips_clt_u_w, llvm::Intrinsic::mips_clti_s_b, llvm::Intrinsic::mips_clti_s_d, llvm::Intrinsic::mips_clti_s_h, llvm::Intrinsic::mips_clti_s_w, llvm::Intrinsic::mips_clti_u_b, llvm::Intrinsic::mips_clti_u_d, llvm::Intrinsic::mips_clti_u_h, llvm::Intrinsic::mips_clti_u_w, llvm::Intrinsic::mips_copy_s_b, llvm::Intrinsic::mips_copy_s_d, llvm::Intrinsic::mips_copy_s_h, llvm::Intrinsic::mips_copy_s_w, llvm::Intrinsic::mips_copy_u_b, llvm::Intrinsic::mips_copy_u_d, llvm::Intrinsic::mips_copy_u_h, llvm::Intrinsic::mips_copy_u_w, llvm::Intrinsic::mips_div_s_b, llvm::Intrinsic::mips_div_s_d, llvm::Intrinsic::mips_div_s_h, llvm::Intrinsic::mips_div_s_w, llvm::Intrinsic::mips_div_u_b, llvm::Intrinsic::mips_div_u_d, llvm::Intrinsic::mips_div_u_h, llvm::Intrinsic::mips_div_u_w, llvm::Intrinsic::mips_dlsa, llvm::Intrinsic::mips_dpa_w_ph, llvm::Intrinsic::mips_dpau_h_qbl, llvm::Intrinsic::mips_dpau_h_qbr, llvm::Intrinsic::mips_dpax_w_ph, llvm::Intrinsic::mips_dps_w_ph, llvm::Intrinsic::mips_dpsu_h_qbl, llvm::Intrinsic::mips_dpsu_h_qbr, llvm::Intrinsic::mips_dpsx_w_ph, llvm::Intrinsic::mips_fadd_d, llvm::Intrinsic::mips_fadd_w, llvm::Intrinsic::mips_fceq_d, llvm::Intrinsic::mips_fceq_w, llvm::Intrinsic::mips_fcle_d, llvm::Intrinsic::mips_fcle_w, llvm::Intrinsic::mips_fclt_d, llvm::Intrinsic::mips_fclt_w, llvm::Intrinsic::mips_fcne_d, llvm::Intrinsic::mips_fcne_w, llvm::Intrinsic::mips_fcor_d, llvm::Intrinsic::mips_fcor_w, llvm::Intrinsic::mips_fcueq_d, llvm::Intrinsic::mips_fcueq_w, llvm::Intrinsic::mips_fcule_d, llvm::Intrinsic::mips_fcule_w, llvm::Intrinsic::mips_fcult_d, llvm::Intrinsic::mips_fcult_w, llvm::Intrinsic::mips_fcun_d, llvm::Intrinsic::mips_fcun_w, llvm::Intrinsic::mips_fcune_d, llvm::Intrinsic::mips_fcune_w, llvm::Intrinsic::mips_fdiv_d, llvm::Intrinsic::mips_fdiv_w, llvm::Intrinsic::mips_fexp2_d, llvm::Intrinsic::mips_fexp2_w, llvm::Intrinsic::mips_ffint_s_d, llvm::Intrinsic::mips_ffint_s_w, llvm::Intrinsic::mips_ffint_u_d, llvm::Intrinsic::mips_ffint_u_w, llvm::Intrinsic::mips_fill_b, llvm::Intrinsic::mips_fill_d, llvm::Intrinsic::mips_fill_h, llvm::Intrinsic::mips_fill_w, llvm::Intrinsic::mips_flog2_d, llvm::Intrinsic::mips_flog2_w, llvm::Intrinsic::mips_fmadd_d, llvm::Intrinsic::mips_fmadd_w, llvm::Intrinsic::mips_fmsub_d, llvm::Intrinsic::mips_fmsub_w, llvm::Intrinsic::mips_fmul_d, llvm::Intrinsic::mips_fmul_w, llvm::Intrinsic::mips_frint_d, llvm::Intrinsic::mips_frint_w, llvm::Intrinsic::mips_fsqrt_d, llvm::Intrinsic::mips_fsqrt_w, llvm::Intrinsic::mips_fsub_d, llvm::Intrinsic::mips_fsub_w, llvm::Intrinsic::mips_ftrunc_s_d, llvm::Intrinsic::mips_ftrunc_s_w, llvm::Intrinsic::mips_ftrunc_u_d, llvm::Intrinsic::mips_ftrunc_u_w, llvm::Intrinsic::mips_ilvev_b, llvm::Intrinsic::mips_ilvev_d, llvm::Intrinsic::mips_ilvev_h, llvm::Intrinsic::mips_ilvev_w, llvm::Intrinsic::mips_ilvl_b, llvm::Intrinsic::mips_ilvl_d, llvm::Intrinsic::mips_ilvl_h, llvm::Intrinsic::mips_ilvl_w, llvm::Intrinsic::mips_ilvod_b, llvm::Intrinsic::mips_ilvod_d, llvm::Intrinsic::mips_ilvod_h, llvm::Intrinsic::mips_ilvod_w, llvm::Intrinsic::mips_ilvr_b, llvm::Intrinsic::mips_ilvr_d, llvm::Intrinsic::mips_ilvr_h, llvm::Intrinsic::mips_ilvr_w, llvm::Intrinsic::mips_insert_b, llvm::Intrinsic::mips_insert_d, llvm::Intrinsic::mips_insert_h, llvm::Intrinsic::mips_insert_w, llvm::Intrinsic::mips_insve_b, llvm::Intrinsic::mips_insve_d, llvm::Intrinsic::mips_insve_h, llvm::Intrinsic::mips_insve_w, llvm::Intrinsic::mips_ldi_b, llvm::Intrinsic::mips_ldi_d, llvm::Intrinsic::mips_ldi_h, llvm::Intrinsic::mips_ldi_w, llvm::Intrinsic::mips_lsa, llvm::Intrinsic::mips_madd, llvm::Intrinsic::mips_maddu, llvm::Intrinsic::mips_maddv_b, llvm::Intrinsic::mips_maddv_d, llvm::Intrinsic::mips_maddv_h, llvm::Intrinsic::mips_maddv_w, llvm::Intrinsic::mips_max_s_b, llvm::Intrinsic::mips_max_s_d, llvm::Intrinsic::mips_max_s_h, llvm::Intrinsic::mips_max_s_w, llvm::Intrinsic::mips_max_u_b, llvm::Intrinsic::mips_max_u_d, llvm::Intrinsic::mips_max_u_h, llvm::Intrinsic::mips_max_u_w, llvm::Intrinsic::mips_maxi_s_b, llvm::Intrinsic::mips_maxi_s_d, llvm::Intrinsic::mips_maxi_s_h, llvm::Intrinsic::mips_maxi_s_w, llvm::Intrinsic::mips_maxi_u_b, llvm::Intrinsic::mips_maxi_u_d, llvm::Intrinsic::mips_maxi_u_h, llvm::Intrinsic::mips_maxi_u_w, llvm::Intrinsic::mips_min_s_b, llvm::Intrinsic::mips_min_s_d, llvm::Intrinsic::mips_min_s_h, llvm::Intrinsic::mips_min_s_w, llvm::Intrinsic::mips_min_u_b, llvm::Intrinsic::mips_min_u_d, llvm::Intrinsic::mips_min_u_h, llvm::Intrinsic::mips_min_u_w, llvm::Intrinsic::mips_mini_s_b, llvm::Intrinsic::mips_mini_s_d, llvm::Intrinsic::mips_mini_s_h, llvm::Intrinsic::mips_mini_s_w, llvm::Intrinsic::mips_mini_u_b, llvm::Intrinsic::mips_mini_u_d, llvm::Intrinsic::mips_mini_u_h, llvm::Intrinsic::mips_mini_u_w, llvm::Intrinsic::mips_mod_s_b, llvm::Intrinsic::mips_mod_s_d, llvm::Intrinsic::mips_mod_s_h, llvm::Intrinsic::mips_mod_s_w, llvm::Intrinsic::mips_mod_u_b, llvm::Intrinsic::mips_mod_u_d, llvm::Intrinsic::mips_mod_u_h, llvm::Intrinsic::mips_mod_u_w, llvm::Intrinsic::mips_msub, llvm::Intrinsic::mips_msubu, llvm::Intrinsic::mips_msubv_b, llvm::Intrinsic::mips_msubv_d, llvm::Intrinsic::mips_msubv_h, llvm::Intrinsic::mips_msubv_w, llvm::Intrinsic::mips_mulsa_w_ph, llvm::Intrinsic::mips_mult, llvm::Intrinsic::mips_multu, llvm::Intrinsic::mips_mulv_b, llvm::Intrinsic::mips_mulv_d, llvm::Intrinsic::mips_mulv_h, llvm::Intrinsic::mips_mulv_w, llvm::Intrinsic::mips_nlzc_b, llvm::Intrinsic::mips_nlzc_d, llvm::Intrinsic::mips_nlzc_h, llvm::Intrinsic::mips_nlzc_w, llvm::Intrinsic::mips_nor_v, llvm::Intrinsic::mips_nori_b, llvm::Intrinsic::mips_or_v, llvm::Intrinsic::mips_ori_b, llvm::Intrinsic::mips_pckev_b, llvm::Intrinsic::mips_pckev_d, llvm::Intrinsic::mips_pckev_h, llvm::Intrinsic::mips_pckev_w, llvm::Intrinsic::mips_pckod_b, llvm::Intrinsic::mips_pckod_d, llvm::Intrinsic::mips_pckod_h, llvm::Intrinsic::mips_pckod_w, llvm::Intrinsic::mips_pcnt_b, llvm::Intrinsic::mips_pcnt_d, llvm::Intrinsic::mips_pcnt_h, llvm::Intrinsic::mips_pcnt_w, llvm::Intrinsic::mips_sat_s_b, llvm::Intrinsic::mips_sat_s_d, llvm::Intrinsic::mips_sat_s_h, llvm::Intrinsic::mips_sat_s_w, llvm::Intrinsic::mips_sat_u_b, llvm::Intrinsic::mips_sat_u_d, llvm::Intrinsic::mips_sat_u_h, llvm::Intrinsic::mips_sat_u_w, llvm::Intrinsic::mips_shf_b, llvm::Intrinsic::mips_shf_h, llvm::Intrinsic::mips_shf_w, llvm::Intrinsic::mips_shilo, llvm::Intrinsic::mips_sldi_b, llvm::Intrinsic::mips_sldi_d, llvm::Intrinsic::mips_sldi_h, llvm::Intrinsic::mips_sldi_w, llvm::Intrinsic::mips_sll_b, llvm::Intrinsic::mips_sll_d, llvm::Intrinsic::mips_sll_h, llvm::Intrinsic::mips_sll_w, llvm::Intrinsic::mips_slli_b, llvm::Intrinsic::mips_slli_d, llvm::Intrinsic::mips_slli_h, llvm::Intrinsic::mips_slli_w, llvm::Intrinsic::mips_splat_b, llvm::Intrinsic::mips_splat_d, llvm::Intrinsic::mips_splat_h, llvm::Intrinsic::mips_splat_w, llvm::Intrinsic::mips_splati_b, llvm::Intrinsic::mips_splati_d, llvm::Intrinsic::mips_splati_h, llvm::Intrinsic::mips_splati_w, llvm::Intrinsic::mips_sra_b, llvm::Intrinsic::mips_sra_d, llvm::Intrinsic::mips_sra_h, llvm::Intrinsic::mips_sra_w, llvm::Intrinsic::mips_srai_b, llvm::Intrinsic::mips_srai_d, llvm::Intrinsic::mips_srai_h, llvm::Intrinsic::mips_srai_w, llvm::Intrinsic::mips_srari_b, llvm::Intrinsic::mips_srari_d, llvm::Intrinsic::mips_srari_h, llvm::Intrinsic::mips_srari_w, llvm::Intrinsic::mips_srl_b, llvm::Intrinsic::mips_srl_d, llvm::Intrinsic::mips_srl_h, llvm::Intrinsic::mips_srl_w, llvm::Intrinsic::mips_srli_b, llvm::Intrinsic::mips_srli_d, llvm::Intrinsic::mips_srli_h, llvm::Intrinsic::mips_srli_w, llvm::Intrinsic::mips_srlri_b, llvm::Intrinsic::mips_srlri_d, llvm::Intrinsic::mips_srlri_h, llvm::Intrinsic::mips_srlri_w, llvm::Intrinsic::mips_subv_b, llvm::Intrinsic::mips_subv_d, llvm::Intrinsic::mips_subv_h, llvm::Intrinsic::mips_subv_w, llvm::Intrinsic::mips_subvi_b, llvm::Intrinsic::mips_subvi_d, llvm::Intrinsic::mips_subvi_h, llvm::Intrinsic::mips_subvi_w, llvm::Intrinsic::mips_vshf_b, llvm::Intrinsic::mips_vshf_d, llvm::Intrinsic::mips_vshf_h, llvm::Intrinsic::mips_vshf_w, llvm::Intrinsic::mips_xor_v, llvm::Intrinsic::mips_xori_b, llvm::MipsISD::MSub, llvm::MipsISD::MSubu, llvm::ISD::MUL, llvm::MipsISD::MULSA_W_PH, llvm::MipsISD::Mult, llvm::MipsISD::Multu, llvm::ISD::OR, llvm::MipsISD::PCKEV, llvm::MipsISD::PCKOD, llvm::report_fatal_error(), llvm::ISD::SDIV, llvm::ISD::SETEQ, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETUEQ, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, llvm::MipsISD::SHF, llvm::MipsISD::SHILO, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SUB, llvm::MipsTargetLowering::Subtarget, llvm::Intrinsic::thread_pointer, llvm::MipsISD::ThreadPointer, truncateVecElts(), llvm::ISD::UDIV, llvm::ISD::UINT_TO_FP, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UREM, llvm::MipsISD::VALL_NONZERO, llvm::MipsISD::VALL_ZERO, llvm::MipsISD::VANY_NONZERO, llvm::MipsISD::VANY_ZERO, llvm::MipsISD::VEXTRACT_SEXT_ELT, llvm::MipsISD::VEXTRACT_ZEXT_ELT, llvm::ISD::VSELECT, llvm::MipsISD::VSHF, and llvm::ISD::XOR.

lowerMSACopyIntr()

static SDValue lowerMSACopyIntr ( SDValue  Op, SelectionDAG &  DAG, unsigned  Opc  )

static

Definition at line 1323 of file MipsSEISelLowering.cpp.

References llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getValueType(), llvm::SDNode::getValueType(), and llvm::EVT::getVectorElementType().

Referenced by lowerMSABitClearImm().

lowerMSALoadIntr()

static SDValue lowerMSALoadIntr ( SDValue  Op, SelectionDAG &  DAG, unsigned  Intr, const MipsSubtarget &  Subtarget  )

static

Definition at line 2254 of file MipsSEISelLowering.cpp.

References llvm::ISD::ADD, llvm::Address, llvm::MipsISD::DPAQ_S_W_PH, llvm::MipsISD::DPAQ_SA_L_W, llvm::MipsISD::DPAQX_S_W_PH, llvm::MipsISD::DPAQX_SA_W_PH, llvm::MipsISD::DPSQ_S_W_PH, llvm::MipsISD::DPSQ_SA_L_W, llvm::MipsISD::DPSQX_S_W_PH, llvm::MipsISD::DPSQX_SA_W_PH, llvm::MipsISD::EXTP, llvm::MipsISD::EXTPDP, llvm::MipsISD::EXTR_R_W, llvm::MipsISD::EXTR_RS_W, llvm::MipsISD::EXTR_S_H, llvm::MipsISD::EXTR_W, llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), Intr, llvm::MipsSubtarget::isABI_N64(), lowerDSPIntr(), llvm::MipsISD::MAQ_S_W_PHL, llvm::MipsISD::MAQ_S_W_PHR, llvm::MipsISD::MAQ_SA_W_PHL, llvm::MipsISD::MAQ_SA_W_PHR, llvm::Intrinsic::mips_dpaq_s_w_ph, llvm::Intrinsic::mips_dpaq_sa_l_w, llvm::Intrinsic::mips_dpaqx_s_w_ph, llvm::Intrinsic::mips_dpaqx_sa_w_ph, llvm::Intrinsic::mips_dpsq_s_w_ph, llvm::Intrinsic::mips_dpsq_sa_l_w, llvm::Intrinsic::mips_dpsqx_s_w_ph, llvm::Intrinsic::mips_dpsqx_sa_w_ph, llvm::Intrinsic::mips_extp, llvm::Intrinsic::mips_extpdp, llvm::Intrinsic::mips_extr_r_w, llvm::Intrinsic::mips_extr_rs_w, llvm::Intrinsic::mips_extr_s_h, llvm::Intrinsic::mips_extr_w, llvm::Intrinsic::mips_ld_b, llvm::Intrinsic::mips_ld_d, llvm::Intrinsic::mips_ld_h, llvm::Intrinsic::mips_ld_w, llvm::Intrinsic::mips_maq_s_w_phl, llvm::Intrinsic::mips_maq_s_w_phr, llvm::Intrinsic::mips_maq_sa_w_phl, llvm::Intrinsic::mips_maq_sa_w_phr, llvm::Intrinsic::mips_mthlip, llvm::Intrinsic::mips_mulsaq_s_w_ph, llvm::MipsISD::MTHLIP, llvm::MipsISD::MULSAQ_S_W_PH, llvm::ISD::SIGN_EXTEND, and llvm::MipsTargetLowering::Subtarget.

lowerMSASplatImm()

static SDValue lowerMSASplatImm ( SDValue  Op, unsigned  ImmOp, SelectionDAG &  DAG, bool  IsSigned = false  )

static

Definition at line 1380 of file MipsSEISelLowering.cpp.

References llvm::SelectionDAG::getConstant(), llvm::SDNode::getConstantOperandVal(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), and llvm::SDNode::getValueType().

Referenced by lowerMSABitClearImm().

lowerMSASplatZExt()

static SDValue lowerMSASplatZExt ( SDValue  Op, unsigned  OpNr, SelectionDAG &  DAG  )

static

Definition at line 1336 of file MipsSEISelLowering.cpp.

References llvm::ISD::AND, llvm::ISD::BITCAST, llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getSubtarget(), llvm::MCSubtargetInfo::getTargetTriple(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::MVT::i32, llvm::Triple::isLittleEndian(), llvm::makeArrayRef(), std::swap(), llvm::MVT::v2i64, and llvm::MVT::v4i32.

Referenced by lowerMSABitClearImm().

lowerMSAStoreIntr()

static SDValue lowerMSAStoreIntr ( SDValue  Op, SelectionDAG &  DAG, unsigned  Intr, const MipsSubtarget &  Subtarget  )

static

Definition at line 2328 of file MipsSEISelLowering.cpp.

References llvm::ISD::ADD, llvm::Address, llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), Intr, llvm::EVT::is128BitVector(), llvm::MipsSubtarget::isABI_N64(), llvm::EVT::isInteger(), llvm::Intrinsic::mips_st_b, llvm::Intrinsic::mips_st_d, llvm::Intrinsic::mips_st_h, llvm::Intrinsic::mips_st_w, llvm::ISD::SIGN_EXTEND, llvm::MipsTargetLowering::Subtarget, and llvm::MipsISD::VEXTRACT_SEXT_ELT.

lowerVECTOR_SHUFFLE_ILVEV()

static SDValue lowerVECTOR_SHUFFLE_ILVEV ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2626 of file MipsSEISelLowering.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T >::begin(), and llvm::SmallVectorBase::size().

lowerVECTOR_SHUFFLE_ILVL()

static SDValue lowerVECTOR_SHUFFLE_ILVL ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2766 of file MipsSEISelLowering.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T >::begin(), and llvm::SmallVectorBase::size().

lowerVECTOR_SHUFFLE_ILVOD()

static SDValue lowerVECTOR_SHUFFLE_ILVOD ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2672 of file MipsSEISelLowering.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T >::begin(), and llvm::SmallVectorBase::size().

lowerVECTOR_SHUFFLE_ILVR()

static SDValue lowerVECTOR_SHUFFLE_ILVR ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2719 of file MipsSEISelLowering.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T >::begin(), and llvm::SmallVectorBase::size().

lowerVECTOR_SHUFFLE_PCKEV()

static SDValue lowerVECTOR_SHUFFLE_PCKEV ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2814 of file MipsSEISelLowering.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T >::begin(), and llvm::SmallVectorBase::size().

lowerVECTOR_SHUFFLE_PCKOD()

static SDValue lowerVECTOR_SHUFFLE_PCKOD ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2857 of file MipsSEISelLowering.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T >::begin(), and llvm::SmallVectorBase::size().

lowerVECTOR_SHUFFLE_SHF()

static SDValue lowerVECTOR_SHUFFLE_SHF ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2514 of file MipsSEISelLowering.cpp.

References llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::MVT::i32, llvm::MipsISD::SHF, and llvm::SmallVectorBase::size().

lowerVECTOR_SHUFFLE_VSHF()

static SDValue lowerVECTOR_SHUFFLE_VSHF ( SDValue  Op, EVT  ResTy, SmallVector< int, 16 >  Indices, SelectionDAG &  DAG  )

static

Definition at line 2893 of file MipsSEISelLowering.cpp.

References llvm::SmallVectorTemplateCommon< T >::begin(), llvm::EVT::changeVectorElementTypeToInteger(), llvm::SmallVectorTemplateCommon< T >::end(), llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getTargetConstant(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), I, llvm_unreachable, llvm::SmallVectorTemplateBase< T >::push_back(), and llvm::MipsISD::VSHF.

performANDCombine()

static SDValue performANDCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 478 of file MipsSEISelLowering.cpp.

References llvm::dyn_cast(), llvm::ConstantSDNode::getAPIntValue(), llvm::SelectionDAG::getNode(), llvm::SDNode::getNumOperands(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::EVT::getSizeInBits(), llvm::SDNode::getVTList(), llvm::MipsSubtarget::hasMSA(), llvm::Log2(), llvm::makeArrayRef(), llvm::BitmaskEnumDetail::Mask(), llvm::MipsISD::VEXTRACT_SEXT_ELT, and llvm::MipsISD::VEXTRACT_ZEXT_ELT.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

performDSPShiftCombine()

static SDValue performDSPShiftCombine ( unsigned  Opc, SDNode *  N, EVT  Ty, SelectionDAG &  DAG, const MipsSubtarget &  Subtarget  )

static

Definition at line 836 of file MipsSEISelLowering.cpp.

References llvm::dyn_cast(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::APInt::getZExtValue(), llvm::MipsSubtarget::hasDSP(), llvm::MVT::i32, llvm::BuildVectorSDNode::isConstantSplat(), and llvm::MipsSubtarget::isLittle().

Referenced by performSHLCombine(), performSRACombine(), and performSRLCombine().

performMULCombine()

static SDValue performMULCombine ( SDNode *  N, SelectionDAG &  DAG, const TargetLowering::DAGCombinerInfo &  DCI, const MipsSETargetLowering *  TL, const MipsSubtarget &  Subtarget  )

static

Definition at line 820 of file MipsSEISelLowering.cpp.

References C, genConstMult(), llvm::SDNode::getOperand(), llvm::MipsTargetLowering::getScalarShiftAmountTy(), llvm::SDNode::getValueType(), llvm::EVT::isVector(), shouldTransformMulToShiftsAddsSubs(), and llvm::MipsTargetLowering::Subtarget.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

performORCombine()

static SDValue performORCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 593 of file MipsSEISelLowering.cpp.

References llvm::ISD::AND, assert(), llvm::APInt::getBitWidth(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::MipsSubtarget::hasMSA(), llvm::EVT::is128BitVector(), llvm::APInt::isAllOnesValue(), isBitwiseInverse(), llvm::MipsSubtarget::isLittle(), isVSplat(), llvm::BitmaskEnumDetail::Mask(), and llvm::ISD::VSELECT.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

performSETCCCombine()

static SDValue performSETCCCombine ( SDNode *  N, SelectionDAG &  DAG  )

static

Definition at line 959 of file MipsSEISelLowering.cpp.

References llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), isLegalDSPCondCode(), llvm::MipsISD::SETCC_DSP, llvm::MVT::v2i16, and llvm::MVT::v4i8.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

performSHLCombine()

static SDValue performSHLCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 861 of file MipsSEISelLowering.cpp.

References llvm::SDNode::getValueType(), performDSPShiftCombine(), llvm::MipsISD::SHLL_DSP, llvm::MVT::v2i16, and llvm::MVT::v4i8.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

performSRACombine()

static SDValue performSRACombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 884 of file MipsSEISelLowering.cpp.

References llvm::dyn_cast(), llvm::SelectionDAG::getNode(), llvm::SDNode::getNumOperands(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::SDNode::getVTList(), llvm::ConstantSDNode::getZExtValue(), llvm::MipsSubtarget::hasDSPR2(), llvm::MipsSubtarget::hasMSA(), llvm::makeArrayRef(), performDSPShiftCombine(), llvm::ISD::SHL, llvm::MipsISD::SHRA_DSP, llvm::MVT::v2i16, llvm::MVT::v4i8, llvm::MipsISD::VEXTRACT_SEXT_ELT, and llvm::MipsISD::VEXTRACT_ZEXT_ELT.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

performSRLCombine()

static SDValue performSRLCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 930 of file MipsSEISelLowering.cpp.

References llvm::SDNode::getValueType(), llvm::MipsSubtarget::hasDSPR2(), performDSPShiftCombine(), llvm::MipsISD::SHRL_DSP, llvm::MVT::v2i16, and llvm::MVT::v4i8.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

performVSELECTCombine()

static SDValue performVSELECTCombine ( SDNode *  N, SelectionDAG &  DAG  )

static

Definition at line 972 of file MipsSEISelLowering.cpp.

References llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::MipsISD::SELECT_CC_DSP, llvm::MipsISD::SETCC_DSP, llvm::MVT::v2i16, and llvm::MVT::v4i8.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

performXORCombine()

static SDValue performXORCombine ( SDNode *  N, SelectionDAG &  DAG, const MipsSubtarget &  Subtarget  )

static

Definition at line 989 of file MipsSEISelLowering.cpp.

References llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::MipsSubtarget::hasMSA(), llvm::EVT::is128BitVector(), llvm::ISD::isBuildVectorAllOnes(), llvm::EVT::isInteger(), llvm::ISD::OR, and llvm::MipsISD::VNOR.

Referenced by llvm::MipsSETargetLowering::PerformDAGCombine().

shouldTransformMulToShiftsAddsSubs()

static bool shouldTransformMulToShiftsAddsSubs ( APInt  C, EVT  VT, SelectionDAG &  DAG, const MipsSubtarget &  Subtarget  )

static

Definition at line 713 of file MipsSEISelLowering.cpp.

References llvm::APInt::ceilLogBase2(), llvm::SmallVectorBase::empty(), llvm::APInt::getBitWidth(), llvm::SelectionDAG::getContext(), llvm::TargetLoweringBase::getRegisterType(), llvm::EVT::getSizeInBits(), llvm::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::MipsSubtarget::isABI_N32(), llvm::MipsSubtarget::isABI_N64(), llvm::MipsSubtarget::isABI_O32(), llvm::APInt::isNegative(), llvm::APInt::isPowerOf2(), llvm::APInt::logBase2(), llvm::SmallVectorImpl< T >::pop_back_val(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by performMULCombine().

truncateVecElts()

static SDValue truncateVecElts ( SDValue  Op, SelectionDAG &  DAG  )

static

Definition at line 1468 of file MipsSEISelLowering.cpp.

References llvm::ISD::AND, getBuildVectorSplat(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SDValue::getScalarValueSizeInBits(), llvm::SelectionDAG::getSubtarget(), llvm::MCSubtargetInfo::getTargetTriple(), llvm::SDNode::getValueType(), llvm::MVT::i32, llvm::MVT::i64, llvm::Triple::isLittleEndian(), and llvm::MVT::v2i64.

Referenced by lowerMSABitClear(), and lowerMSABitClearImm().

Variable Documentation

NoDPLoadStore

cl::opt<bool> NoDPLoadStore("mno-ldc1-sdc1", cl::init(false), cl::desc("Expand double precision loads and " "stores to their single precision " "counterparts"))

static

Referenced by llvm::MipsSETargetLowering::EmitInstrWithCustomInserter(), and llvm::MipsSETargetLowering::MipsSETargetLowering().

UseMipsTailCalls

cl::opt<bool> UseMipsTailCalls("mips-tail-calls", cl::Hidden, cl::desc("MIPS: permit tail calls."), cl::init(false))

static

Referenced by llvm::MipsSETargetLowering::EmitInstrWithCustomInserter().