LLVM
8.0.1
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#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "Utils/ARMBaseInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <vector>
#include "ARMGenDisassemblerTables.inc"
Go to the source code of this file.
Namespaces | |
llvm | |
This class represents lattice values for constants. | |
Macros | |
#define | DEBUG_TYPE "arm-disassembler" |
Typedefs | |
using | DecodeStatus = MCDisassembler::DecodeStatus |
Functions | |
static bool | Check (DecodeStatus &Out, DecodeStatus In) |
static DecodeStatus | DecodeGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRnopcRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRwithAPSRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodetGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodetcGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecoderGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeHPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPR_8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPR_VFP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPairSpacedRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodePredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCCOutOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBitfieldMaskOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCopMemInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode2IdxInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegMemOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode3Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegImmOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegRegOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMemMultipleWritebackInstruction (MCInst &Inst, unsigned Insn, uint64_t Adddress, const void *Decoder) |
static DecodeStatus | DecodeT2MOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeArmMOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSMLAInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeHINTInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeTSTInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSETPANInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2CPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrModeImm12Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode5Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode5FP16Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode7Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2BInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBranchImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode6Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST1Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST2Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST3Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST4Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVSTInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD1DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD2DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD3DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD4DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeNEONModImmInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVSHLMaxInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight8Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight16Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight32Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight64Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeTBLInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodePostIdxReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCoprocessor (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMemBarrierOption (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeInstSyncBarrierOption (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMSRMask (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBankedReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDoubleRegLoad (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDoubleRegStore (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSTRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSTRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVMOVSRR (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVMOVRRS (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSwap (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVCVTD (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVCVTQ (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeNEONComplexLane64Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSpecialReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2BROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbCmpBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeRR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeIS (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModePC (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeSP (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeSOReg (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadShift (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadImm8 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadT (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadLabel (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Imm8S4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm8s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm0_1020s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Imm8 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm8 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSPImm (MCInst &Inst, uint16_t Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSPReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbCPS (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeQADDInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBLXOffset (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm12 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbTableBranch (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumb2BCCInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2SOImm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBCCTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBLTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeIT (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LDRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2STRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Adr (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LdStPre (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2ShifterImmOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecoderForMRRC2AndMCRR2 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeForVMRSandVMSR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static MCDisassembler * | createARMDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
static MCDisassembler * | createThumbDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
static DecodeStatus | checkDecodedInstruction (MCInst &MI, uint64_t &Size, uint64_t Address, raw_ostream &OS, raw_ostream &CS, uint32_t Insn, DecodeStatus Result) |
static bool | tryAddingSymbolicOperand (uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, MCInst &MI, const void *Decoder) |
tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst. More... | |
static void | tryAddingPcLoadReferenceComment (uint64_t Address, int Value, const void *Decoder) |
tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc. More... | |
static void | AddThumb1SBit (MCInst &MI, bool InITBlock) |
void | LLVMInitializeARMDisassembler () |
static DecodeStatus | DecodeRFEInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Adr (MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2ShifterImmOperand (MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) |
Variables | |
const MCInstrDesc | llvm::ARMInsts [] |
static const uint16_t | GPRDecoderTable [] |
static const uint16_t | GPRPairDecoderTable [] |
static const uint16_t | SPRDecoderTable [] |
static const uint16_t | DPRDecoderTable [] |
static const uint16_t | QPRDecoderTable [] |
static const uint16_t | DPairDecoderTable [] |
static const uint16_t | DPairSpacedDecoderTable [] |
#define DEBUG_TYPE "arm-disassembler" |
Definition at line 33 of file ARMDisassembler.cpp.
Definition at line 35 of file ARMDisassembler.cpp.
Definition at line 556 of file ARMDisassembler.cpp.
References llvm::Address, llvm::ARMCC::AL, llvm::ARMInsts, assert(), llvm::MCInst::begin(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::X86Disassembler::decodeInstruction(), llvm::MCInst::end(), llvm::MCDisassembler::Fail, llvm::MCOperand::getImm(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), I, llvm::MCInst::insert(), llvm::isPowerOf2_32(), llvm::BitmaskEnumDetail::Mask(), llvm::MCInstrDesc::NumOperands, llvm::MCInstrDesc::OpInfo, llvm::MCOperandInfo::RegClass, Size, llvm::ArrayRef< T >::size(), llvm::MCDisassembler::SoftFail, SoftFail, and Success.
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Definition at line 128 of file ARMDisassembler.cpp.
References llvm::Address, DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeArmMOVTWInstruction(), DecodeBankedReg(), DecodeBitfieldMaskOperand(), DecodeBranchImmInstruction(), DecodeCCOutOperand(), DecodeCopMemInstruction(), DecodeCoprocessor(), DecodeCPSInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPR_8RegisterClass(), DecodeDPR_VFP2RegisterClass(), DecodeDPRRegisterClass(), DecodeDPRRegListOperand(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeHINTInstruction(), DecodeHPRRegisterClass(), DecodeInstSyncBarrierOption(), DecodeIT(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemBarrierOption(), DecodeMemMultipleWritebackInstruction(), DecodeMSRMask(), DecodeNEONComplexLane64Instruction(), DecodeNEONModImmInstruction(), DecodePostIdxReg(), DecodePredicateOperand(), DecodeQADDInstruction(), DecodeQPRRegisterClass(), DecodeRegListOperand(), DecoderForMRRC2AndMCRR2(), DecoderGPRRegisterClass(), DecodeSETPANInstruction(), DecodeShiftRight16Imm(), DecodeShiftRight32Imm(), DecodeShiftRight64Imm(), DecodeShiftRight8Imm(), DecodeSMLAInstruction(), DecodeSORegImmOperand(), DecodeSORegMemOperand(), DecodeSORegRegOperand(), DecodeSPRRegisterClass(), DecodeSPRRegListOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeT2AddrModeImm0_1020s4(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2Adr(), DecodeT2BInstruction(), DecodeT2BROperand(), DecodeT2CPSInstruction(), DecodeT2Imm8(), DecodeT2Imm8S4(), DecodeT2LDRDPreInstruction(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2ShifterImmOperand(), DecodeT2SOImm(), DecodeT2STRDPreInstruction(), DecodeTBLInstruction(), DecodetcGPRRegisterClass(), DecodetGPRRegisterClass(), DecodeThumb2BCCInstruction(), DecodeThumbAddrModeIS(), DecodeThumbAddrModePC(), DecodeThumbAddrModeRR(), DecodeThumbAddrModeSP(), DecodeThumbAddSpecialReg(), DecodeThumbAddSPImm(), DecodeThumbAddSPReg(), DecodeThumbBCCTargetOperand(), DecodeThumbBLTargetOperand(), DecodeThumbBLXOffset(), DecodeThumbBROperand(), DecodeThumbCmpBROperand(), DecodeThumbCPS(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVCVTD(), DecodeVCVTQ(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), DecodeVLDST4Instruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, llvm::tgtok::In, llvm_unreachable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by AddThumb1SBit(), DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrModeImm12Operand(), DecodeArmMOVTWInstruction(), DecodeBitfieldMaskOperand(), DecodeBranchImmInstruction(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeDPRRegListOperand(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeHINTInstruction(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeNEONComplexLane64Instruction(), DecodeNEONModImmInstruction(), DecodePostIdxReg(), DecodeQADDInstruction(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderForMRRC2AndMCRR2(), DecoderGPRRegisterClass(), DecodeSMLAInstruction(), DecodeSORegImmOperand(), DecodeSORegMemOperand(), DecodeSORegRegOperand(), DecodeSPRRegListOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeT2AddrModeImm0_1020s4(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LDRDPreInstruction(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), DecodeTBLInstruction(), DecodeThumb2BCCInstruction(), DecodeThumbAddrModeIS(), DecodeThumbAddrModeRR(), DecodeThumbAddSpecialReg(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVCVTD(), DecodeVCVTQ(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 427 of file ARMDisassembler.cpp.
References llvm::Address, llvm::ARMInsts, assert(), llvm::X86Disassembler::decodeInstruction(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), MI, P, Size, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::SoftFail.
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Definition at line 414 of file ARMDisassembler.cpp.
Referenced by LLVMInitializeARMDisassembler().
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Definition at line 420 of file ARMDisassembler.cpp.
Referenced by LLVMInitializeARMDisassembler().
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Definition at line 1470 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::ARM_AM::asr, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, P, pred, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, llvm::MCDisassembler::SoftFail, llvm::ARM_AM::sub, llvm::MCDisassembler::Success, and llvm::RISCVFenceField::W.
Referenced by Check().
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Definition at line 1619 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, P, pred, llvm::MCDisassembler::SoftFail, llvm::MCDisassembler::Success, and llvm::RISCVFenceField::W.
Referenced by Check().
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Definition at line 2233 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5FP16Opc(), llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2213 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2311 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 2253 of file ARMDisassembler.cpp.
References DecodeGPRRegisterClass().
Referenced by Check(), and DecodeLDR().
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Definition at line 2193 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
Referenced by Check(), DecodeLDRPreImm(), and DecodeSTRPreImm().
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Definition at line 2089 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), pred, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Definition at line 4206 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1293 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2286 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCInst::setOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Definition at line 1126 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1320 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, pred, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3968 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1976 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, mode, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeQADDInstruction(), DecodeSMLAInstruction(), and DecodeSwap().
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Definition at line 4221 of file ARMDisassembler.cpp.
References Check(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4242 of file ARMDisassembler.cpp.
References Check(), DecodeGPRnopcRegisterClass(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1079 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPairDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeTBLInstruction(), DecodeVLD1DupInstruction(), DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1100 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPairSpacedDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1037 of file ARMDisassembler.cpp.
References DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
Referenced by Check().
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Definition at line 1045 of file ARMDisassembler.cpp.
References DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
Referenced by Check().
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Definition at line 1022 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPRDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeDPR_8RegisterClass(), DecodeDPR_VFP2RegisterClass(), DecodeDPRRegListOperand(), DecodeNEONComplexLane64Instruction(), DecodeNEONModImmInstruction(), DecodeTBLInstruction(), DecodeVCVTD(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 1268 of file ARMDisassembler.cpp.
References Check(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::max(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 5337 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARMCC::AL, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 887 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeAddrMode2IdxInstruction(), DecodeArmMOVTWInstruction(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeLDR(), DecodePostIdxReg(), DecodeQADDInstruction(), DecoderForMRRC2AndMCRR2(), DecodeSMLAInstruction(), DecodeSORegRegOperand(), DecodeSwap(), and DecodeT2AddrModeImm0_1020s4().
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Definition at line 926 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRPairDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeDoubleRegLoad(), and DecodeDoubleRegStore().
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Definition at line 876 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, Register, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 900 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1954 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1006 of file ARMDisassembler.cpp.
References DecodeSPRRegisterClass().
Referenced by Check().
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Definition at line 4115 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4970 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 5265 of file ARMDisassembler.cpp.
References Check(), DecodeAddrMode7Operand(), DecodeGPRnopcRegisterClass(), DecodePostIdxReg(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4268 of file ARMDisassembler.cpp.
References Check(), DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4293 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4106 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check(), and DecodeThumb2BCCInstruction().
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Definition at line 1862 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeRegListOperand(), DecodeRFEInstruction(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), pred, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4124 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, llvm::BitmaskEnumDetail::Mask(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 5232 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, rotate, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3108 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeVCVTD(), and DecodeVCVTQ().
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Definition at line 3931 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check(), and DecodeLDR().
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Definition at line 1112 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARMCC::AL, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check(), checkDecodedInstruction(), DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeArmMOVTWInstruction(), DecodeBranchImmInstruction(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeHINTInstruction(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeQADDInstruction(), DecodeSMLAInstruction(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeThumb2BCCInstruction(), DecodeTSTInstruction(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 1839 of file ARMDisassembler.cpp.
References Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1059 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QPRDecoderTable, Register, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeNEONComplexLane64Instruction(), DecodeNEONModImmInstruction(), DecodeVCVTQ(), and DecodeVSHLMaxInstruction().
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Definition at line 1207 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), llvm::MCInst::end(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check(), and DecodeMemMultipleWritebackInstruction().
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Definition at line 1810 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::ARM_AM::da, llvm::ARM_AM::db, DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::ia, llvm::ARM_AM::ib, mode, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 5292 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 971 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeSORegImmOperand(), DecodeT2AddrModeSOReg(), DecodeT2LDRDPreInstruction(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), and DecodeThumbTableBranch().
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Definition at line 2165 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check(), and DecodeTSTInstruction().
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Definition at line 3178 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3184 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3190 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3172 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2116 of file ARMDisassembler.cpp.
References Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1135 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARM_AM::asr, Check(), llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 1575 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::ARM_AM::asr, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeLDRPreReg(), and DecodeSTRPreReg().
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Definition at line 1172 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARM_AM::asr, Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 996 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, SPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeHPRRegisterClass(), DecodeSPRRegListOperand(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 1244 of file ARMDisassembler.cpp.
References Check(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::max(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4320 of file ARMDisassembler.cpp.
References Check(), DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4345 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 5087 of file ARMDisassembler.cpp.
References Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3724 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3858 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check(), and DecodeT2LoadImm12().
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Definition at line 3751 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2Imm8(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeT2LdStPre(), DecodeT2LoadImm8(), and DecodeT2LoadT().
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Definition at line 3709 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2Imm8S4(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeT2LDRDPreInstruction(), and DecodeT2STRDPreInstruction().
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Definition at line 3327 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check(), and DecodeT2LoadShift().
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Referenced by Check().
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Definition at line 5061 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2259 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Definition at line 3264 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check(), and DecodeThumb2BCCInstruction().
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Definition at line 2023 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, mode, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3739 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by Check(), and DecodeT2AddrModeImm8().
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Definition at line 3695 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by Check(), and DecodeT2AddrModeImm8s4().
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Definition at line 4990 of file ARMDisassembler.cpp.
References Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, P, llvm::MCDisassembler::SoftFail, llvm::MCDisassembler::Success, and llvm::RISCVFenceField::W.
Referenced by Check().
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Definition at line 3797 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3523 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm12(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3439 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3642 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadShift(), and DecodeT2LoadT().
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Definition at line 3356 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeSOReg(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3603 of file ARMDisassembler.cpp.
References Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2065 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Referenced by Check().
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Definition at line 5076 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4042 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 5027 of file ARMDisassembler.cpp.
References Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, P, llvm::MCDisassembler::SoftFail, llvm::MCDisassembler::Success, and llvm::RISCVFenceField::W.
Referenced by Check().
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Definition at line 3196 of file ARMDisassembler.cpp.
References Check(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), op, llvm::MCDisassembler::Success, and llvm::ARMISD::VTBL2.
Referenced by Check().
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Definition at line 941 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, R2, Register, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 914 of file ARMDisassembler.cpp.
References DecodeGPRRegisterClass(), and llvm::MCDisassembler::Fail.
Referenced by Check(), DecodeThumbAddrModeIS(), DecodeThumbAddrModeRR(), and DecodeThumbAddSpecialReg().
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Definition at line 4000 of file ARMDisassembler.cpp.
References Check(), DecodeMemBarrierOption(), DecodePredicateOperand(), DecodeT2BROperand(), llvm::MCDisassembler::Fail, pred, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3295 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3309 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
Referenced by Check().
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Definition at line 3280 of file ARMDisassembler.cpp.
References Check(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3319 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3232 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3884 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3895 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4074 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Definition at line 4082 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Definition at line 3944 of file ARMDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Definition at line 3256 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Definition at line 3272 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by Check().
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Definition at line 3920 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3984 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2144 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSETPANInstruction(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 5114 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeNEONModImmInstruction(), llvm::MCDisassembler::Fail, op, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 5173 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeNEONModImmInstruction(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, op, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2925 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4370 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2972 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4502 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3020 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4632 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3055 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4765 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2328 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
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Definition at line 2604 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), and llvm::MCDisassembler::Fail.
Referenced by Check().
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Definition at line 2617 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, and llvm::size().
Referenced by Check().
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Definition at line 2632 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, and llvm::size().
Referenced by Check().
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Definition at line 2645 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, and llvm::size().
Referenced by Check().
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Definition at line 4944 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4918 of file ARMDisassembler.cpp.
References Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 3153 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4437 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4569 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4702 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 4846 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::size(), and llvm::MCDisassembler::Success.
Referenced by Check().
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Definition at line 2655 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by Check(), DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
void LLVMInitializeARMDisassembler | ( | ) |
Definition at line 858 of file ARMDisassembler.cpp.
References createARMDisassembler(), createThumbDisassembler(), llvm::getTheARMBETarget(), llvm::getTheARMLETarget(), llvm::getTheThumbBETarget(), llvm::getTheThumbLETarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
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tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc.
These can often be values in a literal pool near the Address of the instruction. The Address of the instruction and its immediate Value are used as a possible literal pool entry. The SymbolLookUp call back will return the name of a symbol referenced by the literal pool's entry if the referenced address is that of a symbol. Or it will return a pointer to a literal 'C' string if the referenced address of the literal pool's entry is an address into a section with 'C' string literals.
Definition at line 546 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::tryAddingPcLoadReferenceComment().
Referenced by DecodeAddrModeImm12Operand(), and DecodeThumbAddrModePC().
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tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst.
The immediate Value has had any PC adjustment made by the caller. If the instruction is a branch instruction then isBranch is true, else false. If the getOpInfo() function was set as part of the setupForSymbolicDisassembly() call then that function is called to get any symbolic information at the Address for this instruction. If that returns non-zero then the symbolic information it returns is used to create an MCExpr and that is added as an operand to the MCInst. If getOpInfo() returns zero and isBranch is true then a symbol look up for Value is done and if a symbol is found an MCExpr is created with that, else an MCExpr with Value is created. This function returns true if it adds an operand to the MCInst and false otherwise.
Definition at line 528 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by DecodeArmMOVTWInstruction(), DecodeBranchImmInstruction(), DecodeT2BInstruction(), DecodeT2BROperand(), DecodeT2MOVTWInstruction(), DecodeThumbBCCTargetOperand(), DecodeThumbBLTargetOperand(), DecodeThumbBLXOffset(), DecodeThumbBROperand(), and DecodeThumbCmpBROperand().
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Definition at line 1070 of file ARMDisassembler.cpp.
Referenced by DecodeDPairRegisterClass().
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Definition at line 1089 of file ARMDisassembler.cpp.
Referenced by DecodeDPairSpacedRegisterClass().
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Definition at line 1011 of file ARMDisassembler.cpp.
Referenced by DecodeDPRRegisterClass().
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Definition at line 869 of file ARMDisassembler.cpp.
Referenced by DecodeGPRRegisterClass().
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Definition at line 921 of file ARMDisassembler.cpp.
Referenced by DecodeGPRPairRegisterClass().
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Definition at line 1052 of file ARMDisassembler.cpp.
Referenced by DecodeQPRRegisterClass().
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Definition at line 985 of file ARMDisassembler.cpp.
Referenced by DecodeSPRRegisterClass().