LLVM
8.0.1
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Memory legalizer - implements memory model. More...
#include "AMDGPU.h"
#include "AMDGPUMachineModuleInfo.h"
#include "AMDGPUSubtarget.h"
#include "SIDefines.h"
#include "SIInstrInfo.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/None.h"
#include "llvm/ADT/Optional.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Pass.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <list>
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "si-memory-legalizer" |
#define | PASS_NAME "SI Memory Legalizer" |
Enumerations | |
enum | SIMemOp |
Memory operation flags. Can be ORed together. More... | |
enum | Position |
Position to insert a new instruction relative to an existing instruction. More... | |
enum | SIAtomicScope |
The atomic synchronization scopes supported by the AMDGPU target. More... | |
enum | SIAtomicAddrSpace |
The distinct address spaces supported by the AMDGPU target for atomic memory operation. More... | |
Memory legalizer - implements memory model.
More information can be found here: http://llvm.org/docs/AMDGPUUsage.html#memory-model
Definition in file SIMemoryLegalizer.cpp.
#define DEBUG_TYPE "si-memory-legalizer" |
Definition at line 48 of file SIMemoryLegalizer.cpp.
Definition at line 49 of file SIMemoryLegalizer.cpp.
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Position to insert a new instruction relative to an existing instruction.
Definition at line 65 of file SIMemoryLegalizer.cpp.
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The distinct address spaces supported by the AMDGPU target for atomic memory operation.
Can be ORed toether.
Definition at line 82 of file SIMemoryLegalizer.cpp.
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The atomic synchronization scopes supported by the AMDGPU target.
Definition at line 71 of file SIMemoryLegalizer.cpp.
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Memory operation flags. Can be ORed together.
Definition at line 56 of file SIMemoryLegalizer.cpp.