llvm::SIRegisterInfo Class Reference

#include "Target/AMDGPU/SIRegisterInfo.h"

Inheritance diagram for llvm::SIRegisterInfo:

Collaboration diagram for llvm::SIRegisterInfo:

Public Member Functions
	SIRegisterInfo (const GCNSubtarget &ST)
bool	spillSGPRToVGPR () const
bool	spillSGPRToSMEM () const
unsigned	reservedPrivateSegmentBufferReg (const MachineFunction &MF) const
	Return the end register initially reserved for the scratch buffer in case spilling is needed. More...
unsigned	reservedPrivateSegmentWaveByteOffsetReg (const MachineFunction &MF) const
	Return the end register initially reserved for the scratch wave offset in case spilling is needed. More...
unsigned	reservedStackPtrOffsetReg (const MachineFunction &MF) const
BitVector	getReservedRegs (const MachineFunction &MF) const override
const MCPhysReg *	getCalleeSavedRegs (const MachineFunction *MF) const override
const MCPhysReg *	getCalleeSavedRegsViaCopy (const MachineFunction *MF) const
const uint32_t *	getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
unsigned	getCSRFirstUseCost () const override
unsigned	getFrameRegister (const MachineFunction &MF) const override
bool	requiresRegisterScavenging (const MachineFunction &Fn) const override
bool	requiresFrameIndexScavenging (const MachineFunction &MF) const override
bool	requiresFrameIndexReplacementScavenging (const MachineFunction &MF) const override
bool	requiresVirtualBaseRegisters (const MachineFunction &Fn) const override
bool	trackLivenessAfterRegAlloc (const MachineFunction &MF) const override
int64_t	getMUBUFInstrOffset (const MachineInstr *MI) const
int64_t	getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const override
bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
void	materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const override
void	resolveFrameIndex (MachineInstr &MI, unsigned BaseReg, int64_t Offset) const override
bool	isFrameOffsetLegal (const MachineInstr *MI, unsigned BaseReg, int64_t Offset) const override
const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
bool	spillSGPR (MachineBasicBlock::iterator MI, int FI, RegScavenger *RS, bool OnlyToVGPR=false) const
	If OnlyToVGPR is true, this will only succeed if this. More...
bool	restoreSGPR (MachineBasicBlock::iterator MI, int FI, RegScavenger *RS, bool OnlyToVGPR=false) const
void	eliminateFrameIndex (MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const override
bool	eliminateSGPRToVGPRSpillFrameIndex (MachineBasicBlock::iterator MI, int FI, RegScavenger *RS) const
	Special case of eliminateFrameIndex. More...
StringRef	getRegAsmName (unsigned Reg) const override
unsigned	getHWRegIndex (unsigned Reg) const
const TargetRegisterClass *	getPhysRegClass (unsigned Reg) const
	Return the 'base' register class for this register. More...
bool	isSGPRClass (const TargetRegisterClass *RC) const
bool	isSGPRClassID (unsigned RCID) const
bool	isSGPRReg (const MachineRegisterInfo &MRI, unsigned Reg) const
bool	hasVGPRs (const TargetRegisterClass *RC) const
const TargetRegisterClass *	getEquivalentVGPRClass (const TargetRegisterClass *SRC) const
const TargetRegisterClass *	getEquivalentSGPRClass (const TargetRegisterClass *VRC) const
const TargetRegisterClass *	getSubRegClass (const TargetRegisterClass *RC, unsigned SubIdx) const
bool	shouldRewriteCopySrc (const TargetRegisterClass *DefRC, unsigned DefSubReg, const TargetRegisterClass *SrcRC, unsigned SrcSubReg) const override
bool	opCanUseLiteralConstant (unsigned OpType) const
bool	opCanUseInlineConstant (unsigned OpType) const
unsigned	findUnusedRegister (const MachineRegisterInfo &MRI, const TargetRegisterClass *RC, const MachineFunction &MF) const
	Returns a register that is not used at any point in the function. More...
unsigned	getSGPRPressureSet () const
unsigned	getVGPRPressureSet () const
const TargetRegisterClass *	getRegClassForReg (const MachineRegisterInfo &MRI, unsigned Reg) const
bool	isVGPR (const MachineRegisterInfo &MRI, unsigned Reg) const
bool	isSGPRPressureSet (unsigned SetID) const
bool	isVGPRPressureSet (unsigned SetID) const
ArrayRef< int16_t >	getRegSplitParts (const TargetRegisterClass *RC, unsigned EltSize) const
bool	shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
unsigned	getRegPressureSetLimit (const MachineFunction &MF, unsigned Idx) const override
const int *	getRegUnitPressureSets (unsigned RegUnit) const override
unsigned	getReturnAddressReg (const MachineFunction &MF) const
const TargetRegisterClass *	getConstrainedRegClassForOperand (const MachineOperand &MO, const MachineRegisterInfo &MRI) const override
MachineInstr *	findReachingDef (unsigned Reg, unsigned SubReg, MachineInstr &Use, MachineRegisterInfo &MRI, LiveIntervals *LIS) const
Public Member Functions inherited from llvm::AMDGPURegisterInfo
	AMDGPURegisterInfo ()
void	reserveRegisterTuples (BitVector &, unsigned Reg) const

Additional Inherited Members
Static Public Member Functions inherited from llvm::AMDGPURegisterInfo
static unsigned	getSubRegFromChannel (unsigned Channel)

Detailed Description

Definition at line 29 of file SIRegisterInfo.h.

Constructor & Destructor Documentation

SIRegisterInfo()

SIRegisterInfo::SIRegisterInfo

(

const GCNSubtarget &

ST

)

Definition at line 62 of file SIRegisterInfo.cpp.

References assert(), getRegUnitPressureSets(), llvm::GCNSubtarget::hasScalarStores(), isSGPRPressureSet(), and isVGPRPressureSet().

Member Function Documentation

eliminateFrameIndex()

void SIRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  MI, int  SPAdj, unsigned  FIOperandNum, RegScavenger *  RS  ) const

override

Definition at line 989 of file SIRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::SIMachineFunctionInfo::addToSpilledVGPRs(), assert(), llvm::BuildMI(), buildMUBUFOffsetLoadStore(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MDNode::get(), llvm::MachineFunction::getFrameInfo(), llvm::SIMachineFunctionInfo::getFrameOffsetReg(), llvm::MachineFunction::getInfo(), llvm::GCNSubtarget::getInstrInfo(), llvm::AMDGPU::getNamedOperandIdx(), getNumSubRegsForSpillOp(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::AMDGPUSubtarget::hasInv2PiInlineImm(), llvm::AMDGPU::isInlinableLiteral32(), llvm::MachineOperand::isKill(), llvm::RegState::Kill, llvm::Log2_32(), MRI, restoreSGPR(), spillSGPR(), llvm::ARM_MB::ST, and TII.

Referenced by getCSRFirstUseCost().

eliminateSGPRToVGPRSpillFrameIndex()

bool SIRegisterInfo::eliminateSGPRToVGPRSpillFrameIndex	(	MachineBasicBlock::iterator	MI,
		int	FI,
		RegScavenger *	RS
	)		const

Special case of eliminateFrameIndex.

Returns true if the SGPR was spilled to a VGPR and the stack slot can be safely eliminated when all other users are handled.

Definition at line 967 of file SIRegisterInfo.cpp.

References llvm_unreachable, restoreSGPR(), and spillSGPR().

Referenced by getCSRFirstUseCost(), and llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

findReachingDef()

MachineInstr * SIRegisterInfo::findReachingDef	(	unsigned	Reg,
		unsigned	SubReg,
		MachineInstr &	Use,
		MachineRegisterInfo &	MRI,
		LiveIntervals *	LIS
	)		const

Definition at line 1607 of file SIRegisterInfo.cpp.

References assert(), llvm::tgtok::Def, llvm::VNInfo::def, llvm::Pass::getAnalysis(), llvm::LiveIntervals::getInstructionFromIndex(), llvm::LiveIntervals::getInstructionIndex(), llvm::LiveIntervals::getInterval(), llvm::MachineRegisterInfo::getMaxLaneMaskForVReg(), llvm::LiveIntervals::getRegUnit(), llvm::LiveRange::getVNInfoAt(), llvm::LiveIntervals::hasInterval(), llvm::LiveInterval::hasSubRanges(), llvm::SlotIndex::isValid(), llvm::MCRegisterInfo::DiffListIterator::isValid(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::MachineInstr::modifiesRegister(), and llvm::LiveInterval::subranges().

Referenced by isVGPRPressureSet(), and optimizeVcndVcmpPair().

findUnusedRegister()

unsigned SIRegisterInfo::findUnusedRegister	(	const MachineRegisterInfo &	MRI,
		const TargetRegisterClass *	RC,
		const MachineFunction &	MF
	)		const

Returns a register that is not used at any point in the function.

If all registers are used, then this function will return

Definition at line 1386 of file SIRegisterInfo.cpp.

References llvm::MachineRegisterInfo::isAllocatable(), and llvm::MachineRegisterInfo::isPhysRegUsed().

Referenced by llvm::SIInstrInfo::calculateLDSSpillAddress(), and opCanUseInlineConstant().

getCalleeSavedRegs()

const MCPhysReg * SIRegisterInfo::getCalleeSavedRegs ( const MachineFunction *  MF ) const

override

Definition at line 53 of file AMDGPURegisterInfo.cpp.

References llvm::CallingConv::C, llvm::CallingConv::Cold, llvm::CallingConv::Fast, llvm::Function::getCallingConv(), and llvm::MachineFunction::getFunction().

Referenced by spillSGPRToSMEM().

getCalleeSavedRegsViaCopy()

const MCPhysReg * SIRegisterInfo::getCalleeSavedRegsViaCopy

(

const MachineFunction *

MF

)

const

Definition at line 70 of file AMDGPURegisterInfo.cpp.

Referenced by llvm::SITargetLowering::insertCopiesSplitCSR(), llvm::SITargetLowering::LowerReturn(), and spillSGPRToSMEM().

getCallPreservedMask()

const uint32_t * SIRegisterInfo::getCallPreservedMask ( const MachineFunction &  MF, CallingConv::ID  CC  ) const

override

Definition at line 74 of file AMDGPURegisterInfo.cpp.

References llvm::CallingConv::C, llvm::CallingConv::Cold, and llvm::CallingConv::Fast.

Referenced by llvm::SITargetLowering::isEligibleForTailCallOptimization(), and spillSGPRToSMEM().

getConstrainedRegClassForOperand()

const TargetRegisterClass * SIRegisterInfo::getConstrainedRegClassForOperand ( const MachineOperand &  MO, const MachineRegisterInfo &  MRI  ) const

override

Definition at line 1581 of file SIRegisterInfo.cpp.

References llvm::RegisterBank::getID(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegBankOrNull(), llvm_unreachable, MRI, and Size.

Referenced by llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), buildEXP(), getConstant(), and isVGPRPressureSet().

getCSRFirstUseCost()

unsigned llvm::SIRegisterInfo::getCSRFirstUseCost ( ) const

inlineoverride

Definition at line 71 of file SIRegisterInfo.h.

References eliminateFrameIndex(), eliminateSGPRToVGPRSpillFrameIndex(), getFrameIndexInstrOffset(), getFrameRegister(), getMUBUFInstrOffset(), getPointerRegClass(), getRegAsmName(), isFrameOffsetLegal(), Kind, materializeFrameBaseRegister(), MI, needsFrameBaseReg(), requiresFrameIndexReplacementScavenging(), requiresFrameIndexScavenging(), requiresRegisterScavenging(), requiresVirtualBaseRegisters(), resolveFrameIndex(), restoreSGPR(), spillSGPR(), and trackLivenessAfterRegAlloc().

getEquivalentSGPRClass()

const TargetRegisterClass * SIRegisterInfo::getEquivalentSGPRClass

(

const TargetRegisterClass *

VRC

)

const

Returns

A SGPR reg class with the same width as SRC

Definition at line 1300 of file SIRegisterInfo.cpp.

References llvm_unreachable.

Referenced by isSGPRReg(), and tryChangeVGPRtoSGPRinCopy().

getEquivalentVGPRClass()

const TargetRegisterClass * SIRegisterInfo::getEquivalentVGPRClass

(

const TargetRegisterClass *

SRC

)

const

Returns

A VGPR reg class with the same width as SRC

Definition at line 1280 of file SIRegisterInfo.cpp.

References llvm_unreachable.

Referenced by foldVGPRCopyIntoRegSequence(), and isSGPRReg().

getFrameIndexInstrOffset()

int64_t SIRegisterInfo::getFrameIndexInstrOffset ( const MachineInstr *  MI, int  Idx  ) const

override

Definition at line 282 of file SIRegisterInfo.cpp.

References assert(), getMUBUFInstrOffset(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), and llvm::SIInstrInfo::isMUBUF().

Referenced by getCSRFirstUseCost().

getFrameRegister()

unsigned SIRegisterInfo::getFrameRegister ( const MachineFunction &  MF ) const

override

Definition at line 86 of file AMDGPURegisterInfo.cpp.

References llvm::SIMachineFunctionInfo::getFrameOffsetReg(), and llvm::MachineFunction::getInfo().

Referenced by getCSRFirstUseCost(), and llvm::SIFrameLowering::getFrameIndexReference().

getHWRegIndex()

unsigned llvm::SIRegisterInfo::getHWRegIndex ( unsigned  Reg ) const

inline

Definition at line 123 of file SIRegisterInfo.h.

References getPhysRegClass().

Referenced by llvm::SIInstrInfo::copyPhysReg(), and hasAnyNonFlatUseOfReg().

getMUBUFInstrOffset()

int64_t SIRegisterInfo::getMUBUFInstrOffset

(

const MachineInstr *

MI

)

const

Definition at line 274 of file SIRegisterInfo.cpp.

References assert(), llvm::MachineOperand::getImm(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::SIInstrInfo::isMUBUF().

Referenced by getCSRFirstUseCost(), getFrameIndexInstrOffset(), isFrameOffsetLegal(), and needsFrameBaseReg().

getPhysRegClass()

const TargetRegisterClass * SIRegisterInfo::getPhysRegClass

(

unsigned

Reg

)

const

Return the 'base' register class for this register.

e.g. SGPR0 => SReg_32, VGPR => VGPR_32 SGPR0_SGPR1 -> SReg_32, etc.

Definition at line 1228 of file SIRegisterInfo.cpp.

References assert(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by llvm::SIInstrInfo::copyPhysReg(), llvm::createR600ISelDag(), llvm::SIInstrInfo::FoldImmediate(), getCopyRegClasses(), getHWRegIndex(), getRegClassForReg(), isSGPRReg(), restoreSGPR(), and spillSGPR().

getPointerRegClass()

const TargetRegisterClass * SIRegisterInfo::getPointerRegClass ( const MachineFunction &  MF, unsigned  Kind = 0  ) const

override

Definition at line 386 of file SIRegisterInfo.cpp.

Referenced by getCSRFirstUseCost().

getRegAsmName()

StringRef SIRegisterInfo::getRegAsmName ( unsigned  Reg ) const

override

Definition at line 1166 of file SIRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getRegAsmName(), and REG_RANGE.

Referenced by getCSRFirstUseCost().

getRegClassForReg()

const TargetRegisterClass * SIRegisterInfo::getRegClassForReg	(	const MachineRegisterInfo &	MRI,
		unsigned	Reg
	)		const

Definition at line 1500 of file SIRegisterInfo.cpp.

References getPhysRegClass(), llvm::MachineRegisterInfo::getRegClass(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by buildEXP(), buildMUBUFOffsetLoadStore(), getVGPRPressureSet(), isVGPR(), and llvm::SIInstrInfo::verifyInstruction().

getRegPressureLimit()

unsigned SIRegisterInfo::getRegPressureLimit ( const TargetRegisterClass *  RC, MachineFunction &  MF  ) const

override

Definition at line 1536 of file SIRegisterInfo.cpp.

References llvm::MachineFunction::getFunction(), llvm::TargetRegisterClass::getID(), llvm::MachineFunction::getInfo(), llvm::GCNSubtarget::getMaxNumSGPRs(), llvm::GCNSubtarget::getMaxNumVGPRs(), llvm::AMDGPUSubtarget::getOccupancyWithLocalMemSize(), llvm::MachineFunction::getSubtarget(), and llvm::ARM_MB::ST.

Referenced by getRegPressureSetLimit(), and isVGPRPressureSet().

getRegPressureSetLimit()

unsigned SIRegisterInfo::getRegPressureSetLimit ( const MachineFunction &  MF, unsigned  Idx  ) const

override

Definition at line 1554 of file SIRegisterInfo.cpp.

References getRegPressureLimit(), getSGPRPressureSet(), and getVGPRPressureSet().

Referenced by llvm::GCNMaxOccupancySchedStrategy::initialize(), and isVGPRPressureSet().

getRegSplitParts()

ArrayRef< int16_t > SIRegisterInfo::getRegSplitParts	(	const TargetRegisterClass *	RC,
		unsigned	EltSize
	)		const

Definition at line 1396 of file SIRegisterInfo.cpp.

References assert(), llvm::AMDGPU::getRegBitWidth(), llvm_unreachable, llvm::makeArrayRef(), and llvm::TargetRegisterClass::MC.

Referenced by llvm::SIInstrInfo::copyPhysReg(), isVGPRPressureSet(), llvm::SIInstrInfo::materializeImmediate(), restoreSGPR(), and spillSGPR().

getRegUnitPressureSets()

const int * SIRegisterInfo::getRegUnitPressureSets ( unsigned  RegUnit ) const

override

Definition at line 1567 of file SIRegisterInfo.cpp.

References llvm::Empty.

Referenced by hasPressureSet(), isVGPRPressureSet(), and SIRegisterInfo().

getReservedRegs()

BitVector SIRegisterInfo::getReservedRegs ( const MachineFunction &  MF ) const

override

Definition at line 147 of file SIRegisterInfo.cpp.

References assert(), llvm::SIMachineFunctionInfo::getFrameOffsetReg(), llvm::MachineFunction::getInfo(), llvm::GCNSubtarget::getMaxNumSGPRs(), llvm::GCNSubtarget::getMaxNumVGPRs(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), llvm::SIMachineFunctionInfo::getStackPtrOffsetReg(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPURegisterInfo::reserveRegisterTuples(), and llvm::ARM_MB::ST.

Referenced by spillSGPRToSMEM().

getReturnAddressReg()

unsigned SIRegisterInfo::getReturnAddressReg

(

const MachineFunction &

MF

)

const

Definition at line 1575 of file SIRegisterInfo.cpp.

Referenced by llvm::SITargetLowering::EmitInstrWithCustomInserter(), isVGPRPressureSet(), llvm::SITargetLowering::LowerCall(), and llvm::SITargetLowering::LowerReturn().

getSGPRPressureSet()

unsigned llvm::SIRegisterInfo::getSGPRPressureSet ( ) const

inline

Definition at line 192 of file SIRegisterInfo.h.

Referenced by getRegPressureSetLimit(), llvm::GCNMaxOccupancySchedStrategy::initialize(), and llvm::SIScheduleDAGMI::SIScheduleDAGMI().

getSubRegClass()

const TargetRegisterClass * SIRegisterInfo::getSubRegClass	(	const TargetRegisterClass *	RC,
		unsigned	SubIdx
	)		const

Returns

The register class that is used for a sub-register of RC for the given SubIdx. If SubIdx equals NoSubRegister, RC will be returned.

Definition at line 1318 of file SIRegisterInfo.cpp.

References isSGPRClass(), and llvm_unreachable.

Referenced by foldVGPRCopyIntoRegSequence(), llvm::SIInstrInfo::isLegalRegOperand(), and isSGPRReg().

getVGPRPressureSet()

unsigned llvm::SIRegisterInfo::getVGPRPressureSet ( ) const

inline

Definition at line 193 of file SIRegisterInfo.h.

References getRegClassForReg(), and isVGPR().

Referenced by getRegPressureSetLimit(), llvm::GCNMaxOccupancySchedStrategy::initialize(), and llvm::SIScheduleDAGMI::SIScheduleDAGMI().

hasVGPRs()

bool SIRegisterInfo::hasVGPRs

(

const TargetRegisterClass *

RC

)

const

Returns

true if this class contains VGPR registers.

Definition at line 1258 of file SIRegisterInfo.cpp.

References llvm_unreachable, and Size.

Referenced by findSingleRegDef(), findSRegBaseAndIndex(), hasVGPROperands(), hoistAndMergeSGPRInits(), isSGPRClass(), isSGPRReg(), isSGPRToVGPRCopy(), isVGPR(), isVGPRToSGPRCopy(), llvm::SIInstrInfo::loadRegFromStackSlot(), phiHasVGPROperands(), llvm::SIInstrInfo::storeRegToStackSlot(), and llvm::SIInstrInfo::verifyInstruction().

isFrameOffsetLegal()

bool SIRegisterInfo::isFrameOffsetLegal ( const MachineInstr *  MI, unsigned  BaseReg, int64_t  Offset  ) const

override

Definition at line 375 of file SIRegisterInfo.cpp.

References getMUBUFInstrOffset(), and llvm::SIInstrInfo::isMUBUF().

Referenced by getCSRFirstUseCost().

isSGPRClass()

bool llvm::SIRegisterInfo::isSGPRClass ( const TargetRegisterClass *  RC ) const

inline

Returns

true if this class contains only SGPR registers

Definition at line 132 of file SIRegisterInfo.h.

References hasVGPRs().

Referenced by buildEXP(), llvm::SIInstrInfo::canInsertSelect(), llvm::SIInstrInfo::copyPhysReg(), llvm::SIInstrInfo::FoldImmediate(), foldVGPRCopyIntoRegSequence(), llvm::SIInstrInfo::getMovOpcode(), llvm::AMDGPURegisterBankInfo::getRegBankFromRegClass(), getSubRegClass(), hoistAndMergeSGPRInits(), isEqual(), isSGPRClassID(), isSGPRReg(), isSGPRToVGPRCopy(), isVGPRToSGPRCopy(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::SIInstrInfo::materializeImmediate(), restoreSGPR(), setM0ToIndexFromSGPR(), spillSGPR(), llvm::SIInstrInfo::storeRegToStackSlot(), stripExtractLoElt(), and llvm::SIInstrInfo::usesConstantBus().

isSGPRClassID()

bool llvm::SIRegisterInfo::isSGPRClassID ( unsigned  RCID ) const

inline

Returns

true if this class ID contains only SGPR registers

Definition at line 137 of file SIRegisterInfo.h.

References getRegClass(), and isSGPRClass().

isSGPRPressureSet()

bool llvm::SIRegisterInfo::isSGPRPressureSet ( unsigned  SetID ) const

inline

Definition at line 199 of file SIRegisterInfo.h.

References llvm::BitVector::test().

Referenced by SIRegisterInfo().

isSGPRReg()

bool llvm::SIRegisterInfo::isSGPRReg ( const MachineRegisterInfo &  MRI, unsigned  Reg  ) const

inline

Definition at line 141 of file SIRegisterInfo.h.

References getEquivalentSGPRClass(), getEquivalentVGPRClass(), getPhysRegClass(), llvm::MachineRegisterInfo::getRegClass(), getSubRegClass(), hasVGPRs(), isSGPRClass(), llvm::TargetRegisterInfo::isVirtualRegister(), and shouldRewriteCopySrc().

Referenced by addRegsToSet(), llvm::SIInstrInfo::convertToThreeAddress(), findSingleRegDef(), findSRegBaseAndIndex(), llvm::SITargetLowering::isSDNodeSourceOfDivergence(), llvm::SIInstrInfo::isVGPRCopy(), and tryConstantFoldOp().

isVGPR()

bool SIRegisterInfo::isVGPR	(	const MachineRegisterInfo &	MRI,
		unsigned	Reg
	)		const

Definition at line 1508 of file SIRegisterInfo.cpp.

References assert(), getRegClassForReg(), and hasVGPRs().

Referenced by addRegsToSet(), llvm::SIInstrInfo::canShrink(), findSingleRegDef(), llvm::SIInstrInfo::FoldImmediate(), getVGPRPressureSet(), matchSwap(), and tryAddToFoldList().

isVGPRPressureSet()

bool llvm::SIRegisterInfo::isVGPRPressureSet ( unsigned  SetID ) const

inline

Definition at line 202 of file SIRegisterInfo.h.

References findReachingDef(), getConstrainedRegClassForOperand(), getRegPressureLimit(), getRegPressureSetLimit(), getRegSplitParts(), getRegUnitPressureSets(), getReturnAddressReg(), shouldCoalesce(), SubReg, and llvm::BitVector::test().

Referenced by SIRegisterInfo().

materializeFrameBaseRegister()

void SIRegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock *  MBB, unsigned  BaseReg, int  FrameIdx, int64_t  Offset  ) const

override

Definition at line 303 of file SIRegisterInfo.cpp.

References llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::end(), llvm::MDNode::get(), llvm::GCNSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MipsISD::Ins, llvm::RegState::Kill, MRI, and TII.

Referenced by getCSRFirstUseCost().

needsFrameBaseReg()

bool SIRegisterInfo::needsFrameBaseReg ( MachineInstr *  MI, int64_t  Offset  ) const

override

Definition at line 294 of file SIRegisterInfo.cpp.

References getMUBUFInstrOffset(), and llvm::MachineInstr::mayLoadOrStore().

Referenced by getCSRFirstUseCost().

opCanUseInlineConstant()

bool llvm::SIRegisterInfo::opCanUseInlineConstant ( unsigned  OpType ) const

inline

Returns

True if operands defined with this operand type can accept an inline constant. i.e. An integer value in the range (-16, 64) or -4.0f, -2.0f, -1.0f, -0.5f, 0.0f, 0.5f, 1.0f, 2.0f, 4.0f.

Definition at line 183 of file SIRegisterInfo.h.

References findUnusedRegister(), MRI, llvm::AMDGPU::OPERAND_SRC_FIRST, and llvm::AMDGPU::OPERAND_SRC_LAST.

Referenced by llvm::SIInstrInfo::isImmOperandLegal().

opCanUseLiteralConstant()

bool llvm::SIRegisterInfo::opCanUseLiteralConstant ( unsigned  OpType ) const

inline

Returns

True if operands defined with this operand type can accept a literal constant (i.e. any 32-bit immediate).

Definition at line 174 of file SIRegisterInfo.h.

References llvm::AMDGPU::OPERAND_REG_IMM_FIRST, and llvm::AMDGPU::OPERAND_REG_IMM_LAST.

Referenced by llvm::SIInstrInfo::isImmOperandLegal().

requiresFrameIndexReplacementScavenging()

bool SIRegisterInfo::requiresFrameIndexReplacementScavenging ( const MachineFunction &  MF ) const

override

Definition at line 253 of file SIRegisterInfo.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), and llvm::MachineFrameInfo::hasStackObjects().

Referenced by getCSRFirstUseCost().

requiresFrameIndexScavenging()

bool SIRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction &  MF ) const

override

Definition at line 242 of file SIRegisterInfo.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFrameInfo::hasStackObjects(), Info, and llvm::AMDGPUMachineFunction::isEntryFunction().

Referenced by getCSRFirstUseCost().

requiresRegisterScavenging()

bool SIRegisterInfo::requiresRegisterScavenging ( const MachineFunction &  Fn ) const

override

Definition at line 231 of file SIRegisterInfo.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFrameInfo::hasCalls(), llvm::MachineFrameInfo::hasStackObjects(), Info, and llvm::AMDGPUMachineFunction::isEntryFunction().

Referenced by getCSRFirstUseCost().

requiresVirtualBaseRegisters()

bool SIRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction &  Fn ) const

override

Definition at line 263 of file SIRegisterInfo.cpp.

Referenced by getCSRFirstUseCost().

reservedPrivateSegmentBufferReg()

unsigned SIRegisterInfo::reservedPrivateSegmentBufferReg

(

const MachineFunction &

MF

)

const

Return the end register initially reserved for the scratch buffer in case spilling is needed.

Definition at line 109 of file SIRegisterInfo.cpp.

References llvm::alignDown(), llvm::GCNSubtarget::getMaxNumSGPRs(), llvm::MachineFunction::getSubtarget(), and llvm::ARM_MB::ST.

Referenced by getAllSGPRs(), reservePrivateMemoryRegs(), and spillSGPRToSMEM().

reservedPrivateSegmentWaveByteOffsetReg()

unsigned SIRegisterInfo::reservedPrivateSegmentWaveByteOffsetReg

(

const MachineFunction &

MF

)

const

Return the end register initially reserved for the scratch wave offset in case spilling is needed.

Definition at line 135 of file SIRegisterInfo.cpp.

References findPrivateSegmentWaveByteOffsetRegIndex(), llvm::GCNSubtarget::getMaxNumSGPRs(), llvm::MachineFunction::getSubtarget(), and llvm::ARM_MB::ST.

Referenced by getAllSGPRs(), reservePrivateMemoryRegs(), and spillSGPRToSMEM().

reservedStackPtrOffsetReg()

unsigned SIRegisterInfo::reservedStackPtrOffsetReg

(

const MachineFunction &

MF

)

const

Definition at line 142 of file SIRegisterInfo.cpp.

Referenced by llvm::SITargetLowering::finalizeLowering(), and spillSGPRToSMEM().

resolveFrameIndex()

void SIRegisterInfo::resolveFrameIndex ( MachineInstr &  MI, unsigned  BaseReg, int64_t  Offset  ) const

override

Definition at line 338 of file SIRegisterInfo.cpp.

References assert(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineOperand::getImm(), llvm::MachineFunction::getInfo(), llvm::GCNSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isFI(), llvm_unreachable, llvm::MachineInstr::operands(), and TII.

Referenced by getCSRFirstUseCost().

restoreSGPR()

bool SIRegisterInfo::restoreSGPR	(	MachineBasicBlock::iterator	MI,
		int	FI,
		RegScavenger *	RS,
		bool	OnlyToVGPR = false
	)		const

Definition at line 821 of file SIRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::ArrayRef< T >::empty(), llvm::MDNode::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::SIMachineFunctionInfo::getFrameOffsetReg(), llvm::MachineFunction::getInfo(), llvm::GCNSubtarget::getInstrInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectOffset(), getPhysRegClass(), llvm::MachineFunction::getRegInfo(), getRegSplitParts(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getSGPRToVGPRSpills(), getSpillEltSize(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::RegState::ImplicitDefine, llvm::RegScavenger::isRegUsed(), isSGPRClass(), llvm::RegState::Kill, llvm::SIMachineFunctionInfo::SpilledReg::Lane, llvm::MinAlign(), llvm::MachineMemOperand::MOLoad, MRI, llvm::ArrayRef< T >::size(), spillSGPRToSMEM(), llvm::ARM_MB::ST, SubReg, TII, and llvm::SIMachineFunctionInfo::SpilledReg::VGPR.

Referenced by eliminateFrameIndex(), eliminateSGPRToVGPRSpillFrameIndex(), and getCSRFirstUseCost().

shouldCoalesce()

bool SIRegisterInfo::shouldCoalesce ( MachineInstr *  MI, const TargetRegisterClass *  SrcRC, unsigned  SubReg, const TargetRegisterClass *  DstRC, unsigned  DstSubReg, const TargetRegisterClass *  NewRC, LiveIntervals &  LIS  ) const

override

Definition at line 1515 of file SIRegisterInfo.cpp.

Referenced by isVGPRPressureSet().

shouldRewriteCopySrc()

bool SIRegisterInfo::shouldRewriteCopySrc ( const TargetRegisterClass *  DefRC, unsigned  DefSubReg, const TargetRegisterClass *  SrcRC, unsigned  SrcSubReg  ) const

override

Definition at line 1358 of file SIRegisterInfo.cpp.

Referenced by isSGPRReg().

spillSGPR()

bool SIRegisterInfo::spillSGPR	(	MachineBasicBlock::iterator	MI,
		int	FI,
		RegScavenger *	RS,
		bool	OnlyToVGPR = false
	)		const

If OnlyToVGPR is true, this will only succeed if this.

Definition at line 643 of file SIRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::SIMachineFunctionInfo::addToSpilledSGPRs(), llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::ArrayRef< T >::empty(), llvm::MachineFunction::front(), llvm::MDNode::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::SIMachineFunctionInfo::getFrameOffsetReg(), llvm::MachineFunction::getInfo(), llvm::GCNSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineBasicBlock::getParent(), getPhysRegClass(), llvm::MachineFunction::getRegInfo(), getRegSplitParts(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), llvm::SIMachineFunctionInfo::getSGPRToVGPRSpills(), getSpillEltSize(), llvm::SIMachineFunctionInfo::getStackPtrOffsetReg(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::RegState::Implicit, llvm::RegScavenger::isRegUsed(), isSGPRClass(), llvm::RegState::Kill, llvm::SIMachineFunctionInfo::SpilledReg::Lane, llvm::MinAlign(), llvm::MachineMemOperand::MOStore, MRI, llvm::ArrayRef< T >::size(), spillSGPRToSMEM(), llvm::ARM_MB::ST, SubReg, TII, llvm::RegState::Undef, and llvm::SIMachineFunctionInfo::SpilledReg::VGPR.

Referenced by eliminateFrameIndex(), eliminateSGPRToVGPRSpillFrameIndex(), and getCSRFirstUseCost().

spillSGPRToSMEM()

bool llvm::SIRegisterInfo::spillSGPRToSMEM ( ) const

inline

Definition at line 47 of file SIRegisterInfo.h.

References getCalleeSavedRegs(), getCalleeSavedRegsViaCopy(), getCallPreservedMask(), getReservedRegs(), reservedPrivateSegmentBufferReg(), reservedPrivateSegmentWaveByteOffsetReg(), and reservedStackPtrOffsetReg().

Referenced by restoreSGPR(), and spillSGPR().

spillSGPRToVGPR()

bool llvm::SIRegisterInfo::spillSGPRToVGPR ( ) const

inline

Definition at line 43 of file SIRegisterInfo.h.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

trackLivenessAfterRegAlloc()

bool SIRegisterInfo::trackLivenessAfterRegAlloc ( const MachineFunction &  MF ) const

override

Definition at line 269 of file SIRegisterInfo.cpp.

Referenced by getCSRFirstUseCost().

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The documentation for this class was generated from the following files:

• lib/Target/AMDGPU/SIRegisterInfo.h
• lib/Target/AMDGPU/AMDGPURegisterInfo.cpp
• lib/Target/AMDGPU/SIRegisterInfo.cpp