LLVM
8.0.1
- h -
handleADRP() :
AArch64CollectLOH.cpp
handleAttr() :
AMDGPUAnnotateKernelFeatures.cpp
handleBaseClass() :
TypeIndexDiscovery.cpp
handleBranchExpect() :
LowerExpectIntrinsic.cpp
handleBrSelExpect() :
LowerExpectIntrinsic.cpp
HandleByValArgument() :
InlineFunction.cpp
HandleByValArgumentInit() :
InlineFunction.cpp
HandleCallsInBlockInlinedThroughInvoke() :
InlineFunction.cpp
handleClobber() :
AArch64CollectLOH.cpp
handleDataMember() :
TypeIndexDiscovery.cpp
handleEndBlock() :
DeadStoreElimination.cpp
handleEnumerator() :
TypeIndexDiscovery.cpp
handleFieldList() :
TypeIndexDiscovery.cpp
handleFinalSuspend() :
CoroSplit.cpp
handleFree() :
DeadStoreElimination.cpp
handleIndirectSymViaGOTPCRel() :
AsmPrinter.cpp
HandleInlinedEHPad() :
InlineFunction.cpp
HandleInlinedLandingPad() :
InlineFunction.cpp
handleListContinuation() :
TypeIndexDiscovery.cpp
handleMemIntrinsicPtrUse() :
InferAddressSpaces.cpp
HandleMergeInputChains() :
SelectionDAGISel.cpp
handleMethodOverloadList() :
TypeIndexDiscovery.cpp
handleMiddleInst() :
AArch64CollectLOH.cpp
handleNestedType() :
TypeIndexDiscovery.cpp
handleNonPrevailingComdat() :
LTO.cpp
handleNormalInst() :
AArch64CollectLOH.cpp
handleNoSuspendCoroutine() :
CoroSplit.cpp
handleOneMethod() :
TypeIndexDiscovery.cpp
handleOverloadedMethod() :
TypeIndexDiscovery.cpp
handlePhiDef() :
LowerExpectIntrinsic.cpp
handlePointer() :
TypeIndexDiscovery.cpp
HandlePrefixedOrGroupedOption() :
CommandLine.cpp
handleRegMaskClobber() :
AArch64CollectLOH.cpp
handleStaticDataMember() :
TypeIndexDiscovery.cpp
handleSwitchExpect() :
LowerExpectIntrinsic.cpp
handleUse() :
AArch64CollectLOH.cpp
handleVFPtr() :
TypeIndexDiscovery.cpp
handleVirtualBaseClass() :
TypeIndexDiscovery.cpp
HandleVRSaveUpdate() :
PPCFrameLowering.cpp
handleYAMLDiag() :
MIRParser.cpp
hasAddressTakenAndUsed() :
JumpThreading.cpp
hasAnalyzableMemoryWrite() :
DeadStoreElimination.cpp
hasAnyNonFlatUseOfReg() :
AMDGPUAsmPrinter.cpp
HasAnyUnrollPragma() :
LoopUnrollAndJamPass.cpp
HasArgumentDef() :
WebAssemblyPrepareForLiveIntervals.cpp
hasAtLeastTwoBiasedBranches() :
ControlHeightReduction.cpp
hasBranchUse() :
InstCombineCompares.cpp
HasBranchWeights() :
SimplifyCFG.cpp
hasByteCountSuffix() :
Mangler.cpp
hasBZHI() :
X86ISelLowering.cpp
hasCallsBetween() :
CoroSplit.cpp
hasCallsInBlockBetween() :
CoroSplit.cpp
hasCallsInBlocksBetween() :
CoroSplit.cpp
hasChangeableCC() :
GlobalOpt.cpp
hasComputableBounds() :
LoopAccessAnalysis.cpp
hasConcreteDef() :
IndVarSimplify.cpp
hasConcreteDefImpl() :
IndVarSimplify.cpp
HasConditionalBranch() :
ARMMCCodeEmitter.cpp
hasConflictingReferenceFlags() :
Verifier.cpp
hasDataDependencyPred() :
SIMachineScheduler.cpp
hasDataSucc() :
ScheduleDAGInstrs.cpp
hasDebugInfo() :
DebugHandlerBase.cpp
hasDefinedInitializer() :
AMDGPUISelLowering.cpp
hasDependence() :
HexagonMachineScheduler.cpp
hasDuplicates() :
VPlanVerifier.cpp
hasExceptionPointerOrCodeUser() :
SelectionDAGISel.cpp
hasField() :
TypeBasedAliasAnalysis.cpp
hasFlag() :
SubtargetFeature.cpp
hasFPCMov() :
X86ISelLowering.cpp
hasGOTReference() :
SparcAsmParser.cpp
hash_value() :
RegisterBankInfo.h
HashEndOfMBB() :
BranchFolding.cpp
hashInstructionMapping() :
RegisterBankInfo.cpp
HashMachineInstr() :
BranchFolding.cpp
hashPartialMapping() :
RegisterBankInfo.cpp
hashValueMapping() :
RegisterBankInfo.cpp
hasIdenticalMMOs() :
MachineInstr.cpp
hasImplicitComdat() :
BitcodeReader.cpp
HasImplicitCPSRDef() :
Thumb2SizeReduction.cpp
hasInefficientLEABaseReg() :
X86FixupLEAs.cpp
hasIrregularType() :
LoopVectorize.cpp
hasLEAOffset() :
X86FixupLEAs.cpp
hasLifetimeMarkers() :
InlineFunction.cpp
hasMetadataOtherThanDebugLoc() :
ConstantMerge.cpp
hasMoreThanOneUseOtherThanLLVMUsed() :
GlobalOpt.cpp
HasNative() :
AMDGPULibCalls.cpp
HasNestArgument() :
X86FrameLowering.cpp
hasNoAliasAttr() :
MemoryBuiltins.cpp
hasNonFlagsUse() :
X86ISelLowering.cpp
hasNonRISpills() :
PPCFrameLowering.cpp
hasNormalLoadOperand() :
ARMISelLowering.cpp
hasObjCCategory() :
BitcodeReader.cpp
,
DwarfDebug.cpp
hasObjCCategoryInModule() :
BitcodeReader.cpp
hasOneExitNode() :
AMDGPUMachineCFGStructurizer.cpp
hasOneNonDBGUseInst() :
SIFoldOperands.cpp
HasOneUse() :
WebAssemblyRegStackify.cpp
hasOnlyColdCalls() :
GlobalOpt.cpp
hasOnlyLiveInOpers() :
ScheduleDAGRRList.cpp
hasOnlyLiveOutUses() :
ScheduleDAGRRList.cpp
hasOnlyOneNonZeroIndex() :
StraightLineStrengthReduce.cpp
hasOnlySelectUsers() :
SelectionDAGBuilder.cpp
hasOnlyUniformBranches() :
StructurizeCFG.cpp
hasPartialRegUpdate() :
X86InstrInfo.cpp
hasPositiveOperands() :
CorrelatedValuePropagation.cpp
hasPrefix() :
ELFAsmParser.cpp
hasPressureSet() :
SIRegisterInfo.cpp
hasProfileData() :
PartialInlining.cpp
hasRAWHazard() :
ARMHazardRecognizer.cpp
hasReadOnlyFlag() :
ModuleSummaryIndex.cpp
hasReadOnlyState() :
CFLAndersAliasAnalysis.cpp
hasRegisterDependency() :
MachineSink.cpp
hasReturn() :
HexagonFrameLowering.cpp
hasReturnsTwiceAttr() :
SparcISelLowering.cpp
HasRuntimeUnrollDisablePragma() :
LoopUnrollPass.cpp
HasSafePathToPredecessorCall() :
ObjCARCOpts.cpp
hasSameArgumentList() :
PPCISelLowering.cpp
hasSameBaseOpValue() :
X86AvoidStoreForwardingBlocks.cpp
hasSameExtUse() :
CodeGenPrepare.cpp
hasSameSuccessors() :
MachineBlockPlacement.cpp
HasSameValue() :
ScalarEvolution.cpp
HasSecRelSymbolRef() :
X86MCCodeEmitter.cpp
hasSelfReference() :
Metadata.cpp
hasShortDelaySlot() :
MipsAsmParser.cpp
hasSinCosPiStret() :
TargetLibraryInfo.cpp
hasSingleUsesFromRoot() :
X86ISelDAGToDAG.cpp
hasSingleValue() :
LazyValueInfo.cpp
hasSourceMods() :
AMDGPUISelLowering.cpp
hasSpills() :
PPCFrameLowering.cpp
hasStackGuardSlotTLS() :
X86ISelLowering.cpp
hasStoreUsersOnly() :
InstCombineCasts.cpp
hasTailCall() :
HexagonFrameLowering.cpp
hasTerminatorThatModifiesExec() :
SIFixSGPRCopies.cpp
hasThreadBackgroundPriority() :
CrashRecoveryContext.cpp
hasTiedDef() :
RegAllocGreedy.cpp
hasUndefContents() :
MemCpyOptimizer.cpp
hasUndefRegUpdate() :
X86InstrInfo.cpp
hasUnoccupiedSlot() :
MipsDelaySlotFiller.cpp
HasUnrollAndJamEnablePragma() :
LoopUnrollAndJamPass.cpp
HasUnrollEnablePragma() :
LoopUnrollPass.cpp
HasUnrollFullPragma() :
LoopUnrollPass.cpp
hasUnsafeFPMath() :
AMDGPUCodeGenPrepare.cpp
hasUseAfterLoop() :
MachinePipeliner.cpp
hasUseOtherThanLLVMUsed() :
GlobalOpt.cpp
hasUsesOutsideLoop() :
LoopRerollPass.cpp
hasUsesToReplace() :
GlobalOpt.cpp
hasUTF8ByteOrderMark() :
CommandLine.cpp
hasValidBitcodeHeader() :
BitcodeReader.cpp
hasValueBeenRAUWed() :
SLPVectorizer.cpp
hasVectorBeenPadded() :
DwarfUnit.cpp
hasVGPROperands() :
SIFixSGPRCopies.cpp
hasVolatileUser() :
AMDGPUISelLowering.cpp
hasVRegCycleUse() :
ScheduleDAGRRList.cpp
hasVulnerableLoad() :
X86SpeculativeLoadHardening.cpp
hasWildcard() :
GlobPattern.cpp
hasWriteOnlyState() :
CFLAndersAliasAnalysis.cpp
hasWriteToReadDep() :
HexagonVLIWPacketizer.cpp
hasYmmOrZmmReg() :
X86VZeroUpper.cpp
hasZeroSignBit() :
HexagonLoopIdiomRecognition.cpp
haveEfficientBuildVectorPattern() :
PPCISelLowering.cpp
haveSameOperands() :
InstCombineCalls.cpp
haveSameSpecialState() :
Instruction.cpp
Help() :
SubtargetFeature.cpp
HexagonGetArchVariant() :
HexagonMCTargetDesc.cpp
highHalf() :
APInt.cpp
hoist() :
LICM.cpp
hoistAndMergeSGPRInits() :
SIFixSGPRCopies.cpp
hoistInsEltConst() :
InstCombineVectorOps.cpp
hoistLoopToNewParent() :
SimpleLoopUnswitch.cpp
hoistScopeConditions() :
ControlHeightReduction.cpp
HoistThenElseCodeToIf() :
SimplifyCFG.cpp
hoistValue() :
ControlHeightReduction.cpp
Generated on Sun Dec 20 2020 14:15:10 for LLVM by
1.8.13