LLVM  8.0.1
Public Types | Public Member Functions | Static Public Member Functions | Protected Attributes | List of all members
llvm::GCNSubtarget Class Reference

#include "Target/AMDGPU/AMDGPUSubtarget.h"

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Public Types

enum  {
  ISAVersion0_0_0, ISAVersion6_0_0, ISAVersion6_0_1, ISAVersion7_0_0,
  ISAVersion7_0_1, ISAVersion7_0_2, ISAVersion7_0_3, ISAVersion7_0_4,
  ISAVersion8_0_1, ISAVersion8_0_2, ISAVersion8_0_3, ISAVersion8_1_0,
  ISAVersion9_0_0, ISAVersion9_0_2, ISAVersion9_0_4, ISAVersion9_0_6,
  ISAVersion9_0_9
}
 
enum  TrapHandlerAbi { TrapHandlerAbiNone = 0, TrapHandlerAbiHsa = 1 }
 
enum  TrapID {
  TrapIDHardwareReserved = 0, TrapIDHSADebugTrap = 1, TrapIDLLVMTrap = 2, TrapIDLLVMDebugTrap = 3,
  TrapIDDebugBreakpoint = 7, TrapIDDebugReserved8 = 8, TrapIDDebugReservedFE = 0xfe, TrapIDDebugReservedFF = 0xff
}
 
enum  TrapRegValues { LLVMTrapHandlerRegValue = 1 }
 
- Public Types inherited from llvm::AMDGPUSubtarget
enum  Generation {
  R600 = 0, R700 = 1, EVERGREEN = 2, NORTHERN_ISLANDS = 3,
  SOUTHERN_ISLANDS = 4, SEA_ISLANDS = 5, VOLCANIC_ISLANDS = 6, GFX9 = 7
}
 

Public Member Functions

 GCNSubtarget (const Triple &TT, StringRef GPU, StringRef FS, const GCNTargetMachine &TM)
 
 ~GCNSubtarget () override
 
GCNSubtarget & initializeSubtargetDependencies (const Triple &TT, StringRef GPU, StringRef FS)
 
const SIInstrInfo * getInstrInfo () const override
 
const SIFrameLowering * getFrameLowering () const override
 
const SITargetLowering * getTargetLowering () const override
 
const SIRegisterInfo * getRegisterInfo () const override
 
const CallLowering * getCallLowering () const override
 
const InstructionSelector * getInstructionSelector () const override
 
const LegalizerInfo * getLegalizerInfo () const override
 
const RegisterBankInfo * getRegBankInfo () const override
 
const SelectionDAGTargetInfo * getSelectionDAGInfo () const override
 
const InstrItineraryData * getInstrItineraryData () const override
 
void ParseSubtargetFeatures (StringRef CPU, StringRef FS)
 
Generation getGeneration () const
 
unsigned getWavefrontSizeLog2 () const
 
int getLDSBankCount () const
 
unsigned getMaxPrivateElementSize () const
 
bool hasIntClamp () const
 
bool hasFP64 () const
 
bool hasMIMG_R128 () const
 
bool hasHWFP64 () const
 
bool hasFastFMAF32 () const
 
bool hasHalfRate64Ops () const
 
bool hasAddr64 () const
 
bool hasBFE () const
 
bool hasBFI () const
 
bool hasBFM () const
 
bool hasBCNT (unsigned Size) const
 
bool hasFFBL () const
 
bool hasFFBH () const
 
bool hasMed3_16 () const
 
bool hasMin3Max3_16 () const
 
bool hasFmaMixInsts () const
 
bool hasCARRY () const
 
bool hasFMA () const
 
bool hasSwap () const
 
TrapHandlerAbi getTrapHandlerAbi () const
 
bool enableHugePrivateBuffer () const
 
bool unsafeDSOffsetFoldingEnabled () const
 
bool dumpCode () const
 
unsigned getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
 Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount. More...
 
bool hasFP16Denormals () const
 
bool hasFP64Denormals () const
 
bool supportsMinMaxDenormModes () const
 
bool enableDX10Clamp () const
 
bool enableIEEEBit (const MachineFunction &MF) const
 
bool useFlatForGlobal () const
 
bool useDS128 () const
 
bool privateMemoryResourceIsRangeChecked () const
 
bool usePRTStrictNull () const
 
bool hasAutoWaitcntBeforeBarrier () const
 
bool hasCodeObjectV3 () const
 
bool hasUnalignedBufferAccess () const
 
bool hasUnalignedScratchAccess () const
 
bool hasApertureRegs () const
 
bool isTrapHandlerEnabled () const
 
bool isXNACKEnabled () const
 
bool hasFlatAddressSpace () const
 
bool hasFlatInstOffsets () const
 
bool hasFlatGlobalInsts () const
 
bool hasFlatScratchInsts () const
 
bool hasFlatLgkmVMemCountInOrder () const
 
bool hasD16LoadStore () const
 
bool ldsRequiresM0Init () const
 Return if most LDS instructions have an m0 use that require m0 to be iniitalized. More...
 
bool hasAddNoCarry () const
 
bool hasUnpackedD16VMem () const
 
bool isMesaGfxShader (const Function &F) const
 
bool hasMad64_32 () const
 
bool hasSDWAOmod () const
 
bool hasSDWAScalar () const
 
bool hasSDWASdst () const
 
bool hasSDWAMac () const
 
bool hasSDWAOutModsVOPC () const
 
bool vmemWriteNeedsExpWaitcnt () const
 
bool hasDLInsts () const
 
bool hasDotInsts () const
 
bool isSRAMECCEnabled () const
 
unsigned getStackAlignment () const
 
bool enableMachineScheduler () const override
 
bool enableSubRegLiveness () const override
 
void setScalarizeGlobalBehavior (bool b)
 
bool getScalarizeGlobalBehavior () const
 
unsigned getEUsPerCU () const
 
unsigned getMaxWavesPerCU () const
 
unsigned getMaxWavesPerCU (unsigned FlatWorkGroupSize) const
 
unsigned getMaxWavesPerEU () const
 
unsigned getWavesPerWorkGroup (unsigned FlatWorkGroupSize) const
 
bool enableEarlyIfConversion () const override
 
void overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
 
unsigned getMaxNumUserSGPRs () const
 
bool hasSMemRealTime () const
 
bool hasMovrel () const
 
bool hasVGPRIndexMode () const
 
bool useVGPRIndexMode (bool UserEnable) const
 
bool hasScalarCompareEq64 () const
 
bool hasScalarStores () const
 
bool hasScalarAtomics () const
 
bool hasDPP () const
 
bool hasR128A16 () const
 
bool enableSIScheduler () const
 
bool debuggerSupported () const
 
bool debuggerInsertNops () const
 
bool debuggerEmitPrologue () const
 
bool loadStoreOptEnabled () const
 
bool hasSGPRInitBug () const
 
bool has12DWordStoreHazard () const
 
bool hasDwordx3LoadStores () const
 
bool hasSMovFedHazard () const
 
bool hasReadM0MovRelInterpHazard () const
 
bool hasReadM0SendMsgHazard () const
 
unsigned getOccupancyWithNumSGPRs (unsigned SGPRs) const
 Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs. More...
 
unsigned getOccupancyWithNumVGPRs (unsigned VGPRs) const
 Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs. More...
 
bool flatScratchIsPointer () const
 
bool hasMergedShaders () const
 
unsigned getSGPRAllocGranule () const
 
unsigned getSGPREncodingGranule () const
 
unsigned getTotalNumSGPRs () const
 
unsigned getAddressableNumSGPRs () const
 
unsigned getMinNumSGPRs (unsigned WavesPerEU) const
 
unsigned getMaxNumSGPRs (unsigned WavesPerEU, bool Addressable) const
 
unsigned getReservedNumSGPRs (const MachineFunction &MF) const
 
unsigned getMaxNumSGPRs (const MachineFunction &MF) const
 
unsigned getVGPRAllocGranule () const
 
unsigned getVGPREncodingGranule () const
 
unsigned getTotalNumVGPRs () const
 
unsigned getAddressableNumVGPRs () const
 
unsigned getMinNumVGPRs (unsigned WavesPerEU) const
 
unsigned getMaxNumVGPRs (unsigned WavesPerEU) const
 
unsigned getMaxNumVGPRs (const MachineFunction &MF) const
 
void getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
 
unsigned getMaxWorkGroupsPerCU (unsigned FlatWorkGroupSize) const override
 
unsigned getMinFlatWorkGroupSize () const override
 
unsigned getMaxFlatWorkGroupSize () const override
 
unsigned getMaxWavesPerEU (unsigned FlatWorkGroupSize) const override
 
unsigned getMinWavesPerEU () const override
 
- Public Member Functions inherited from llvm::AMDGPUSubtarget
 AMDGPUSubtarget (const Triple &TT)
 
std::pair< unsigned, unsigned > getDefaultFlatWorkGroupSize (CallingConv::ID CC) const
 
std::pair< unsigned, unsigned > getFlatWorkGroupSizes (const Function &F) const
 
std::pair< unsigned, unsigned > getWavesPerEU (const Function &F) const
 
unsigned getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
 Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount. More...
 
unsigned getOccupancyWithLocalMemSize (uint32_t Bytes, const Function &) const
 Inverse of getMaxLocalMemWithWaveCount. More...
 
unsigned getOccupancyWithLocalMemSize (const MachineFunction &MF) const
 
bool isAmdHsaOS () const
 
bool isAmdPalOS () const
 
bool isMesa3DOS () const
 
bool isMesaKernel (const Function &F) const
 
bool isAmdHsaOrMesa (const Function &F) const
 
bool has16BitInsts () const
 
bool hasMadMixInsts () const
 
bool hasFP32Denormals () const
 
bool hasFPExceptions () const
 
bool hasSDWA () const
 
bool hasVOP3PInsts () const
 
bool hasMulI24 () const
 
bool hasMulU24 () const
 
bool hasInv2PiInlineImm () const
 
bool hasFminFmaxLegacy () const
 
bool hasTrigReducedRange () const
 
bool isPromoteAllocaEnabled () const
 
unsigned getWavefrontSize () const
 
int getLocalMemorySize () const
 
unsigned getAlignmentForImplicitArgPtr () const
 
unsigned getExplicitKernelArgOffset (const Function &F) const
 Returns the offset in bytes from the start of the input buffer of the first explicit kernel argument. More...
 
unsigned getMaxWavesPerEU () const
 
bool makeLIDRangeMetadata (Instruction *I) const
 Creates value range metadata on an workitemid.* inrinsic call or load. More...
 
unsigned getImplicitArgNumBytes (const Function &F) const
 
uint64_t getExplicitKernArgSize (const Function &F, unsigned &MaxAlign) const
 
unsigned getKernArgSegmentSize (const Function &F, unsigned &MaxAlign) const
 
virtual ~AMDGPUSubtarget ()
 

Static Public Member Functions

static bool hasHalfRate64Ops (const TargetSubtargetInfo &STI)
 
- Static Public Member Functions inherited from llvm::AMDGPUSubtarget
static const AMDGPUSubtarget & get (const MachineFunction &MF)
 
static const AMDGPUSubtarget & get (const TargetMachine &TM, const Function &F)
 

Protected Attributes

Triple TargetTriple
 
unsigned Gen
 
unsigned IsaVersion
 
InstrItineraryData InstrItins
 
int LDSBankCount
 
unsigned MaxPrivateElementSize
 
bool FastFMAF32
 
bool HalfRate64Ops
 
bool FP64FP16Denormals
 
bool DX10Clamp
 
bool FlatForGlobal
 
bool AutoWaitcntBeforeBarrier
 
bool CodeObjectV3
 
bool UnalignedScratchAccess
 
bool UnalignedBufferAccess
 
bool HasApertureRegs
 
bool EnableXNACK
 
bool TrapHandler
 
bool DebuggerInsertNops
 
bool DebuggerEmitPrologue
 
bool EnableHugePrivateBuffer
 
bool EnableLoadStoreOpt
 
bool EnableUnsafeDSOffsetFolding
 
bool EnableSIScheduler
 
bool EnableDS128
 
bool EnablePRTStrictNull
 
bool DumpCode
 
bool FP64
 
bool FMA
 
bool MIMG_R128
 
bool IsGCN
 
bool GCN3Encoding
 
bool CIInsts
 
bool VIInsts
 
bool GFX9Insts
 
bool SGPRInitBug
 
bool HasSMemRealTime
 
bool HasIntClamp
 
bool HasFmaMixInsts
 
bool HasMovrel
 
bool HasVGPRIndexMode
 
bool HasScalarStores
 
bool HasScalarAtomics
 
bool HasSDWAOmod
 
bool HasSDWAScalar
 
bool HasSDWASdst
 
bool HasSDWAMac
 
bool HasSDWAOutModsVOPC
 
bool HasDPP
 
bool HasR128A16
 
bool HasDLInsts
 
bool HasDotInsts
 
bool EnableSRAMECC
 
bool FlatAddressSpace
 
bool FlatInstOffsets
 
bool FlatGlobalInsts
 
bool FlatScratchInsts
 
bool AddNoCarryInsts
 
bool HasUnpackedD16VMem
 
bool R600ALUInst
 
bool CaymanISA
 
bool CFALUBug
 
bool HasVertexCache
 
short TexVTXClauseSize
 
bool ScalarizeGlobal
 
bool FeatureDisable
 
SelectionDAGTargetInfo TSInfo
 
- Protected Attributes inherited from llvm::AMDGPUSubtarget
bool Has16BitInsts
 
bool HasMadMixInsts
 
bool FP32Denormals
 
bool FPExceptions
 
bool HasSDWA
 
bool HasVOP3PInsts
 
bool HasMulI24
 
bool HasMulU24
 
bool HasInv2PiInlineImm
 
bool HasFminFmaxLegacy
 
bool EnablePromoteAlloca
 
bool HasTrigReducedRange
 
int LocalMemorySize
 
unsigned WavefrontSize
 

Detailed Description

Definition at line 246 of file AMDGPUSubtarget.h.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
Enumerator
ISAVersion0_0_0 
ISAVersion6_0_0 
ISAVersion6_0_1 
ISAVersion7_0_0 
ISAVersion7_0_1 
ISAVersion7_0_2 
ISAVersion7_0_3 
ISAVersion7_0_4 
ISAVersion8_0_1 
ISAVersion8_0_2 
ISAVersion8_0_3 
ISAVersion8_1_0 
ISAVersion9_0_0 
ISAVersion9_0_2 
ISAVersion9_0_4 
ISAVersion9_0_6 
ISAVersion9_0_9 

Definition at line 249 of file AMDGPUSubtarget.h.

◆ TrapHandlerAbi

enum llvm::GCNSubtarget::TrapHandlerAbi
Enumerator
TrapHandlerAbiNone 
TrapHandlerAbiHsa 

Definition at line 269 of file AMDGPUSubtarget.h.

◆ TrapID

enum llvm::GCNSubtarget::TrapID
Enumerator
TrapIDHardwareReserved 
TrapIDHSADebugTrap 
TrapIDLLVMTrap 
TrapIDLLVMDebugTrap 
TrapIDDebugBreakpoint 
TrapIDDebugReserved8 
TrapIDDebugReservedFE 
TrapIDDebugReservedFF 

Definition at line 274 of file AMDGPUSubtarget.h.

◆ TrapRegValues

enum llvm::GCNSubtarget::TrapRegValues
Enumerator
LLVMTrapHandlerRegValue 

Definition at line 285 of file AMDGPUSubtarget.h.

Constructor & Destructor Documentation

◆ GCNSubtarget()

GCNSubtarget::GCNSubtarget ( const Triple &  TT,
StringRef  GPU,
StringRef  FS,
const GCNTargetMachine &  TM 
)

Definition at line 150 of file AMDGPUSubtarget.cpp.

References getRegisterInfo(), and getTargetLowering().

◆ ~GCNSubtarget()

GCNSubtarget::~GCNSubtarget ( )
overridedefault

Member Function Documentation

◆ debuggerEmitPrologue()

bool llvm::GCNSubtarget::debuggerEmitPrologue ( ) const
inline

Definition at line 816 of file AMDGPUSubtarget.h.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue(), hasAnyNonFlatUseOfReg(), llvm::AMDGPUAsmPrinter::runOnMachineFunction(), and llvm::SIMachineFunctionInfo::SIMachineFunctionInfo().

◆ debuggerInsertNops()

bool llvm::GCNSubtarget::debuggerInsertNops ( ) const
inline

Definition at line 812 of file AMDGPUSubtarget.h.

Referenced by llvm::createSIDebuggerInsertNopsPass().

◆ debuggerSupported()

bool llvm::GCNSubtarget::debuggerSupported ( ) const
inline

Definition at line 808 of file AMDGPUSubtarget.h.

◆ dumpCode()

bool llvm::GCNSubtarget::dumpCode ( ) const
inline

Definition at line 536 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::getMaxLocalMemSizeWithWaveCount().

Referenced by llvm::AMDGPUAsmPrinter::EmitBasicBlockStart(), llvm::AMDGPUAsmPrinter::EmitFunctionEntryLabel(), and llvm::AMDGPUAsmPrinter::runOnMachineFunction().

◆ enableDX10Clamp()

bool llvm::GCNSubtarget::enableDX10Clamp ( ) const
inline

Definition at line 557 of file AMDGPUSubtarget.h.

Referenced by getMad64_32(), getSplatConstantFP(), hasAnyNonFlatUseOfReg(), isClampZeroToOne(), and llvm::SITargetLowering::isKnownNeverNaNForTargetNode().

◆ enableEarlyIfConversion()

bool llvm::GCNSubtarget::enableEarlyIfConversion ( ) const
inlineoverride

Definition at line 756 of file AMDGPUSubtarget.h.

◆ enableHugePrivateBuffer()

bool llvm::GCNSubtarget::enableHugePrivateBuffer ( ) const
inline

Definition at line 528 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::LowerFormalArguments().

◆ enableIEEEBit()

bool llvm::GCNSubtarget::enableIEEEBit ( const MachineFunction &  MF) const
inline

Definition at line 561 of file AMDGPUSubtarget.h.

References llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), and llvm::AMDGPU::isCompute().

Referenced by findUser(), and hasAnyNonFlatUseOfReg().

◆ enableMachineScheduler()

bool llvm::GCNSubtarget::enableMachineScheduler ( ) const
inlineoverride

Definition at line 711 of file AMDGPUSubtarget.h.

◆ enableSIScheduler()

bool llvm::GCNSubtarget::enableSIScheduler ( ) const
inline

Definition at line 804 of file AMDGPUSubtarget.h.

Referenced by llvm::R600TargetMachine::createPassConfig().

◆ enableSubRegLiveness()

bool llvm::GCNSubtarget::enableSubRegLiveness ( ) const
inlineoverride

Definition at line 715 of file AMDGPUSubtarget.h.

◆ flatScratchIsPointer()

bool llvm::GCNSubtarget::flatScratchIsPointer ( ) const
inline
Returns
true if the flat_scratch register should be initialized with the pointer to the wave's scratch memory rather than a size and offset.

Definition at line 859 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

Referenced by getAllSGPRs().

◆ getAddressableNumSGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumSGPRs ( ) const
inline
Returns
Addressable number of SGPRs supported by the subtarget.

Definition at line 885 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs().

Referenced by hasAnyNonFlatUseOfReg().

◆ getAddressableNumVGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumVGPRs ( ) const
inline
Returns
Addressable number of VGPRs supported by the subtarget.

Definition at line 930 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs().

◆ getCallLowering()

const CallLowering* llvm::GCNSubtarget::getCallLowering ( ) const
inlineoverride

Definition at line 405 of file AMDGPUSubtarget.h.

◆ getEUsPerCU()

unsigned llvm::GCNSubtarget::getEUsPerCU ( ) const
inline
Returns
Number of execution units per compute unit supported by the subtarget.

Definition at line 724 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getEUsPerCU().

◆ getFrameLowering()

const SIFrameLowering* llvm::GCNSubtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 393 of file AMDGPUSubtarget.h.

◆ getGeneration()

Generation llvm::GCNSubtarget::getGeneration ( ) const
inline

Definition at line 432 of file AMDGPUSubtarget.h.

Referenced by addRegsToSet(), llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), getFPTernOp(), getLoadExtOrTrunc(), llvm::SITargetLowering::getRegisterByName(), getSmrdOpcode(), hasAnyNonFlatUseOfReg(), llvm::SITargetLowering::isLegalAddressingMode(), llvm::SITargetLowering::LowerFormalArguments(), parseTexFail(), llvm::SIMachineFunctionInfo::SIMachineFunctionInfo(), llvm::SITargetLowering::SITargetLowering(), llvm::AMDGPU::splitMUBUFOffset(), and subtargetEncodingFamily().

◆ getInstrInfo()

const SIInstrInfo* llvm::GCNSubtarget::getInstrInfo ( ) const
inlineoverride

Definition at line 389 of file AMDGPUSubtarget.h.

Referenced by addRegsToSet(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), bitOpWithConstantIsReducible(), buildMUBUFOffsetLoadStore(), canMoveInstsAcrossMemOp(), checkRegOnlyPHIInputs(), llvm::createSIAddIMGInitPass(), llvm::createSIDebuggerInsertNopsPass(), llvm::createSIModeRegisterPass(), llvm::createSIWholeQuadModePass(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::SIFrameLowering::emitEpilogue(), emitIndirectDst(), emitIndirectSrc(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::SIFrameLowering::emitPrologue(), findSingleRegDef(), fixupGlobalSaddr(), getAllSGPRs(), getPermuteMask(), getSplatConstantFP(), llvm::SITargetLowering::getTgtMemIntrinsic(), hasAnyNonFlatUseOfReg(), hoistAndMergeSGPRInits(), llvm::SITargetLowering::insertCopiesSplitCSR(), insertUndefLaneMask(), isLiveOut(), llvm::SITargetLowering::isSDNodeSourceOfDivergence(), matchSwap(), llvm::SIRegisterInfo::materializeFrameBaseRegister(), optimizeVcndVcmpPair(), llvm::SITargetLowering::PostISelFolding(), llvm::SIFrameLowering::processFunctionBeforeFrameFinalized(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::SIRegisterInfo::restoreSGPR(), llvm::AMDGPUAsmPrinter::runOnMachineFunction(), llvm::SIRegisterInfo::spillSGPR(), llvm::SITargetLowering::splitKillBlock(), and llvm::SITargetLowering::wrapAddr64Rsrc().

◆ getInstrItineraryData()

const InstrItineraryData* llvm::GCNSubtarget::getInstrItineraryData ( ) const
inlineoverride

Definition at line 426 of file AMDGPUSubtarget.h.

◆ getInstructionSelector()

const InstructionSelector* llvm::GCNSubtarget::getInstructionSelector ( ) const
inlineoverride

Definition at line 409 of file AMDGPUSubtarget.h.

◆ getLDSBankCount()

int llvm::GCNSubtarget::getLDSBankCount ( ) const
inline

Definition at line 440 of file AMDGPUSubtarget.h.

◆ getLegalizerInfo()

const LegalizerInfo* llvm::GCNSubtarget::getLegalizerInfo ( ) const
inlineoverride

Definition at line 413 of file AMDGPUSubtarget.h.

◆ getMaxFlatWorkGroupSize()

unsigned llvm::GCNSubtarget::getMaxFlatWorkGroupSize ( ) const
inlineoverridevirtual
Returns
Maximum flat work group size supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 972 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxFlatWorkGroupSize().

Referenced by llvm::AMDGPUSubtarget::getFlatWorkGroupSizes().

◆ getMaxLocalMemSizeWithWaveCount()

unsigned llvm::GCNSubtarget::getMaxLocalMemSizeWithWaveCount ( unsigned  WaveCount,
const Function &   
) const

Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount.

◆ getMaxNumSGPRs() [1/2]

unsigned llvm::GCNSubtarget::getMaxNumSGPRs ( unsigned  WavesPerEU,
bool  Addressable 
) const
inline
Returns
Maximum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 897 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumSGPRs().

Referenced by getAllSGPR128(), getAllSGPRs(), llvm::SIRegisterInfo::getRegPressureLimit(), llvm::SIRegisterInfo::getReservedRegs(), llvm::GCNMaxOccupancySchedStrategy::initialize(), llvm::SIRegisterInfo::reservedPrivateSegmentBufferReg(), and llvm::SIRegisterInfo::reservedPrivateSegmentWaveByteOffsetReg().

◆ getMaxNumSGPRs() [2/2]

unsigned GCNSubtarget::getMaxNumSGPRs ( const MachineFunction &  MF) const
Returns
Maximum number of SGPRs that meets number of waves per execution unit requirement for function MF, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function MF.
Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 548 of file AMDGPUSubtarget.cpp.

References F(), llvm::AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::AMDGPU::getIntegerAttribute(), llvm::AMDGPU::IsaInfo::getMaxNumSGPRs(), llvm::AMDGPU::IsaInfo::getMinNumSGPRs(), llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs(), llvm::SIMachineFunctionInfo::getWavesPerEU(), and llvm::Function::hasFnAttribute().

◆ getMaxNumUserSGPRs()

unsigned llvm::GCNSubtarget::getMaxNumUserSGPRs ( ) const
inline

Definition at line 763 of file AMDGPUSubtarget.h.

Referenced by hasAnyNonFlatUseOfReg().

◆ getMaxNumVGPRs() [1/2]

unsigned llvm::GCNSubtarget::getMaxNumVGPRs ( unsigned  WavesPerEU) const
inline
Returns
Maximum number of VGPRs that meets given number of waves per execution unit requirement supported by the subtarget.

Definition at line 942 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumVGPRs().

Referenced by llvm::SIRegisterInfo::getRegPressureLimit(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::GCNMaxOccupancySchedStrategy::initialize().

◆ getMaxNumVGPRs() [2/2]

unsigned GCNSubtarget::getMaxNumVGPRs ( const MachineFunction &  MF) const
Returns
Maximum number of VGPRs that meets number of waves per execution unit requirement for function MF, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function MF.
Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 598 of file AMDGPUSubtarget.cpp.

References llvm::SUnit::addPred(), llvm::SUnit::addPredBarrier(), llvm::cl::apply(), llvm::SDep::Artificial, llvm::ScheduleDAG::ExitSU, F(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::SUnit::getInstr(), llvm::AMDGPU::getIntegerAttribute(), llvm::AMDGPU::IsaInfo::getMaxNumVGPRs(), llvm::AMDGPU::IsaInfo::getMinNumVGPRs(), llvm::SDep::getSUnit(), llvm::SIMachineFunctionInfo::getWavesPerEU(), llvm::Function::hasFnAttribute(), llvm::SIInstrInfo::isDS(), llvm::SIInstrInfo::isFLAT(), llvm::SIInstrInfo::isSMRD(), llvm::SIInstrInfo::isVMEM(), llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), llvm::SUnit::Preds, SI, llvm::SUnit::Succs, llvm::ScheduleDAG::SUnits, and TII.

◆ getMaxPrivateElementSize()

unsigned llvm::GCNSubtarget::getMaxPrivateElementSize ( ) const
inline

Definition at line 444 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::canMergeStoresTo(), getFPTernOp(), and getLoadExtOrTrunc().

◆ getMaxWavesPerCU() [1/2]

unsigned llvm::GCNSubtarget::getMaxWavesPerCU ( ) const
inline
Returns
Maximum number of waves per compute unit supported by the subtarget without any kind of limitation.

Definition at line 730 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxWavesPerCU().

◆ getMaxWavesPerCU() [2/2]

unsigned llvm::GCNSubtarget::getMaxWavesPerCU ( unsigned  FlatWorkGroupSize) const
inline
Returns
Maximum number of waves per compute unit supported by the subtarget and limited by given FlatWorkGroupSize.

Definition at line 736 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxWavesPerCU().

◆ getMaxWavesPerEU() [1/2]

unsigned llvm::GCNSubtarget::getMaxWavesPerEU ( ) const
inline
Returns
Maximum number of waves per execution unit supported by the subtarget without any kind of limitation.

Definition at line 742 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxWavesPerEU().

Referenced by llvm::AMDGPUSubtarget::getMaxLocalMemSizeWithWaveCount(), llvm::AMDGPUSubtarget::getOccupancyWithLocalMemSize(), and llvm::AMDGPUSubtarget::getWavesPerEU().

◆ getMaxWavesPerEU() [2/2]

unsigned llvm::GCNSubtarget::getMaxWavesPerEU ( unsigned  FlatWorkGroupSize) const
inlineoverridevirtual
Returns
Maximum number of waves per execution unit supported by the subtarget and limited by given FlatWorkGroupSize.

Implements llvm::AMDGPUSubtarget.

Definition at line 978 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxWavesPerEU().

◆ getMaxWorkGroupsPerCU()

unsigned llvm::GCNSubtarget::getMaxWorkGroupsPerCU ( unsigned  FlatWorkGroupSize) const
inlineoverridevirtual
Returns
Maximum number of work groups per compute unit supported by the subtarget and limited by given FlatWorkGroupSize.

Implements llvm::AMDGPUSubtarget.

Definition at line 962 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU().

Referenced by llvm::AMDGPUSubtarget::getMaxLocalMemSizeWithWaveCount(), and llvm::AMDGPUSubtarget::getOccupancyWithLocalMemSize().

◆ getMinFlatWorkGroupSize()

unsigned llvm::GCNSubtarget::getMinFlatWorkGroupSize ( ) const
inlineoverridevirtual
Returns
Minimum flat work group size supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 967 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize().

Referenced by llvm::AMDGPUSubtarget::getFlatWorkGroupSizes().

◆ getMinNumSGPRs()

unsigned llvm::GCNSubtarget::getMinNumSGPRs ( unsigned  WavesPerEU) const
inline
Returns
Minimum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 891 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumSGPRs().

Referenced by hasAnyNonFlatUseOfReg().

◆ getMinNumVGPRs()

unsigned llvm::GCNSubtarget::getMinNumVGPRs ( unsigned  WavesPerEU) const
inline
Returns
Minimum number of VGPRs that meets given number of waves per execution unit requirement supported by the subtarget.

Definition at line 936 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumVGPRs().

Referenced by hasAnyNonFlatUseOfReg().

◆ getMinWavesPerEU()

unsigned llvm::GCNSubtarget::getMinWavesPerEU ( ) const
inlineoverridevirtual
Returns
Minimum number of waves per execution unit supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 984 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinWavesPerEU().

Referenced by llvm::AMDGPUSubtarget::getWavesPerEU().

◆ getOccupancyWithNumSGPRs()

unsigned GCNSubtarget::getOccupancyWithNumSGPRs ( unsigned  SGPRs) const

Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs.

Definition at line 489 of file AMDGPUSubtarget.cpp.

References llvm::R600Subtarget::getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::GCNRegPressure::getOccupancy(), llvm::GCNRegPressure::less(), and llvm::GCNRegPressure::print().

◆ getOccupancyWithNumVGPRs()

unsigned GCNSubtarget::getOccupancyWithNumVGPRs ( unsigned  VGPRs) const

Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs.

Definition at line 512 of file AMDGPUSubtarget.cpp.

Referenced by llvm::GCNRegPressure::getOccupancy(), llvm::GCNRegPressure::less(), and llvm::GCNRegPressure::print().

◆ getPostRAMutations()

void GCNSubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation >> &  Mutations) const
override

Definition at line 679 of file AMDGPUSubtarget.cpp.

◆ getRegBankInfo()

const RegisterBankInfo* llvm::GCNSubtarget::getRegBankInfo ( ) const
inlineoverride

Definition at line 417 of file AMDGPUSubtarget.h.

◆ getRegisterInfo()

const SIRegisterInfo* llvm::GCNSubtarget::getRegisterInfo ( ) const
inlineoverride

Definition at line 401 of file AMDGPUSubtarget.h.

References llvm::SIInstrInfo::getRegisterInfo().

Referenced by addRegsToSet(), llvm::SIMachineFunctionInfo::allocateSGPRSpillToVGPR(), checkRegOnlyPHIInputs(), llvm::createSIAddIMGInitPass(), llvm::createSIFixWWMLivenessPass(), llvm::createSIWholeQuadModePass(), llvm::SITargetLowering::finalizeLowering(), findScratchNonCalleeSaveRegister(), findSingleRegDef(), fixupGlobalSaddr(), GCNSubtarget(), getOModValue(), llvm::SITargetLowering::getRegisterByName(), hoistAndMergeSGPRInits(), llvm::SITargetLowering::insertCopiesSplitCSR(), llvm::SITargetLowering::isEligibleForTailCallOptimization(), isLiveOut(), llvm::SITargetLowering::LowerCall(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerReturn(), optimizeVcndVcmpPair(), llvm::SITargetLowering::passSpecialInputs(), readsVCCZ(), llvm::GCNHazardRecognizer::RecedeCycle(), and llvm::SITargetLowering::SITargetLowering().

◆ getReservedNumSGPRs()

unsigned GCNSubtarget::getReservedNumSGPRs ( const MachineFunction &  MF) const
Returns
Reserved number of SGPRs for given function MF.

Definition at line 534 of file AMDGPUSubtarget.cpp.

References llvm::R600Subtarget::getGeneration(), llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::hasFlatScratchInit(), llvm::AMDGPUSubtarget::SEA_ISLANDS, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ getScalarizeGlobalBehavior()

bool llvm::GCNSubtarget::getScalarizeGlobalBehavior ( ) const
inline

Definition at line 720 of file AMDGPUSubtarget.h.

References ScalarizeGlobal.

Referenced by getLoadExtOrTrunc().

◆ getSelectionDAGInfo()

const SelectionDAGTargetInfo* llvm::GCNSubtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 422 of file AMDGPUSubtarget.h.

◆ getSGPRAllocGranule()

unsigned llvm::GCNSubtarget::getSGPRAllocGranule ( ) const
inline
Returns
SGPR allocation granularity supported by the subtarget.

Definition at line 870 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPRAllocGranule().

◆ getSGPREncodingGranule()

unsigned llvm::GCNSubtarget::getSGPREncodingGranule ( ) const
inline
Returns
SGPR encoding granularity supported by the subtarget.

Definition at line 875 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPREncodingGranule().

◆ getStackAlignment()

unsigned llvm::GCNSubtarget::getStackAlignment ( ) const
inline

Definition at line 707 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::LowerCall().

◆ getTargetLowering()

const SITargetLowering* llvm::GCNSubtarget::getTargetLowering ( ) const
inlineoverride

Definition at line 397 of file AMDGPUSubtarget.h.

Referenced by canMoveInstsAcrossMemOp(), and GCNSubtarget().

◆ getTotalNumSGPRs()

unsigned llvm::GCNSubtarget::getTotalNumSGPRs ( ) const
inline
Returns
Total number of SGPRs supported by the subtarget.

Definition at line 880 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumSGPRs().

◆ getTotalNumVGPRs()

unsigned llvm::GCNSubtarget::getTotalNumVGPRs ( ) const
inline
Returns
Total number of VGPRs supported by the subtarget.

Definition at line 925 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumVGPRs().

◆ getTrapHandlerAbi()

TrapHandlerAbi llvm::GCNSubtarget::getTrapHandlerAbi ( ) const
inline

Definition at line 524 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::isAmdHsaOS().

Referenced by findUser().

◆ getVGPRAllocGranule()

unsigned llvm::GCNSubtarget::getVGPRAllocGranule ( ) const
inline
Returns
VGPR allocation granularity supported by the subtarget.

Definition at line 915 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPRAllocGranule().

◆ getVGPREncodingGranule()

unsigned llvm::GCNSubtarget::getVGPREncodingGranule ( ) const
inline
Returns
VGPR encoding granularity supported by the subtarget.

Definition at line 920 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPREncodingGranule().

◆ getWavefrontSizeLog2()

unsigned llvm::GCNSubtarget::getWavefrontSizeLog2 ( ) const
inline

Definition at line 436 of file AMDGPUSubtarget.h.

References llvm::Log2_32(), and llvm::AMDGPUSubtarget::WavefrontSize.

Referenced by llvm::AMDGPUTargetLowering::computeKnownBitsForTargetNode().

◆ getWavesPerWorkGroup()

unsigned llvm::GCNSubtarget::getWavesPerWorkGroup ( unsigned  FlatWorkGroupSize) const
inline
Returns
Number of waves per work group supported by the subtarget and limited by given FlatWorkGroupSize.

Definition at line 748 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getWavesPerWorkGroup().

◆ has12DWordStoreHazard()

bool llvm::GCNSubtarget::has12DWordStoreHazard ( ) const
inline

Definition at line 828 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by addRegsToSet().

◆ hasAddNoCarry()

bool llvm::GCNSubtarget::hasAddNoCarry ( ) const
inline

Definition at line 646 of file AMDGPUSubtarget.h.

◆ hasAddr64()

bool llvm::GCNSubtarget::hasAddr64 ( ) const
inline

Definition at line 472 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ hasApertureRegs()

bool llvm::GCNSubtarget::hasApertureRegs ( ) const
inline

Definition at line 604 of file AMDGPUSubtarget.h.

Referenced by copyFeaturesToFunction(), and findUser().

◆ hasAutoWaitcntBeforeBarrier()

bool llvm::GCNSubtarget::hasAutoWaitcntBeforeBarrier ( ) const
inline

Definition at line 587 of file AMDGPUSubtarget.h.

◆ hasBCNT()

bool llvm::GCNSubtarget::hasBCNT ( unsigned  Size) const
inline

Definition at line 488 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFE()

bool llvm::GCNSubtarget::hasBFE ( ) const
inline

Definition at line 476 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFI()

bool llvm::GCNSubtarget::hasBFI ( ) const
inline

Definition at line 480 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFM()

bool llvm::GCNSubtarget::hasBFM ( ) const
inline

Definition at line 484 of file AMDGPUSubtarget.h.

◆ hasCARRY()

bool llvm::GCNSubtarget::hasCARRY ( ) const
inline

Definition at line 512 of file AMDGPUSubtarget.h.

◆ hasCodeObjectV3()

bool llvm::GCNSubtarget::hasCodeObjectV3 ( ) const
inline

Definition at line 591 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::isAmdHsaOS().

Referenced by llvm::AMDGPUAsmPrinter::EmitFunctionBodyStart().

◆ hasD16LoadStore()

bool llvm::GCNSubtarget::hasD16LoadStore ( ) const
inline

Definition at line 636 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

◆ hasDLInsts()

bool llvm::GCNSubtarget::hasDLInsts ( ) const
inline

Definition at line 687 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd().

◆ hasDotInsts()

bool llvm::GCNSubtarget::hasDotInsts ( ) const
inline

Definition at line 691 of file AMDGPUSubtarget.h.

Referenced by getMad64_32().

◆ hasDPP()

bool llvm::GCNSubtarget::hasDPP ( ) const
inline

Definition at line 796 of file AMDGPUSubtarget.h.

◆ hasDwordx3LoadStores()

bool llvm::GCNSubtarget::hasDwordx3LoadStores ( ) const
inline

Definition at line 833 of file AMDGPUSubtarget.h.

Referenced by canMoveInstsAcrossMemOp().

◆ hasFastFMAF32()

bool llvm::GCNSubtarget::hasFastFMAF32 ( ) const
inline

Definition at line 464 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd().

◆ hasFFBH()

bool llvm::GCNSubtarget::hasFFBH ( ) const
inline

Definition at line 496 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasFFBL()

bool llvm::GCNSubtarget::hasFFBL ( ) const
inline

Definition at line 492 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasFlatAddressSpace()

bool llvm::GCNSubtarget::hasFlatAddressSpace ( ) const
inline

Definition at line 616 of file AMDGPUSubtarget.h.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), copyFeaturesToFunction(), llvm::GCNTTIImpl::getFlatAddressSpace(), llvm::SIMachineFunctionInfo::SIMachineFunctionInfo(), and llvm::SITargetLowering::SITargetLowering().

◆ hasFlatGlobalInsts()

bool llvm::GCNSubtarget::hasFlatGlobalInsts ( ) const
inline

Definition at line 624 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ hasFlatInstOffsets()

bool llvm::GCNSubtarget::hasFlatInstOffsets ( ) const
inline

Definition at line 620 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::getAddrModeArguments().

◆ hasFlatLgkmVMemCountInOrder()

bool llvm::GCNSubtarget::hasFlatLgkmVMemCountInOrder ( ) const
inline

Definition at line 632 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

◆ hasFlatScratchInsts()

bool llvm::GCNSubtarget::hasFlatScratchInsts ( ) const
inline

Definition at line 628 of file AMDGPUSubtarget.h.

◆ hasFMA()

bool llvm::GCNSubtarget::hasFMA ( ) const
inline

Definition at line 516 of file AMDGPUSubtarget.h.

References llvm::ISD::FMA.

◆ hasFmaMixInsts()

bool llvm::GCNSubtarget::hasFmaMixInsts ( ) const
inline

Definition at line 508 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::isFPExtFoldable().

◆ hasFP16Denormals()

bool llvm::GCNSubtarget::hasFP16Denormals ( ) const
inline

Definition at line 545 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::denormalsEnabledForType(), isClampZeroToOne(), llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd(), and llvm::SITargetLowering::SITargetLowering().

◆ hasFP64()

bool llvm::GCNSubtarget::hasFP64 ( ) const
inline

Definition at line 452 of file AMDGPUSubtarget.h.

◆ hasFP64Denormals()

bool llvm::GCNSubtarget::hasFP64Denormals ( ) const
inline

Definition at line 549 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::denormalsEnabledForType(), and getFPMode().

◆ hasHalfRate64Ops() [1/2]

bool llvm::GCNSubtarget::hasHalfRate64Ops ( ) const
inline

Definition at line 468 of file AMDGPUSubtarget.h.

◆ hasHalfRate64Ops() [2/2]

static bool llvm::GCNSubtarget::hasHalfRate64Ops ( const TargetSubtargetInfo &  STI)
static

◆ hasHWFP64()

bool llvm::GCNSubtarget::hasHWFP64 ( ) const
inline

Definition at line 460 of file AMDGPUSubtarget.h.

◆ hasIntClamp()

bool llvm::GCNSubtarget::hasIntClamp ( ) const
inline

Definition at line 448 of file AMDGPUSubtarget.h.

◆ hasMad64_32()

bool llvm::GCNSubtarget::hasMad64_32 ( ) const
inline

Definition at line 659 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::SEA_ISLANDS.

Referenced by getMad64_32().

◆ hasMed3_16()

bool llvm::GCNSubtarget::hasMed3_16 ( ) const
inline

Definition at line 500 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

Referenced by getSplatConstantFP(), and minMaxOpcToMin3Max3Opc().

◆ hasMergedShaders()

bool llvm::GCNSubtarget::hasMergedShaders ( ) const
inline
Returns
true if the machine has merged shaders in which s0-s7 are reserved by the hardware and user SGPRs start at s8

Definition at line 865 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue().

◆ hasMIMG_R128()

bool llvm::GCNSubtarget::hasMIMG_R128 ( ) const
inline

Definition at line 456 of file AMDGPUSubtarget.h.

◆ hasMin3Max3_16()

bool llvm::GCNSubtarget::hasMin3Max3_16 ( ) const
inline

Definition at line 504 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

Referenced by getSplatConstantFP().

◆ hasMovrel()

bool llvm::GCNSubtarget::hasMovrel ( ) const
inline

Definition at line 771 of file AMDGPUSubtarget.h.

◆ hasR128A16()

bool llvm::GCNSubtarget::hasR128A16 ( ) const
inline

Definition at line 800 of file AMDGPUSubtarget.h.

◆ hasReadM0MovRelInterpHazard()

bool llvm::GCNSubtarget::hasReadM0MovRelInterpHazard ( ) const
inline

Definition at line 841 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoops().

◆ hasReadM0SendMsgHazard()

bool llvm::GCNSubtarget::hasReadM0SendMsgHazard ( ) const
inline

Definition at line 845 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoops().

◆ hasScalarAtomics()

bool llvm::GCNSubtarget::hasScalarAtomics ( ) const
inline

Definition at line 791 of file AMDGPUSubtarget.h.

◆ hasScalarCompareEq64()

bool llvm::GCNSubtarget::hasScalarCompareEq64 ( ) const
inline

Definition at line 783 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasScalarStores()

bool llvm::GCNSubtarget::hasScalarStores ( ) const
inline

Definition at line 787 of file AMDGPUSubtarget.h.

Referenced by llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::SIRegisterInfo::SIRegisterInfo(), and llvm::SIInstrInfo::storeRegToStackSlot().

◆ hasSDWAMac()

bool llvm::GCNSubtarget::hasSDWAMac ( ) const
inline

Definition at line 675 of file AMDGPUSubtarget.h.

Referenced by findSingleRegDef().

◆ hasSDWAOmod()

bool llvm::GCNSubtarget::hasSDWAOmod ( ) const
inline

Definition at line 663 of file AMDGPUSubtarget.h.

Referenced by findSingleRegDef(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWAOutModsVOPC()

bool llvm::GCNSubtarget::hasSDWAOutModsVOPC ( ) const
inline

Definition at line 679 of file AMDGPUSubtarget.h.

Referenced by findSingleRegDef(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWAScalar()

bool llvm::GCNSubtarget::hasSDWAScalar ( ) const
inline

Definition at line 667 of file AMDGPUSubtarget.h.

Referenced by findSingleRegDef(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWASdst()

bool llvm::GCNSubtarget::hasSDWASdst ( ) const
inline

Definition at line 671 of file AMDGPUSubtarget.h.

Referenced by findSingleRegDef(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasSGPRInitBug()

bool llvm::GCNSubtarget::hasSGPRInitBug ( ) const
inline

Definition at line 824 of file AMDGPUSubtarget.h.

Referenced by getAllSGPRs(), and hasAnyNonFlatUseOfReg().

◆ hasSMemRealTime()

bool llvm::GCNSubtarget::hasSMemRealTime ( ) const
inline

Definition at line 767 of file AMDGPUSubtarget.h.

◆ hasSMovFedHazard()

bool llvm::GCNSubtarget::hasSMovFedHazard ( ) const
inline

Definition at line 837 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

Referenced by addRegsToSet().

◆ hasSwap()

bool llvm::GCNSubtarget::hasSwap ( ) const
inline

Definition at line 520 of file AMDGPUSubtarget.h.

Referenced by matchSwap().

◆ hasUnalignedBufferAccess()

bool llvm::GCNSubtarget::hasUnalignedBufferAccess ( ) const
inline

Definition at line 596 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccesses().

◆ hasUnalignedScratchAccess()

bool llvm::GCNSubtarget::hasUnalignedScratchAccess ( ) const
inline

Definition at line 600 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccesses().

◆ hasUnpackedD16VMem()

bool llvm::GCNSubtarget::hasUnpackedD16VMem ( ) const
inline

Definition at line 650 of file AMDGPUSubtarget.h.

Referenced by adjustLoadValueTypeImpl(), llvm::createSIAddIMGInitPass(), parseTexFail(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasVGPRIndexMode()

bool llvm::GCNSubtarget::hasVGPRIndexMode ( ) const
inline

Definition at line 775 of file AMDGPUSubtarget.h.

◆ initializeSubtargetDependencies()

GCNSubtarget & GCNSubtarget::initializeSubtargetDependencies ( const Triple &  TT,
StringRef  GPU,
StringRef  FS 
)

Definition at line 67 of file AMDGPUSubtarget.cpp.

References llvm::Triple::amdgcn, assert(), llvm::StringRef::contains(), llvm::Triple::getArch(), llvm::R600Subtarget::getGeneration(), llvm::AMDGPUSubtarget::HasFminFmaxLegacy, llvm::AMDGPUSubtarget::isAmdHsaOS(), llvm::AMDGPUSubtarget::LocalMemorySize, llvm::R600Subtarget::ParseSubtargetFeatures(), llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ isMesaGfxShader()

bool llvm::GCNSubtarget::isMesaGfxShader ( const Function &  F) const
inline

Definition at line 655 of file AMDGPUSubtarget.h.

References llvm::Function::getCallingConv(), llvm::AMDGPUSubtarget::isMesa3DOS(), and llvm::AMDGPU::isShader().

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue(), and llvm::SIMachineFunctionInfo::SIMachineFunctionInfo().

◆ isSRAMECCEnabled()

bool llvm::GCNSubtarget::isSRAMECCEnabled ( ) const
inline

Definition at line 695 of file AMDGPUSubtarget.h.

◆ isTrapHandlerEnabled()

bool llvm::GCNSubtarget::isTrapHandlerEnabled ( ) const
inline

Definition at line 608 of file AMDGPUSubtarget.h.

Referenced by findUser(), and hasAnyNonFlatUseOfReg().

◆ isXNACKEnabled()

bool llvm::GCNSubtarget::isXNACKEnabled ( ) const
inline

Definition at line 612 of file AMDGPUSubtarget.h.

Referenced by addRegsToSet().

◆ ldsRequiresM0Init()

bool llvm::GCNSubtarget::ldsRequiresM0Init ( ) const
inline

Return if most LDS instructions have an m0 use that require m0 to be iniitalized.

Definition at line 642 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

Referenced by canMoveInstsAcrossMemOp().

◆ loadStoreOptEnabled()

bool llvm::GCNSubtarget::loadStoreOptEnabled ( ) const
inline

Definition at line 820 of file AMDGPUSubtarget.h.

References EnableLoadStoreOpt.

Referenced by canMoveInstsAcrossMemOp().

◆ overrideSchedPolicy()

void GCNSubtarget::overrideSchedPolicy ( MachineSchedPolicy &  Policy,
unsigned  NumRegionInstrs 
) const
override

Definition at line 472 of file AMDGPUSubtarget.cpp.

References llvm::MachineSchedPolicy::OnlyBottomUp, llvm::MachineSchedPolicy::OnlyTopDown, llvm::MachineSchedPolicy::ShouldTrackLaneMasks, and llvm::MachineSchedPolicy::ShouldTrackPressure.

◆ ParseSubtargetFeatures()

void llvm::GCNSubtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  FS 
)

◆ privateMemoryResourceIsRangeChecked()

bool llvm::GCNSubtarget::privateMemoryResourceIsRangeChecked ( ) const
inline
Returns
If MUBUF instructions always perform range checking, even for buffer resources used for private memory access.

Definition at line 577 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

◆ setScalarizeGlobalBehavior()

void llvm::GCNSubtarget::setScalarizeGlobalBehavior ( bool  b)
inline

Definition at line 719 of file AMDGPUSubtarget.h.

◆ supportsMinMaxDenormModes()

bool llvm::GCNSubtarget::supportsMinMaxDenormModes ( ) const
inline

Definition at line 553 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::SITargetLowering::isCanonicalized().

◆ unsafeDSOffsetFoldingEnabled()

bool llvm::GCNSubtarget::unsafeDSOffsetFoldingEnabled ( ) const
inline

Definition at line 532 of file AMDGPUSubtarget.h.

◆ useDS128()

bool llvm::GCNSubtarget::useDS128 ( ) const
inline
Returns
If target supports ds_read/write_b128 and user enables generation of ds_read/write_b128.

Definition at line 571 of file AMDGPUSubtarget.h.

Referenced by getFPTernOp(), and getLoadExtOrTrunc().

◆ useFlatForGlobal()

bool llvm::GCNSubtarget::useFlatForGlobal ( ) const
inline

Definition at line 565 of file AMDGPUSubtarget.h.

Referenced by llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ usePRTStrictNull()

bool llvm::GCNSubtarget::usePRTStrictNull ( ) const
inline
Returns
If target requires PRT Struct NULL support (zero result registers for sparse texture support).

Definition at line 583 of file AMDGPUSubtarget.h.

Referenced by llvm::createSIAddIMGInitPass().

◆ useVGPRIndexMode()

bool llvm::GCNSubtarget::useVGPRIndexMode ( bool  UserEnable) const
inline

Definition at line 779 of file AMDGPUSubtarget.h.

Referenced by emitIndirectDst(), and emitIndirectSrc().

◆ vmemWriteNeedsExpWaitcnt()

bool llvm::GCNSubtarget::vmemWriteNeedsExpWaitcnt ( ) const
inline

Definition at line 683 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::SEA_ISLANDS.

Member Data Documentation

◆ AddNoCarryInsts

bool llvm::GCNSubtarget::AddNoCarryInsts
protected

Definition at line 363 of file AMDGPUSubtarget.h.

◆ AutoWaitcntBeforeBarrier

bool llvm::GCNSubtarget::AutoWaitcntBeforeBarrier
protected

Definition at line 313 of file AMDGPUSubtarget.h.

◆ CaymanISA

bool llvm::GCNSubtarget::CaymanISA
protected

Definition at line 366 of file AMDGPUSubtarget.h.

◆ CFALUBug

bool llvm::GCNSubtarget::CFALUBug
protected

Definition at line 367 of file AMDGPUSubtarget.h.

◆ CIInsts

bool llvm::GCNSubtarget::CIInsts
protected

Definition at line 338 of file AMDGPUSubtarget.h.

◆ CodeObjectV3

bool llvm::GCNSubtarget::CodeObjectV3
protected

Definition at line 314 of file AMDGPUSubtarget.h.

◆ DebuggerEmitPrologue

bool llvm::GCNSubtarget::DebuggerEmitPrologue
protected

Definition at line 321 of file AMDGPUSubtarget.h.

◆ DebuggerInsertNops

bool llvm::GCNSubtarget::DebuggerInsertNops
protected

Definition at line 320 of file AMDGPUSubtarget.h.

◆ DumpCode

bool llvm::GCNSubtarget::DumpCode
protected

Definition at line 330 of file AMDGPUSubtarget.h.

◆ DX10Clamp

bool llvm::GCNSubtarget::DX10Clamp
protected

Definition at line 311 of file AMDGPUSubtarget.h.

◆ EnableDS128

bool llvm::GCNSubtarget::EnableDS128
protected

Definition at line 328 of file AMDGPUSubtarget.h.

◆ EnableHugePrivateBuffer

bool llvm::GCNSubtarget::EnableHugePrivateBuffer
protected

Definition at line 324 of file AMDGPUSubtarget.h.

◆ EnableLoadStoreOpt

bool llvm::GCNSubtarget::EnableLoadStoreOpt
protected

Definition at line 325 of file AMDGPUSubtarget.h.

◆ EnablePRTStrictNull

bool llvm::GCNSubtarget::EnablePRTStrictNull
protected

Definition at line 329 of file AMDGPUSubtarget.h.

◆ EnableSIScheduler

bool llvm::GCNSubtarget::EnableSIScheduler
protected

Definition at line 327 of file AMDGPUSubtarget.h.

◆ EnableSRAMECC

bool llvm::GCNSubtarget::EnableSRAMECC
protected

Definition at line 358 of file AMDGPUSubtarget.h.

◆ EnableUnsafeDSOffsetFolding

bool llvm::GCNSubtarget::EnableUnsafeDSOffsetFolding
protected

Definition at line 326 of file AMDGPUSubtarget.h.

◆ EnableXNACK

bool llvm::GCNSubtarget::EnableXNACK
protected

Definition at line 318 of file AMDGPUSubtarget.h.

◆ FastFMAF32

bool llvm::GCNSubtarget::FastFMAF32
protected

Definition at line 306 of file AMDGPUSubtarget.h.

◆ FeatureDisable

bool llvm::GCNSubtarget::FeatureDisable
protected

Definition at line 373 of file AMDGPUSubtarget.h.

◆ FlatAddressSpace

bool llvm::GCNSubtarget::FlatAddressSpace
protected

Definition at line 359 of file AMDGPUSubtarget.h.

◆ FlatForGlobal

bool llvm::GCNSubtarget::FlatForGlobal
protected

Definition at line 312 of file AMDGPUSubtarget.h.

◆ FlatGlobalInsts

bool llvm::GCNSubtarget::FlatGlobalInsts
protected

Definition at line 361 of file AMDGPUSubtarget.h.

◆ FlatInstOffsets

bool llvm::GCNSubtarget::FlatInstOffsets
protected

Definition at line 360 of file AMDGPUSubtarget.h.

◆ FlatScratchInsts

bool llvm::GCNSubtarget::FlatScratchInsts
protected

Definition at line 362 of file AMDGPUSubtarget.h.

◆ FMA

bool llvm::GCNSubtarget::FMA
protected

Definition at line 334 of file AMDGPUSubtarget.h.

◆ FP64

bool llvm::GCNSubtarget::FP64
protected

Definition at line 333 of file AMDGPUSubtarget.h.

◆ FP64FP16Denormals

bool llvm::GCNSubtarget::FP64FP16Denormals
protected

Definition at line 310 of file AMDGPUSubtarget.h.

◆ GCN3Encoding

bool llvm::GCNSubtarget::GCN3Encoding
protected

Definition at line 337 of file AMDGPUSubtarget.h.

◆ Gen

unsigned llvm::GCNSubtarget::Gen
protected

Definition at line 299 of file AMDGPUSubtarget.h.

◆ GFX9Insts

bool llvm::GCNSubtarget::GFX9Insts
protected

Definition at line 340 of file AMDGPUSubtarget.h.

◆ HalfRate64Ops

bool llvm::GCNSubtarget::HalfRate64Ops
protected

Definition at line 307 of file AMDGPUSubtarget.h.

◆ HasApertureRegs

bool llvm::GCNSubtarget::HasApertureRegs
protected

Definition at line 317 of file AMDGPUSubtarget.h.

◆ HasDLInsts

bool llvm::GCNSubtarget::HasDLInsts
protected

Definition at line 356 of file AMDGPUSubtarget.h.

◆ HasDotInsts

bool llvm::GCNSubtarget::HasDotInsts
protected

Definition at line 357 of file AMDGPUSubtarget.h.

◆ HasDPP

bool llvm::GCNSubtarget::HasDPP
protected

Definition at line 354 of file AMDGPUSubtarget.h.

◆ HasFmaMixInsts

bool llvm::GCNSubtarget::HasFmaMixInsts
protected

Definition at line 344 of file AMDGPUSubtarget.h.

◆ HasIntClamp

bool llvm::GCNSubtarget::HasIntClamp
protected

Definition at line 343 of file AMDGPUSubtarget.h.

◆ HasMovrel

bool llvm::GCNSubtarget::HasMovrel
protected

Definition at line 345 of file AMDGPUSubtarget.h.

◆ HasR128A16

bool llvm::GCNSubtarget::HasR128A16
protected

Definition at line 355 of file AMDGPUSubtarget.h.

◆ HasScalarAtomics

bool llvm::GCNSubtarget::HasScalarAtomics
protected

Definition at line 348 of file AMDGPUSubtarget.h.

◆ HasScalarStores

bool llvm::GCNSubtarget::HasScalarStores
protected

Definition at line 347 of file AMDGPUSubtarget.h.

◆ HasSDWAMac

bool llvm::GCNSubtarget::HasSDWAMac
protected

Definition at line 352 of file AMDGPUSubtarget.h.

◆ HasSDWAOmod

bool llvm::GCNSubtarget::HasSDWAOmod
protected

Definition at line 349 of file AMDGPUSubtarget.h.

◆ HasSDWAOutModsVOPC

bool llvm::GCNSubtarget::HasSDWAOutModsVOPC
protected

Definition at line 353 of file AMDGPUSubtarget.h.

◆ HasSDWAScalar

bool llvm::GCNSubtarget::HasSDWAScalar
protected

Definition at line 350 of file AMDGPUSubtarget.h.

◆ HasSDWASdst

bool llvm::GCNSubtarget::HasSDWASdst
protected

Definition at line 351 of file AMDGPUSubtarget.h.

◆ HasSMemRealTime

bool llvm::GCNSubtarget::HasSMemRealTime
protected

Definition at line 342 of file AMDGPUSubtarget.h.

◆ HasUnpackedD16VMem

bool llvm::GCNSubtarget::HasUnpackedD16VMem
protected

Definition at line 364 of file AMDGPUSubtarget.h.

◆ HasVertexCache

bool llvm::GCNSubtarget::HasVertexCache
protected

Definition at line 368 of file AMDGPUSubtarget.h.

◆ HasVGPRIndexMode

bool llvm::GCNSubtarget::HasVGPRIndexMode
protected

Definition at line 346 of file AMDGPUSubtarget.h.

◆ InstrItins

InstrItineraryData llvm::GCNSubtarget::InstrItins
protected

Definition at line 301 of file AMDGPUSubtarget.h.

◆ IsaVersion

unsigned llvm::GCNSubtarget::IsaVersion
protected

Definition at line 300 of file AMDGPUSubtarget.h.

◆ IsGCN

bool llvm::GCNSubtarget::IsGCN
protected

Definition at line 336 of file AMDGPUSubtarget.h.

◆ LDSBankCount

int llvm::GCNSubtarget::LDSBankCount
protected

Definition at line 302 of file AMDGPUSubtarget.h.

◆ MaxPrivateElementSize

unsigned llvm::GCNSubtarget::MaxPrivateElementSize
protected

Definition at line 303 of file AMDGPUSubtarget.h.

◆ MIMG_R128

bool llvm::GCNSubtarget::MIMG_R128
protected

Definition at line 335 of file AMDGPUSubtarget.h.

◆ R600ALUInst

bool llvm::GCNSubtarget::R600ALUInst
protected

Definition at line 365 of file AMDGPUSubtarget.h.

◆ ScalarizeGlobal

bool llvm::GCNSubtarget::ScalarizeGlobal
protected

Definition at line 370 of file AMDGPUSubtarget.h.

◆ SGPRInitBug

bool llvm::GCNSubtarget::SGPRInitBug
protected

Definition at line 341 of file AMDGPUSubtarget.h.

◆ TargetTriple

Triple llvm::GCNSubtarget::TargetTriple
protected

Definition at line 298 of file AMDGPUSubtarget.h.

◆ TexVTXClauseSize

short llvm::GCNSubtarget::TexVTXClauseSize
protected

Definition at line 369 of file AMDGPUSubtarget.h.

◆ TrapHandler

bool llvm::GCNSubtarget::TrapHandler
protected

Definition at line 319 of file AMDGPUSubtarget.h.

◆ TSInfo

SelectionDAGTargetInfo llvm::GCNSubtarget::TSInfo
protected

Definition at line 375 of file AMDGPUSubtarget.h.

◆ UnalignedBufferAccess

bool llvm::GCNSubtarget::UnalignedBufferAccess
protected

Definition at line 316 of file AMDGPUSubtarget.h.

◆ UnalignedScratchAccess

bool llvm::GCNSubtarget::UnalignedScratchAccess
protected

Definition at line 315 of file AMDGPUSubtarget.h.

◆ VIInsts

bool llvm::GCNSubtarget::VIInsts
protected

Definition at line 339 of file AMDGPUSubtarget.h.

The documentation for this class was generated from the following files:
Generated on Sun Dec 20 2020 14:02:46 for LLVM by   doxygen 1.8.13