Here is a list of all namespace members with links to the namespace documentation for each member:
- a -
- A
: llvm::ARM_PROC
- aarch64_clrex
: llvm::Intrinsic
- aarch64_crc32b
: llvm::Intrinsic
- aarch64_crc32cb
: llvm::Intrinsic
- aarch64_crc32ch
: llvm::Intrinsic
- aarch64_crc32cw
: llvm::Intrinsic
- aarch64_crc32cx
: llvm::Intrinsic
- aarch64_crc32h
: llvm::Intrinsic
- aarch64_crc32w
: llvm::Intrinsic
- aarch64_crc32x
: llvm::Intrinsic
- aarch64_crypto_aesd
: llvm::Intrinsic
- aarch64_crypto_aese
: llvm::Intrinsic
- aarch64_crypto_aesimc
: llvm::Intrinsic
- aarch64_crypto_aesmc
: llvm::Intrinsic
- aarch64_crypto_sha1c
: llvm::Intrinsic
- aarch64_crypto_sha1h
: llvm::Intrinsic
- aarch64_crypto_sha1m
: llvm::Intrinsic
- aarch64_crypto_sha1p
: llvm::Intrinsic
- aarch64_crypto_sha1su0
: llvm::Intrinsic
- aarch64_crypto_sha1su1
: llvm::Intrinsic
- aarch64_crypto_sha256h
: llvm::Intrinsic
- aarch64_crypto_sha256h2
: llvm::Intrinsic
- aarch64_crypto_sha256su0
: llvm::Intrinsic
- aarch64_crypto_sha256su1
: llvm::Intrinsic
- aarch64_dmb
: llvm::Intrinsic
- aarch64_dsb
: llvm::Intrinsic
- aarch64_get_fpcr
: llvm::Intrinsic
- aarch64_hint
: llvm::Intrinsic
- aarch64_isb
: llvm::Intrinsic
- aarch64_ldaxp
: llvm::Intrinsic
- aarch64_ldaxr
: llvm::Intrinsic
- aarch64_ldxp
: llvm::Intrinsic
- aarch64_ldxr
: llvm::Intrinsic
- aarch64_neon_abs
: llvm::Intrinsic
- aarch64_neon_addhn
: llvm::Intrinsic
- aarch64_neon_addp
: llvm::Intrinsic
- aarch64_neon_cls
: llvm::Intrinsic
- aarch64_neon_fabd
: llvm::Intrinsic
- aarch64_neon_facge
: llvm::Intrinsic
- aarch64_neon_facgt
: llvm::Intrinsic
- aarch64_neon_faddv
: llvm::Intrinsic
- aarch64_neon_fcvtas
: llvm::Intrinsic
- aarch64_neon_fcvtau
: llvm::Intrinsic
- aarch64_neon_fcvtms
: llvm::Intrinsic
- aarch64_neon_fcvtmu
: llvm::Intrinsic
- aarch64_neon_fcvtns
: llvm::Intrinsic
- aarch64_neon_fcvtnu
: llvm::Intrinsic
- aarch64_neon_fcvtps
: llvm::Intrinsic
- aarch64_neon_fcvtpu
: llvm::Intrinsic
- aarch64_neon_fcvtxn
: llvm::Intrinsic
- aarch64_neon_fcvtzs
: llvm::Intrinsic
- aarch64_neon_fcvtzu
: llvm::Intrinsic
- aarch64_neon_fmax
: llvm::Intrinsic
- aarch64_neon_fmaxnm
: llvm::Intrinsic
- aarch64_neon_fmaxnmp
: llvm::Intrinsic
- aarch64_neon_fmaxnmv
: llvm::Intrinsic
- aarch64_neon_fmaxp
: llvm::Intrinsic
- aarch64_neon_fmaxv
: llvm::Intrinsic
- aarch64_neon_fmin
: llvm::Intrinsic
- aarch64_neon_fminnm
: llvm::Intrinsic
- aarch64_neon_fminnmp
: llvm::Intrinsic
- aarch64_neon_fminnmv
: llvm::Intrinsic
- aarch64_neon_fminp
: llvm::Intrinsic
- aarch64_neon_fminv
: llvm::Intrinsic
- aarch64_neon_fmlal
: llvm::Intrinsic
- aarch64_neon_fmlal2
: llvm::Intrinsic
- aarch64_neon_fmlsl
: llvm::Intrinsic
- aarch64_neon_fmlsl2
: llvm::Intrinsic
- aarch64_neon_fmulx
: llvm::Intrinsic
- aarch64_neon_frecpe
: llvm::Intrinsic
- aarch64_neon_frecps
: llvm::Intrinsic
- aarch64_neon_frecpx
: llvm::Intrinsic
- aarch64_neon_frintn
: llvm::Intrinsic
- aarch64_neon_frsqrte
: llvm::Intrinsic
- aarch64_neon_frsqrts
: llvm::Intrinsic
- aarch64_neon_ld1x2
: llvm::Intrinsic
- aarch64_neon_ld1x3
: llvm::Intrinsic
- aarch64_neon_ld1x4
: llvm::Intrinsic
- aarch64_neon_ld2
: llvm::Intrinsic
- aarch64_neon_ld2lane
: llvm::Intrinsic
- aarch64_neon_ld2r
: llvm::Intrinsic
- aarch64_neon_ld3
: llvm::Intrinsic
- aarch64_neon_ld3lane
: llvm::Intrinsic
- aarch64_neon_ld3r
: llvm::Intrinsic
- aarch64_neon_ld4
: llvm::Intrinsic
- aarch64_neon_ld4lane
: llvm::Intrinsic
- aarch64_neon_ld4r
: llvm::Intrinsic
- aarch64_neon_pmul
: llvm::Intrinsic
- aarch64_neon_pmull
: llvm::Intrinsic
- aarch64_neon_pmull64
: llvm::Intrinsic
- aarch64_neon_raddhn
: llvm::Intrinsic
- aarch64_neon_rbit
: llvm::Intrinsic
- aarch64_neon_rshrn
: llvm::Intrinsic
- aarch64_neon_rsubhn
: llvm::Intrinsic
- aarch64_neon_sabd
: llvm::Intrinsic
- aarch64_neon_saddlp
: llvm::Intrinsic
- aarch64_neon_saddlv
: llvm::Intrinsic
- aarch64_neon_saddv
: llvm::Intrinsic
- aarch64_neon_scalar_sqxtn
: llvm::Intrinsic
- aarch64_neon_scalar_sqxtun
: llvm::Intrinsic
- aarch64_neon_scalar_uqxtn
: llvm::Intrinsic
- aarch64_neon_sdot
: llvm::Intrinsic
- aarch64_neon_shadd
: llvm::Intrinsic
- aarch64_neon_shll
: llvm::Intrinsic
- aarch64_neon_shsub
: llvm::Intrinsic
- aarch64_neon_smax
: llvm::Intrinsic
- aarch64_neon_smaxp
: llvm::Intrinsic
- aarch64_neon_smaxv
: llvm::Intrinsic
- aarch64_neon_smin
: llvm::Intrinsic
- aarch64_neon_sminp
: llvm::Intrinsic
- aarch64_neon_sminv
: llvm::Intrinsic
- aarch64_neon_smull
: llvm::Intrinsic
- aarch64_neon_sqabs
: llvm::Intrinsic
- aarch64_neon_sqadd
: llvm::Intrinsic
- aarch64_neon_sqdmulh
: llvm::Intrinsic
- aarch64_neon_sqdmull
: llvm::Intrinsic
- aarch64_neon_sqdmulls_scalar
: llvm::Intrinsic
- aarch64_neon_sqneg
: llvm::Intrinsic
- aarch64_neon_sqrdmulh
: llvm::Intrinsic
- aarch64_neon_sqrshl
: llvm::Intrinsic
- aarch64_neon_sqrshrn
: llvm::Intrinsic
- aarch64_neon_sqrshrun
: llvm::Intrinsic
- aarch64_neon_sqshl
: llvm::Intrinsic
- aarch64_neon_sqshlu
: llvm::Intrinsic
- aarch64_neon_sqshrn
: llvm::Intrinsic
- aarch64_neon_sqshrun
: llvm::Intrinsic
- aarch64_neon_sqsub
: llvm::Intrinsic
- aarch64_neon_sqxtn
: llvm::Intrinsic
- aarch64_neon_sqxtun
: llvm::Intrinsic
- aarch64_neon_srhadd
: llvm::Intrinsic
- aarch64_neon_srshl
: llvm::Intrinsic
- aarch64_neon_sshl
: llvm::Intrinsic
- aarch64_neon_sshll
: llvm::Intrinsic
- aarch64_neon_st1x2
: llvm::Intrinsic
- aarch64_neon_st1x3
: llvm::Intrinsic
- aarch64_neon_st1x4
: llvm::Intrinsic
- aarch64_neon_st2
: llvm::Intrinsic
- aarch64_neon_st2lane
: llvm::Intrinsic
- aarch64_neon_st3
: llvm::Intrinsic
- aarch64_neon_st3lane
: llvm::Intrinsic
- aarch64_neon_st4
: llvm::Intrinsic
- aarch64_neon_st4lane
: llvm::Intrinsic
- aarch64_neon_subhn
: llvm::Intrinsic
- aarch64_neon_suqadd
: llvm::Intrinsic
- aarch64_neon_tbl1
: llvm::Intrinsic
- aarch64_neon_tbl2
: llvm::Intrinsic
- aarch64_neon_tbl3
: llvm::Intrinsic
- aarch64_neon_tbl4
: llvm::Intrinsic
- aarch64_neon_tbx1
: llvm::Intrinsic
- aarch64_neon_tbx2
: llvm::Intrinsic
- aarch64_neon_tbx3
: llvm::Intrinsic
- aarch64_neon_tbx4
: llvm::Intrinsic
- aarch64_neon_uabd
: llvm::Intrinsic
- aarch64_neon_uaddlp
: llvm::Intrinsic
- aarch64_neon_uaddlv
: llvm::Intrinsic
- aarch64_neon_uaddv
: llvm::Intrinsic
- aarch64_neon_udot
: llvm::Intrinsic
- aarch64_neon_uhadd
: llvm::Intrinsic
- aarch64_neon_uhsub
: llvm::Intrinsic
- aarch64_neon_umax
: llvm::Intrinsic
- aarch64_neon_umaxp
: llvm::Intrinsic
- aarch64_neon_umaxv
: llvm::Intrinsic
- aarch64_neon_umin
: llvm::Intrinsic
- aarch64_neon_uminp
: llvm::Intrinsic
- aarch64_neon_uminv
: llvm::Intrinsic
- aarch64_neon_umull
: llvm::Intrinsic
- aarch64_neon_uqadd
: llvm::Intrinsic
- aarch64_neon_uqrshl
: llvm::Intrinsic
- aarch64_neon_uqrshrn
: llvm::Intrinsic
- aarch64_neon_uqshl
: llvm::Intrinsic
- aarch64_neon_uqshrn
: llvm::Intrinsic
- aarch64_neon_uqsub
: llvm::Intrinsic
- aarch64_neon_uqxtn
: llvm::Intrinsic
- aarch64_neon_urecpe
: llvm::Intrinsic
- aarch64_neon_urhadd
: llvm::Intrinsic
- aarch64_neon_urshl
: llvm::Intrinsic
- aarch64_neon_ursqrte
: llvm::Intrinsic
- aarch64_neon_ushl
: llvm::Intrinsic
- aarch64_neon_ushll
: llvm::Intrinsic
- aarch64_neon_usqadd
: llvm::Intrinsic
- aarch64_neon_vcopy_lane
: llvm::Intrinsic
- aarch64_neon_vcvtfp2fxs
: llvm::Intrinsic
- aarch64_neon_vcvtfp2fxu
: llvm::Intrinsic
- aarch64_neon_vcvtfp2hf
: llvm::Intrinsic
- aarch64_neon_vcvtfxs2fp
: llvm::Intrinsic
- aarch64_neon_vcvtfxu2fp
: llvm::Intrinsic
- aarch64_neon_vcvthf2fp
: llvm::Intrinsic
- aarch64_neon_vsli
: llvm::Intrinsic
- aarch64_neon_vsri
: llvm::Intrinsic
- aarch64_sdiv
: llvm::Intrinsic
- aarch64_sisd_fabd
: llvm::Intrinsic
- aarch64_sisd_fcvtxn
: llvm::Intrinsic
- aarch64_space
: llvm::Intrinsic
- aarch64_stlxp
: llvm::Intrinsic
- aarch64_stlxr
: llvm::Intrinsic
- aarch64_stxp
: llvm::Intrinsic
- aarch64_stxr
: llvm::Intrinsic
- aarch64_udiv
: llvm::Intrinsic
- AArch64_VectorCall
: llvm::CallingConv
- AArch64ARCHExtNames
: llvm::AArch64
- AArch64ARCHNames
: llvm::AArch64
- AArch64CPUNames
: llvm::AArch64
- AArch64FrameOffsetCannotUpdate
: llvm
- AArch64FrameOffsetCanUpdate
: llvm
- AArch64FrameOffsetIsLegal
: llvm
- AArch64FrameOffsetStatus
: llvm
- AArch64StringToVectorLayout()
: llvm
- AArch64VectorLayoutToString()
: llvm
- ABI_align8_needed
: llvm::ARMBuildAttrs
- ABI_align8_preserved
: llvm::ARMBuildAttrs
- ABI_align_needed
: llvm::ARMBuildAttrs
- ABI_align_preserved
: llvm::ARMBuildAttrs
- ABI_enum_size
: llvm::ARMBuildAttrs
- ABI_FP_16bit_format
: llvm::ARMBuildAttrs
- ABI_FP_denormal
: llvm::ARMBuildAttrs
- ABI_FP_exceptions
: llvm::ARMBuildAttrs
- ABI_FP_number_model
: llvm::ARMBuildAttrs
- ABI_FP_optimization_goals
: llvm::ARMBuildAttrs
- ABI_FP_rounding
: llvm::ARMBuildAttrs
- ABI_FP_user_exceptions
: llvm::ARMBuildAttrs
- ABI_HardFP_use
: llvm::ARMBuildAttrs
- ABI_optimization_goals
: llvm::ARMBuildAttrs
- ABI_PCS_GOT_use
: llvm::ARMBuildAttrs
- ABI_PCS_R9_use
: llvm::ARMBuildAttrs
- ABI_PCS_RO_data
: llvm::ARMBuildAttrs
- ABI_PCS_RW_data
: llvm::ARMBuildAttrs
- ABI_PCS_wchar_t
: llvm::ARMBuildAttrs
- ABI_VFP_args
: llvm::ARMBuildAttrs
- ABI_WMMX_args
: llvm::ARMBuildAttrs
- ABIType
: llvm::FloatABI
- abs()
: llvm
- ABS
: llvm::ISD
, llvm::SISrcMods
- Absolute
: llvm::HexagonII
- AbsoluteDifference()
: llvm
- AbsoluteSet
: llvm::HexagonII
- absoluteSymbols()
: llvm::orc
- AC_EVEX_2_VEX
: llvm::X86
- AcceleratorTable
: llvm::dwarf
- AccelTableKind
: llvm
- access()
: llvm::sys::fs
- AccessAttribute
: llvm::dwarf
- AccessibilityString()
: llvm::dwarf
- AccessMode
: llvm::sys::fs
- AccessQualifier
: llvm::AMDGPU::HSAMD
- AccessSizeMask
: llvm::SystemZII
- AccessSizeShift
: llvm::SystemZII
- AccQual
: llvm::AMDGPU::HSAMD::Kernel::Arg::Key
- AccumulatorMask
: llvm::HexagonII
- AccumulatorPos
: llvm::HexagonII
- ActualAccQual
: llvm::AMDGPU::HSAMD::Kernel::Arg::Key
- ADC
: llvm::AArch64ISD
, llvm::X86ISD
- ADCS
: llvm::AArch64ISD
- add
: llvm::ARM_AM
- ADD
: llvm::ISD
, llvm::LPAC
- Add
: llvm::MCID
- ADD
: llvm::X86ISD
- ADD_TLS
: llvm::PPCISD
- AddBufferFn
: llvm::lto
- ADDC
: llvm::ARMISD
, llvm::HexagonISD
, llvm::ISD
, llvm::LPAC
- ADDCARRY
: llvm::ISD
, llvm::SystemZISD
- addClonedBlockToLoopInfo()
: llvm
- addConstant()
: llvm::HexagonMCInstrInfo
- addConstantPoolReference()
: llvm
- addConstExtender()
: llvm::HexagonMCInstrInfo
- addCoroutinePassesToExtensionPoints()
: llvm
- addDirectMem()
: llvm
- ADDE
: llvm::ARMISD
, llvm::ISD
- AddExtraVersionPrinter()
: llvm::cl
- addFrameReference()
: llvm
- addFullAddress()
: llvm
- ADDI_DTPREL_L
: llvm::PPCISD
- ADDI_TLSGD_L
: llvm::PPCISD
- ADDI_TLSGD_L_ADDR
: llvm::PPCISD
- ADDI_TLSLD_L
: llvm::PPCISD
- ADDI_TLSLD_L_ADDR
: llvm::PPCISD
- addInnerLoopsToHeadersMap()
: llvm
- ADDIS_DTPREL_HA
: llvm::PPCISD
- ADDIS_GOT_TPREL_HA
: llvm::PPCISD
- ADDIS_TLSGD_HA
: llvm::PPCISD
- ADDIS_TLSLD_HA
: llvm::PPCISD
- AddLiteralOption()
: llvm::cl
- addLiveIns()
: llvm
- ADDlow
: llvm::AArch64ISD
- addNodeToInterval()
: llvm
- addOffset()
: llvm
, llvm::cflaa
- AddOne()
: llvm
- AddrBaseReg
: llvm::X86
- AddrDisp
: llvm::X86
- AddRegFrm
: llvm::X86II
- addRegOffset()
: llvm
- addRegReg()
: llvm
- ADDRESS_SPACE_CONST
: llvm
- ADDRESS_SPACE_GENERIC
: llvm
- ADDRESS_SPACE_GLOBAL
: llvm
- ADDRESS_SPACE_LOCAL
: llvm
- ADDRESS_SPACE_PARAM
: llvm
- ADDRESS_SPACE_SHARED
: llvm
- AddressDirect
: llvm::ARMBuildAttrs
- AddressGOT
: llvm::ARMBuildAttrs
- addressofreturnaddress
: llvm::Intrinsic
- AddressRONone
: llvm::ARMBuildAttrs
- AddressROPCRel
: llvm::ARMBuildAttrs
- AddressRWNone
: llvm::ARMBuildAttrs
- AddressRWPCRel
: llvm::ARMBuildAttrs
- AddressRWSBRel
: llvm::ARMBuildAttrs
- AddressSpace
: llvm
, llvm::AVR
, llvm::NVPTX::PTXLdStInstCode
- AddressSpaceQualifier
: llvm::AMDGPU::HSAMD
- AddrIndexReg
: llvm::X86
- AddrMode
: llvm::ARMII
, llvm::HexagonII
- AddrMode1
: llvm::ARMII
- AddrMode2
: llvm::ARMII
- AddrMode3
: llvm::ARMII
- AddrMode4
: llvm::ARMII
- AddrMode5
: llvm::ARMII
- AddrMode5FP16
: llvm::ARMII
- AddrMode6
: llvm::ARMII
- AddrMode_i12
: llvm::ARMII
- AddrModeMask
: llvm::ARMII
, llvm::HexagonII
- AddrModeNone
: llvm::ARMII
- AddrModePos
: llvm::HexagonII
- AddrModeT1_1
: llvm::ARMII
- AddrModeT1_2
: llvm::ARMII
- AddrModeT1_4
: llvm::ARMII
- AddrModeT1_s
: llvm::ARMII
- AddrModeT2_i12
: llvm::ARMII
- AddrModeT2_i8
: llvm::ARMII
- AddrModeT2_i8s4
: llvm::ARMII
- AddrModeT2_ldrex
: llvm::ARMII
- AddrModeT2_pc
: llvm::ARMII
- AddrModeT2_so
: llvm::ARMII
- AddrModeToString()
: llvm::ARMII
- AddrNumOperands
: llvm::X86
- ADDROFRETURNADDR
: llvm::ISD
- AddrOpc
: llvm::ARM_AM
- AddrScaleAmt
: llvm::X86
- AddrSegmentReg
: llvm::X86
- ADDRSPACECAST
: llvm::ISD
- AddrSpaceQual
: llvm::AMDGPU::HSAMD::Kernel::Arg::Key
- ADDS
: llvm::AArch64ISD
- AddSignalHandler()
: llvm::sys
- AddStreamFn
: llvm::lto
- addStringMetadataToLoop()
: llvm
- ADDSUB
: llvm::X86ISD
- ADJDYNALLOC
: llvm::LanaiISD
, llvm::SystemZISD
- adjust_trampoline
: llvm::Intrinsic
- ADJUST_TRAMPOLINE
: llvm::ISD
- adjustBranch()
: adjust
- adjustBranchTarget()
: llvm::AVR::fixups
- adjustPqBits()
: llvm
- adjustRelativeBranch()
: adjust
- adjustSiblingSizes()
: llvm::IntervalMapImpl
- adl_begin()
: llvm
, llvm::adl_detail
- adl_end()
: llvm::adl_detail
, llvm
- adl_swap()
: llvm::adl_detail
, llvm
- ADR
: llvm::AArch64ISD
- ADRP
: llvm::AArch64ISD
- AdSize16
: llvm::X86II
- AdSize32
: llvm::X86II
- AdSize64
: llvm::X86II
- AdSizeMask
: llvm::X86II
- AdSizeShift
: llvm::X86II
- AdSizeX
: llvm::X86II
- Advanced_SIMD_arch
: llvm::ARMBuildAttrs
- ADX
: llvm
- AEABI_UNWIND_CPP_PR0
: llvm::ARM::EHABI
- AEABI_UNWIND_CPP_PR1
: llvm::ARM::EHABI
- AEABI_UNWIND_CPP_PR2
: llvm::ARM::EHABI
- AEK_AES
: llvm::AArch64
, llvm::ARM
- AEK_CRC
: llvm::AArch64
, llvm::ARM
- AEK_CRYPTO
: llvm::AArch64
, llvm::ARM
- AEK_DOTPROD
: llvm::AArch64
, llvm::ARM
- AEK_DSP
: llvm::ARM
- AEK_FP
: llvm::AArch64
, llvm::ARM
- AEK_FP16
: llvm::AArch64
, llvm::ARM
- AEK_FP16FML
: llvm::AArch64
, llvm::ARM
- AEK_HWDIVARM
: llvm::ARM
- AEK_HWDIVTHUMB
: llvm::ARM
- AEK_INVALID
: llvm::AArch64
, llvm::ARM
- AEK_IWMMXT
: llvm::ARM
- AEK_IWMMXT2
: llvm::ARM
- AEK_LSE
: llvm::AArch64
- AEK_MAVERICK
: llvm::ARM
- AEK_MP
: llvm::ARM
- AEK_MTE
: llvm::AArch64
- AEK_NONE
: llvm::AArch64
, llvm::ARM
- AEK_OS
: llvm::ARM
- AEK_PREDRES
: llvm::AArch64
- AEK_PROFILE
: llvm::AArch64
- AEK_RAND
: llvm::AArch64
- AEK_RAS
: llvm::AArch64
, llvm::ARM
- AEK_RCPC
: llvm::AArch64
- AEK_RDM
: llvm::AArch64
- AEK_SB
: llvm::AArch64
, llvm::ARM
- AEK_SEC
: llvm::ARM
- AEK_SHA2
: llvm::AArch64
, llvm::ARM
- AEK_SHA3
: llvm::AArch64
- AEK_SIMD
: llvm::AArch64
, llvm::ARM
- AEK_SM4
: llvm::AArch64
- AEK_SSBS
: llvm::AArch64
- AEK_SVE
: llvm::AArch64
, llvm::ARM
- AEK_VIRT
: llvm::ARM
- AEK_XSCALE
: llvm::ARM
- AFL_ASE
: llvm::Mips
- AFL_ASE_CRC
: llvm::Mips
- AFL_ASE_DSP
: llvm::Mips
- AFL_ASE_DSPR2
: llvm::Mips
- AFL_ASE_EVA
: llvm::Mips
- AFL_ASE_GINV
: llvm::Mips
- AFL_ASE_MCU
: llvm::Mips
- AFL_ASE_MDMX
: llvm::Mips
- AFL_ASE_MICROMIPS
: llvm::Mips
- AFL_ASE_MIPS16
: llvm::Mips
- AFL_ASE_MIPS3D
: llvm::Mips
- AFL_ASE_MSA
: llvm::Mips
- AFL_ASE_MT
: llvm::Mips
- AFL_ASE_SMARTMIPS
: llvm::Mips
- AFL_ASE_VIRT
: llvm::Mips
- AFL_ASE_XPA
: llvm::Mips
- AFL_EXT
: llvm::Mips
- AFL_EXT_10000
: llvm::Mips
- AFL_EXT_3900
: llvm::Mips
- AFL_EXT_4010
: llvm::Mips
- AFL_EXT_4100
: llvm::Mips
- AFL_EXT_4111
: llvm::Mips
- AFL_EXT_4120
: llvm::Mips
- AFL_EXT_4650
: llvm::Mips
- AFL_EXT_5400
: llvm::Mips
- AFL_EXT_5500
: llvm::Mips
- AFL_EXT_5900
: llvm::Mips
- AFL_EXT_LOONGSON_2E
: llvm::Mips
- AFL_EXT_LOONGSON_2F
: llvm::Mips
- AFL_EXT_LOONGSON_3A
: llvm::Mips
- AFL_EXT_NONE
: llvm::Mips
- AFL_EXT_OCTEON
: llvm::Mips
- AFL_EXT_OCTEON2
: llvm::Mips
- AFL_EXT_OCTEON3
: llvm::Mips
- AFL_EXT_OCTEONP
: llvm::Mips
- AFL_EXT_SB1
: llvm::Mips
- AFL_EXT_XLR
: llvm::Mips
- AFL_FLAGS1
: llvm::Mips
- AFL_FLAGS1_ODDSPREG
: llvm::Mips
- AFL_REG
: llvm::Mips
- AFL_REG_128
: llvm::Mips
- AFL_REG_32
: llvm::Mips
- AFL_REG_64
: llvm::Mips
- AFL_REG_NONE
: llvm::Mips
- AfterLegalizeDAG
: llvm
- AfterLegalizeTypes
: llvm
- AfterLegalizeVectorOps
: llvm
- AGGREGATE_ALIGN
: llvm
- Aggressive
: llvm::CodeGenOpt
- AL
: llvm::AArch64CC
, llvm::ARCCC
, llvm::ARMCC
- AliasAnalysis
: llvm
- AliasAttrs
: llvm::cflaa
- AliasResult
: llvm
- Align
: llvm::AMDGPU::HSAMD::Kernel::Arg::Key
- Align4Byte
: llvm::ARMBuildAttrs
- Align8Byte
: llvm::ARMBuildAttrs
- alignAddr()
: llvm
- alignDown()
: llvm
- aligned
: llvm::support
- aligned_big16_t
: llvm::support
- aligned_big32_t
: llvm::support
- aligned_big64_t
: llvm::support
- aligned_little16_t
: llvm::support
- aligned_little32_t
: llvm::support
- aligned_little64_t
: llvm::support
- aligned_ubig16_t
: llvm::support
- aligned_ubig32_t
: llvm::support
- aligned_ubig64_t
: llvm::support
- aligned_ulittle16_t
: llvm::support
- aligned_ulittle32_t
: llvm::support
- aligned_ulittle64_t
: llvm::support
- alignmentAdjustment()
: llvm
- AlignNotPreserved
: llvm::ARMBuildAttrs
- alignOf()
: llvm::codeview
- AlignPreserve8Byte
: llvm::ARMBuildAttrs
- AlignPreserveAll
: llvm::ARMBuildAttrs
- AlignReserved
: llvm::ARMBuildAttrs
- AlignStyle
: llvm
- alignTo()
: llvm
- AlignTypeEnum
: llvm
- All
: llvm::FramePointer
- all()
: llvm::LegalityPredicates
- all_all
: llvm::sys::fs
- all_exe
: llvm::sys::fs
- all_of()
: llvm
- all_perms
: llvm::sys::fs
- all_read
: llvm::sys::fs
- all_write
: llvm::sys::fs
- ALLOCA
: llvm::HexagonISD
- allocate_buffer()
: llvm
- allocSummary()
: llvm::IndexedInstrProf
- AllocUnit
: llvm::ms_demangle
- allocValueProfData()
: llvm
- allocValueProfDataInstrProf()
: llvm
- allOperandsUndef()
: llvm::ISD
- AllowContract
: llvm::bitc
- AllowDIVExt
: llvm::ARMBuildAttrs
- AllowDIVIfExists
: llvm::ARMBuildAttrs
- Allowed
: llvm::ARMBuildAttrs
- AllowFPARMv8A
: llvm::ARMBuildAttrs
- AllowFPARMv8B
: llvm::ARMBuildAttrs
- AllowFPv2
: llvm::ARMBuildAttrs
- AllowFPv3A
: llvm::ARMBuildAttrs
- AllowFPv3B
: llvm::ARMBuildAttrs
- AllowFPv4A
: llvm::ARMBuildAttrs
- AllowFPv4B
: llvm::ARMBuildAttrs
- AllowHPFP
: llvm::ARMBuildAttrs
- AllowIEEE754
: llvm::ARMBuildAttrs
- AllowIEEENormal
: llvm::ARMBuildAttrs
- AllowMP
: llvm::ARMBuildAttrs
- AllowNeon
: llvm::ARMBuildAttrs
- AllowNeon2
: llvm::ARMBuildAttrs
- AllowNeonARMv8
: llvm::ARMBuildAttrs
- AllowNeonARMv8_1a
: llvm::ARMBuildAttrs
- AllowReassoc
: llvm::bitc
- AllowReciprocal
: llvm::bitc
- AllowRTABI
: llvm::ARMBuildAttrs
- AllowThumb32
: llvm::ARMBuildAttrs
- AllowThumbDerived
: llvm::ARMBuildAttrs
- AllowTZ
: llvm::ARMBuildAttrs
- AllowTZVirtualization
: llvm::ARMBuildAttrs
- AllowVirtualization
: llvm::ARMBuildAttrs
- AllowWMMXv1
: llvm::ARMBuildAttrs
- AllowWMMXv2
: llvm::ARMBuildAttrs
- AllSubCommands
: llvm::cl
- also_compatible_with
: llvm::ARMBuildAttrs
- ALU_INST
: R600_InstFlag
- AluCode
: llvm::LPAC
- AlwaysPrefix
: llvm::cl
- AM3_I_BitShift
: llvm::ARMII
- amdgcn_alignbit
: llvm::Intrinsic
- amdgcn_alignbyte
: llvm::Intrinsic
- amdgcn_atomic_dec
: llvm::Intrinsic
- amdgcn_atomic_inc
: llvm::Intrinsic
- amdgcn_buffer_atomic_add
: llvm::Intrinsic
- amdgcn_buffer_atomic_and
: llvm::Intrinsic
- amdgcn_buffer_atomic_cmpswap
: llvm::Intrinsic
- amdgcn_buffer_atomic_or
: llvm::Intrinsic
- amdgcn_buffer_atomic_smax
: llvm::Intrinsic
- amdgcn_buffer_atomic_smin
: llvm::Intrinsic
- amdgcn_buffer_atomic_sub
: llvm::Intrinsic
- amdgcn_buffer_atomic_swap
: llvm::Intrinsic
- amdgcn_buffer_atomic_umax
: llvm::Intrinsic
- amdgcn_buffer_atomic_umin
: llvm::Intrinsic
- amdgcn_buffer_atomic_xor
: llvm::Intrinsic
- amdgcn_buffer_load
: llvm::Intrinsic
- amdgcn_buffer_load_format
: llvm::Intrinsic
- amdgcn_buffer_store
: llvm::Intrinsic
- amdgcn_buffer_store_format
: llvm::Intrinsic
- amdgcn_buffer_wbinvl1
: llvm::Intrinsic
- amdgcn_buffer_wbinvl1_sc
: llvm::Intrinsic
- amdgcn_buffer_wbinvl1_vol
: llvm::Intrinsic
- amdgcn_class
: llvm::Intrinsic
- amdgcn_cos
: llvm::Intrinsic
- amdgcn_cubeid
: llvm::Intrinsic
- amdgcn_cubema
: llvm::Intrinsic
- amdgcn_cubesc
: llvm::Intrinsic
- amdgcn_cubetc
: llvm::Intrinsic
- amdgcn_cvt_pk_i16
: llvm::Intrinsic
- amdgcn_cvt_pk_u16
: llvm::Intrinsic
- amdgcn_cvt_pk_u8_f32
: llvm::Intrinsic
- amdgcn_cvt_pknorm_i16
: llvm::Intrinsic
- amdgcn_cvt_pknorm_u16
: llvm::Intrinsic
- amdgcn_cvt_pkrtz
: llvm::Intrinsic
- amdgcn_dispatch_id
: llvm::Intrinsic
- amdgcn_dispatch_ptr
: llvm::Intrinsic
- amdgcn_div_fixup
: llvm::Intrinsic
- amdgcn_div_fmas
: llvm::Intrinsic
- amdgcn_div_scale
: llvm::Intrinsic
- amdgcn_ds_bpermute
: llvm::Intrinsic
- amdgcn_ds_fadd
: llvm::Intrinsic
- amdgcn_ds_fmax
: llvm::Intrinsic
- amdgcn_ds_fmin
: llvm::Intrinsic
- amdgcn_ds_ordered_add
: llvm::Intrinsic
- amdgcn_ds_ordered_swap
: llvm::Intrinsic
- amdgcn_ds_permute
: llvm::Intrinsic
- amdgcn_ds_swizzle
: llvm::Intrinsic
- amdgcn_else
: llvm::Intrinsic
- amdgcn_end_cf
: llvm::Intrinsic
- amdgcn_exp
: llvm::Intrinsic
- amdgcn_exp_compr
: llvm::Intrinsic
- amdgcn_fcmp
: llvm::Intrinsic
- amdgcn_fdiv_fast
: llvm::Intrinsic
- amdgcn_fdot2
: llvm::Intrinsic
- amdgcn_fmad_ftz
: llvm::Intrinsic
- amdgcn_fmed3
: llvm::Intrinsic
- amdgcn_fmul_legacy
: llvm::Intrinsic
- amdgcn_fract
: llvm::Intrinsic
- amdgcn_frexp_exp
: llvm::Intrinsic
- amdgcn_frexp_mant
: llvm::Intrinsic
- amdgcn_groupstaticsize
: llvm::Intrinsic
- amdgcn_icmp
: llvm::Intrinsic
- amdgcn_if
: llvm::Intrinsic
- amdgcn_if_break
: llvm::Intrinsic
- amdgcn_image_atomic_add_1d
: llvm::Intrinsic
- amdgcn_image_atomic_add_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_add_2d
: llvm::Intrinsic
- amdgcn_image_atomic_add_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_add_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_add_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_add_3d
: llvm::Intrinsic
- amdgcn_image_atomic_add_cube
: llvm::Intrinsic
- amdgcn_image_atomic_and_1d
: llvm::Intrinsic
- amdgcn_image_atomic_and_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_and_2d
: llvm::Intrinsic
- amdgcn_image_atomic_and_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_and_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_and_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_and_3d
: llvm::Intrinsic
- amdgcn_image_atomic_and_cube
: llvm::Intrinsic
- amdgcn_image_atomic_cmpswap_1d
: llvm::Intrinsic
- amdgcn_image_atomic_cmpswap_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_cmpswap_2d
: llvm::Intrinsic
- amdgcn_image_atomic_cmpswap_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_cmpswap_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_cmpswap_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_cmpswap_3d
: llvm::Intrinsic
- amdgcn_image_atomic_cmpswap_cube
: llvm::Intrinsic
- amdgcn_image_atomic_dec_1d
: llvm::Intrinsic
- amdgcn_image_atomic_dec_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_dec_2d
: llvm::Intrinsic
- amdgcn_image_atomic_dec_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_dec_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_dec_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_dec_3d
: llvm::Intrinsic
- amdgcn_image_atomic_dec_cube
: llvm::Intrinsic
- amdgcn_image_atomic_inc_1d
: llvm::Intrinsic
- amdgcn_image_atomic_inc_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_inc_2d
: llvm::Intrinsic
- amdgcn_image_atomic_inc_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_inc_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_inc_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_inc_3d
: llvm::Intrinsic
- amdgcn_image_atomic_inc_cube
: llvm::Intrinsic
- amdgcn_image_atomic_or_1d
: llvm::Intrinsic
- amdgcn_image_atomic_or_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_or_2d
: llvm::Intrinsic
- amdgcn_image_atomic_or_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_or_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_or_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_or_3d
: llvm::Intrinsic
- amdgcn_image_atomic_or_cube
: llvm::Intrinsic
- amdgcn_image_atomic_smax_1d
: llvm::Intrinsic
- amdgcn_image_atomic_smax_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_smax_2d
: llvm::Intrinsic
- amdgcn_image_atomic_smax_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_smax_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_smax_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_smax_3d
: llvm::Intrinsic
- amdgcn_image_atomic_smax_cube
: llvm::Intrinsic
- amdgcn_image_atomic_smin_1d
: llvm::Intrinsic
- amdgcn_image_atomic_smin_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_smin_2d
: llvm::Intrinsic
- amdgcn_image_atomic_smin_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_smin_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_smin_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_smin_3d
: llvm::Intrinsic
- amdgcn_image_atomic_smin_cube
: llvm::Intrinsic
- amdgcn_image_atomic_sub_1d
: llvm::Intrinsic
- amdgcn_image_atomic_sub_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_sub_2d
: llvm::Intrinsic
- amdgcn_image_atomic_sub_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_sub_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_sub_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_sub_3d
: llvm::Intrinsic
- amdgcn_image_atomic_sub_cube
: llvm::Intrinsic
- amdgcn_image_atomic_swap_1d
: llvm::Intrinsic
- amdgcn_image_atomic_swap_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_swap_2d
: llvm::Intrinsic
- amdgcn_image_atomic_swap_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_swap_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_swap_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_swap_3d
: llvm::Intrinsic
- amdgcn_image_atomic_swap_cube
: llvm::Intrinsic
- amdgcn_image_atomic_umax_1d
: llvm::Intrinsic
- amdgcn_image_atomic_umax_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_umax_2d
: llvm::Intrinsic
- amdgcn_image_atomic_umax_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_umax_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_umax_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_umax_3d
: llvm::Intrinsic
- amdgcn_image_atomic_umax_cube
: llvm::Intrinsic
- amdgcn_image_atomic_umin_1d
: llvm::Intrinsic
- amdgcn_image_atomic_umin_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_umin_2d
: llvm::Intrinsic
- amdgcn_image_atomic_umin_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_umin_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_umin_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_umin_3d
: llvm::Intrinsic
- amdgcn_image_atomic_umin_cube
: llvm::Intrinsic
- amdgcn_image_atomic_xor_1d
: llvm::Intrinsic
- amdgcn_image_atomic_xor_1darray
: llvm::Intrinsic
- amdgcn_image_atomic_xor_2d
: llvm::Intrinsic
- amdgcn_image_atomic_xor_2darray
: llvm::Intrinsic
- amdgcn_image_atomic_xor_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_atomic_xor_2dmsaa
: llvm::Intrinsic
- amdgcn_image_atomic_xor_3d
: llvm::Intrinsic
- amdgcn_image_atomic_xor_cube
: llvm::Intrinsic
- amdgcn_image_gather4_2d
: llvm::Intrinsic
- amdgcn_image_gather4_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_b_2d
: llvm::Intrinsic
- amdgcn_image_gather4_b_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_b_cl_2d
: llvm::Intrinsic
- amdgcn_image_gather4_b_cl_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_b_cl_cube
: llvm::Intrinsic
- amdgcn_image_gather4_b_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_b_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_b_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_b_cube
: llvm::Intrinsic
- amdgcn_image_gather4_b_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_b_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_b_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_cl_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_cl_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_cl_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_b_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_cl_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_cl_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_cl_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_l_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_l_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_l_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_l_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_l_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_l_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_lz_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_lz_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_lz_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_lz_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_lz_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_lz_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_c_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_c_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_c_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_cl_2d
: llvm::Intrinsic
- amdgcn_image_gather4_cl_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_cl_cube
: llvm::Intrinsic
- amdgcn_image_gather4_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_cube
: llvm::Intrinsic
- amdgcn_image_gather4_l_2d
: llvm::Intrinsic
- amdgcn_image_gather4_l_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_l_cube
: llvm::Intrinsic
- amdgcn_image_gather4_l_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_l_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_l_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_lz_2d
: llvm::Intrinsic
- amdgcn_image_gather4_lz_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_lz_cube
: llvm::Intrinsic
- amdgcn_image_gather4_lz_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_lz_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_lz_o_cube
: llvm::Intrinsic
- amdgcn_image_gather4_o_2d
: llvm::Intrinsic
- amdgcn_image_gather4_o_2darray
: llvm::Intrinsic
- amdgcn_image_gather4_o_cube
: llvm::Intrinsic
- amdgcn_image_getlod_1d
: llvm::Intrinsic
- amdgcn_image_getlod_1darray
: llvm::Intrinsic
- amdgcn_image_getlod_2d
: llvm::Intrinsic
- amdgcn_image_getlod_2darray
: llvm::Intrinsic
- amdgcn_image_getlod_3d
: llvm::Intrinsic
- amdgcn_image_getlod_cube
: llvm::Intrinsic
- amdgcn_image_getresinfo_1d
: llvm::Intrinsic
- amdgcn_image_getresinfo_1darray
: llvm::Intrinsic
- amdgcn_image_getresinfo_2d
: llvm::Intrinsic
- amdgcn_image_getresinfo_2darray
: llvm::Intrinsic
- amdgcn_image_getresinfo_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_getresinfo_2dmsaa
: llvm::Intrinsic
- amdgcn_image_getresinfo_3d
: llvm::Intrinsic
- amdgcn_image_getresinfo_cube
: llvm::Intrinsic
- amdgcn_image_load_1d
: llvm::Intrinsic
- amdgcn_image_load_1darray
: llvm::Intrinsic
- amdgcn_image_load_2d
: llvm::Intrinsic
- amdgcn_image_load_2darray
: llvm::Intrinsic
- amdgcn_image_load_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_load_2dmsaa
: llvm::Intrinsic
- amdgcn_image_load_3d
: llvm::Intrinsic
- amdgcn_image_load_cube
: llvm::Intrinsic
- amdgcn_image_load_mip_1d
: llvm::Intrinsic
- amdgcn_image_load_mip_1darray
: llvm::Intrinsic
- amdgcn_image_load_mip_2d
: llvm::Intrinsic
- amdgcn_image_load_mip_2darray
: llvm::Intrinsic
- amdgcn_image_load_mip_3d
: llvm::Intrinsic
- amdgcn_image_load_mip_cube
: llvm::Intrinsic
- amdgcn_image_sample_1d
: llvm::Intrinsic
- amdgcn_image_sample_1darray
: llvm::Intrinsic
- amdgcn_image_sample_2d
: llvm::Intrinsic
- amdgcn_image_sample_2darray
: llvm::Intrinsic
- amdgcn_image_sample_3d
: llvm::Intrinsic
- amdgcn_image_sample_b_1d
: llvm::Intrinsic
- amdgcn_image_sample_b_1darray
: llvm::Intrinsic
- amdgcn_image_sample_b_2d
: llvm::Intrinsic
- amdgcn_image_sample_b_2darray
: llvm::Intrinsic
- amdgcn_image_sample_b_3d
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_1d
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_1darray
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_2d
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_2darray
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_3d
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_cube
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_b_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_b_cube
: llvm::Intrinsic
- amdgcn_image_sample_b_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_b_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_b_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_b_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_b_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_b_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_b_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_b_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_b_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_b_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_b_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_b_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_b_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_cd_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_d_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_d_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_d_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_d_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_d_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_d_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_d_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_d_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_l_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_l_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_l_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_l_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_l_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_l_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_l_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_l_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_l_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_l_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_l_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_l_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_lz_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_c_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_c_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_c_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_c_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_c_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_c_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_cd_1d
: llvm::Intrinsic
- amdgcn_image_sample_cd_1darray
: llvm::Intrinsic
- amdgcn_image_sample_cd_2d
: llvm::Intrinsic
- amdgcn_image_sample_cd_2darray
: llvm::Intrinsic
- amdgcn_image_sample_cd_3d
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_1d
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_1darray
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_2d
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_2darray
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_3d
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_cube
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_cd_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_cd_cube
: llvm::Intrinsic
- amdgcn_image_sample_cd_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_cd_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_cd_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_cd_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_cd_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_cd_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_cl_1d
: llvm::Intrinsic
- amdgcn_image_sample_cl_1darray
: llvm::Intrinsic
- amdgcn_image_sample_cl_2d
: llvm::Intrinsic
- amdgcn_image_sample_cl_2darray
: llvm::Intrinsic
- amdgcn_image_sample_cl_3d
: llvm::Intrinsic
- amdgcn_image_sample_cl_cube
: llvm::Intrinsic
- amdgcn_image_sample_cl_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_cl_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_cl_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_cube
: llvm::Intrinsic
- amdgcn_image_sample_d_1d
: llvm::Intrinsic
- amdgcn_image_sample_d_1darray
: llvm::Intrinsic
- amdgcn_image_sample_d_2d
: llvm::Intrinsic
- amdgcn_image_sample_d_2darray
: llvm::Intrinsic
- amdgcn_image_sample_d_3d
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_1d
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_1darray
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_2d
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_2darray
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_3d
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_cube
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_d_cl_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_d_cube
: llvm::Intrinsic
- amdgcn_image_sample_d_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_d_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_d_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_d_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_d_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_d_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_l_1d
: llvm::Intrinsic
- amdgcn_image_sample_l_1darray
: llvm::Intrinsic
- amdgcn_image_sample_l_2d
: llvm::Intrinsic
- amdgcn_image_sample_l_2darray
: llvm::Intrinsic
- amdgcn_image_sample_l_3d
: llvm::Intrinsic
- amdgcn_image_sample_l_cube
: llvm::Intrinsic
- amdgcn_image_sample_l_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_l_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_l_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_l_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_l_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_l_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_lz_1d
: llvm::Intrinsic
- amdgcn_image_sample_lz_1darray
: llvm::Intrinsic
- amdgcn_image_sample_lz_2d
: llvm::Intrinsic
- amdgcn_image_sample_lz_2darray
: llvm::Intrinsic
- amdgcn_image_sample_lz_3d
: llvm::Intrinsic
- amdgcn_image_sample_lz_cube
: llvm::Intrinsic
- amdgcn_image_sample_lz_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_lz_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_lz_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_lz_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_lz_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_lz_o_cube
: llvm::Intrinsic
- amdgcn_image_sample_o_1d
: llvm::Intrinsic
- amdgcn_image_sample_o_1darray
: llvm::Intrinsic
- amdgcn_image_sample_o_2d
: llvm::Intrinsic
- amdgcn_image_sample_o_2darray
: llvm::Intrinsic
- amdgcn_image_sample_o_3d
: llvm::Intrinsic
- amdgcn_image_sample_o_cube
: llvm::Intrinsic
- amdgcn_image_store_1d
: llvm::Intrinsic
- amdgcn_image_store_1darray
: llvm::Intrinsic
- amdgcn_image_store_2d
: llvm::Intrinsic
- amdgcn_image_store_2darray
: llvm::Intrinsic
- amdgcn_image_store_2darraymsaa
: llvm::Intrinsic
- amdgcn_image_store_2dmsaa
: llvm::Intrinsic
- amdgcn_image_store_3d
: llvm::Intrinsic
- amdgcn_image_store_cube
: llvm::Intrinsic
- amdgcn_image_store_mip_1d
: llvm::Intrinsic
- amdgcn_image_store_mip_1darray
: llvm::Intrinsic
- amdgcn_image_store_mip_2d
: llvm::Intrinsic
- amdgcn_image_store_mip_2darray
: llvm::Intrinsic
- amdgcn_image_store_mip_3d
: llvm::Intrinsic
- amdgcn_image_store_mip_cube
: llvm::Intrinsic
- amdgcn_implicit_buffer_ptr
: llvm::Intrinsic
- amdgcn_implicitarg_ptr
: llvm::Intrinsic
- amdgcn_init_exec
: llvm::Intrinsic
- amdgcn_init_exec_from_input
: llvm::Intrinsic
- amdgcn_interp_mov
: llvm::Intrinsic
- amdgcn_interp_p1
: llvm::Intrinsic
- amdgcn_interp_p2
: llvm::Intrinsic
- amdgcn_kernarg_segment_ptr
: llvm::Intrinsic
- amdgcn_kill
: llvm::Intrinsic
- amdgcn_ldexp
: llvm::Intrinsic
- amdgcn_lerp
: llvm::Intrinsic
- amdgcn_log_clamp
: llvm::Intrinsic
- amdgcn_loop
: llvm::Intrinsic
- amdgcn_mbcnt_hi
: llvm::Intrinsic
- amdgcn_mbcnt_lo
: llvm::Intrinsic
- amdgcn_mov_dpp
: llvm::Intrinsic
- amdgcn_mqsad_pk_u16_u8
: llvm::Intrinsic
- amdgcn_mqsad_u32_u8
: llvm::Intrinsic
- amdgcn_msad_u8
: llvm::Intrinsic
- amdgcn_ps_live
: llvm::Intrinsic
- amdgcn_qsad_pk_u16_u8
: llvm::Intrinsic
- amdgcn_queue_ptr
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_add
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_and
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_cmpswap
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_or
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_smax
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_smin
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_sub
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_swap
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_umax
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_umin
: llvm::Intrinsic
- amdgcn_raw_buffer_atomic_xor
: llvm::Intrinsic
- amdgcn_raw_buffer_load
: llvm::Intrinsic
- amdgcn_raw_buffer_load_format
: llvm::Intrinsic
- amdgcn_raw_buffer_store
: llvm::Intrinsic
- amdgcn_raw_buffer_store_format
: llvm::Intrinsic
- amdgcn_raw_tbuffer_load
: llvm::Intrinsic
- amdgcn_raw_tbuffer_store
: llvm::Intrinsic
- amdgcn_rcp
: llvm::Intrinsic
- amdgcn_rcp_legacy
: llvm::Intrinsic
- amdgcn_readfirstlane
: llvm::Intrinsic
- amdgcn_readlane
: llvm::Intrinsic
- amdgcn_rsq
: llvm::Intrinsic
- amdgcn_rsq_clamp
: llvm::Intrinsic
- amdgcn_rsq_legacy
: llvm::Intrinsic
- amdgcn_s_barrier
: llvm::Intrinsic
- amdgcn_s_buffer_load
: llvm::Intrinsic
- amdgcn_s_dcache_inv
: llvm::Intrinsic
- amdgcn_s_dcache_inv_vol
: llvm::Intrinsic
- amdgcn_s_dcache_wb
: llvm::Intrinsic
- amdgcn_s_dcache_wb_vol
: llvm::Intrinsic
- amdgcn_s_decperflevel
: llvm::Intrinsic
- amdgcn_s_getpc
: llvm::Intrinsic
- amdgcn_s_getreg
: llvm::Intrinsic
- amdgcn_s_incperflevel
: llvm::Intrinsic
- amdgcn_s_memrealtime
: llvm::Intrinsic
- amdgcn_s_memtime
: llvm::Intrinsic
- amdgcn_s_sendmsg
: llvm::Intrinsic
- amdgcn_s_sendmsghalt
: llvm::Intrinsic
- amdgcn_s_sleep
: llvm::Intrinsic
- amdgcn_s_waitcnt
: llvm::Intrinsic
- amdgcn_sad_hi_u8
: llvm::Intrinsic
- amdgcn_sad_u16
: llvm::Intrinsic
- amdgcn_sad_u8
: llvm::Intrinsic
- amdgcn_sbfe
: llvm::Intrinsic
- amdgcn_sdot2
: llvm::Intrinsic
- amdgcn_sdot4
: llvm::Intrinsic
- amdgcn_sdot8
: llvm::Intrinsic
- amdgcn_set_inactive
: llvm::Intrinsic
- amdgcn_sffbh
: llvm::Intrinsic
- amdgcn_sin
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_add
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_and
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_cmpswap
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_or
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_smax
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_smin
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_sub
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_swap
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_umax
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_umin
: llvm::Intrinsic
- amdgcn_struct_buffer_atomic_xor
: llvm::Intrinsic
- amdgcn_struct_buffer_load
: llvm::Intrinsic
- amdgcn_struct_buffer_load_format
: llvm::Intrinsic
- amdgcn_struct_buffer_store
: llvm::Intrinsic
- amdgcn_struct_buffer_store_format
: llvm::Intrinsic
- amdgcn_struct_tbuffer_load
: llvm::Intrinsic
- amdgcn_struct_tbuffer_store
: llvm::Intrinsic
- amdgcn_tbuffer_load
: llvm::Intrinsic
- amdgcn_tbuffer_store
: llvm::Intrinsic
- amdgcn_trig_preop
: llvm::Intrinsic
- amdgcn_ubfe
: llvm::Intrinsic
- amdgcn_udot2
: llvm::Intrinsic
- amdgcn_udot4
: llvm::Intrinsic
- amdgcn_udot8
: llvm::Intrinsic
- amdgcn_unreachable
: llvm::Intrinsic
- amdgcn_update_dpp
: llvm::Intrinsic
- amdgcn_wave_barrier
: llvm::Intrinsic
- amdgcn_workgroup_id_x
: llvm::Intrinsic
- amdgcn_workgroup_id_y
: llvm::Intrinsic
- amdgcn_workgroup_id_z
: llvm::Intrinsic
- amdgcn_workitem_id_x
: llvm::Intrinsic
- amdgcn_workitem_id_y
: llvm::Intrinsic
- amdgcn_workitem_id_z
: llvm::Intrinsic
- amdgcn_wqm
: llvm::Intrinsic
- amdgcn_wqm_vote
: llvm::Intrinsic
- amdgcn_writelane
: llvm::Intrinsic
- amdgcn_wwm
: llvm::Intrinsic
- AMDGPU_CS
: llvm::CallingConv
- AMDGPU_ES
: llvm::CallingConv
- AMDGPU_GS
: llvm::CallingConv
- AMDGPU_HS
: llvm::CallingConv
- AMDGPU_KERNEL
: llvm::CallingConv
- AMDGPU_LS
: llvm::CallingConv
- AMDGPU_PS
: llvm::CallingConv
- AMDGPU_VS
: llvm::CallingConv
- AMDGPUAnnotateKernelFeaturesID
: llvm
- AMDGPUAnnotateUniformValuesPassID
: llvm
- AMDGPUAtomicOptimizerID
: llvm
- AMDGPUCodeGenPrepareID
: llvm
- AMDGPUFixFunctionBitcastsID
: llvm
- AMDGPULowerIntrinsicsID
: llvm
- AMDGPULowerKernelArgumentsID
: llvm
- AMDGPULowerKernelAttributesID
: llvm
- AMDGPUMachineCFGStructurizerID
: llvm
- AMDGPUOpenCLEnqueuedBlockLoweringID
: llvm
- AMDGPUPerfHintAnalysisID
: llvm
- AMDGPUPromoteAllocaID
: llvm
- AMDGPURewriteOutArgumentsID
: llvm
- AMDGPUSimplifyLibCallsID
: llvm
- AMDGPUUnifyDivergentExitNodesID
: llvm
- AMDGPUUnifyMetadataID
: llvm
- AMDGPUUseNativeCallsID
: llvm
- AMSubMode
: llvm::ARM_AM
- AnalysisID
: llvm
- analyzeArguments()
: llvm
- analyzeBuiltinArguments()
: llvm
- analyzeLoadFromClobberingLoad()
: llvm::VNCoercion
- analyzeLoadFromClobberingMemInst()
: llvm::VNCoercion
- analyzeLoadFromClobberingStore()
: llvm::VNCoercion
- analyzeLoadFromClobberingWrite()
: llvm::VNCoercion
- analyzeStandardArguments()
: llvm
- AND
: llvm::ISD
, llvm::LPAC
, llvm::X86ISD
- ANDIo_1_EQ_BIT
: llvm::PPCISD
- ANDIo_1_GT_BIT
: llvm::PPCISD
- ANDNP
: llvm::X86ISD
- ANDS
: llvm::AArch64ISD
- annotateValueSite()
: llvm
- annotation
: llvm::Intrinsic
- ANNOTATION_LABEL
: llvm::ISD
- annotationCache
: llvm
- Any
: llvm::SystemZICMP
- any_cast()
: llvm
- ANY_EXTEND
: llvm::ISD
- ANY_EXTEND_VECTOR_INREG
: llvm::ISD
- any_isa()
: llvm
- any_of()
: llvm
- anyAggregateType()
: llvm::fuzzerop
- anyFloatType()
: llvm::fuzzerop
- anyIntType()
: llvm::fuzzerop
- anyPtrType()
: llvm::fuzzerop
- AnyReg
: llvm::CallingConv
- anyType()
: llvm::fuzzerop
- anyTypeToString()
: llvm::WebAssembly
- anyVectorType()
: llvm::fuzzerop
- AOK_Align
: llvm
- AOK_Emit
: llvm
- AOK_EndOfStatement
: llvm
- AOK_EVEN
: llvm
- AOK_Input
: llvm
- AOK_IntelExpr
: llvm
- AOK_Label
: llvm
- AOK_Output
: llvm
- AOK_SizeDirective
: llvm
- AOK_Skip
: llvm
- APFloat
: llvm::lltok
- append()
: llvm::object
, llvm::sys::path
- appendLoopsToWorklist()
: llvm::internal
- appendToCompilerUsed()
: llvm
- appendToGlobalCtors()
: llvm
- appendToGlobalDtors()
: llvm
- appendToUsed()
: llvm
- ApplePropertyAttributes
: llvm::dwarf
- ApplePropertyString()
: llvm::dwarf
- ApplicationProfile
: llvm::ARMBuildAttrs
- apply()
: llvm::cl
- apply_tuple()
: llvm
- apply_tuple_impl()
: llvm::detail
- applyMapping()
: llvm
- applyPPCha()
: llvm
- applyPPChi()
: llvm
- applyPPChigher()
: llvm
- applyPPChighera()
: llvm
- applyPPChighest()
: llvm
- applyPPChighesta()
: llvm
- applyPPClo()
: llvm
- applyR1()
: llvm::PBQP
- applyR2()
: llvm::PBQP
- ApplyUpdates()
: llvm::DomTreeBuilder
- ApplyUpdates< BBDomTree >()
: llvm::DomTreeBuilder
- ApplyUpdates< BBPostDomTree >()
: llvm::DomTreeBuilder
- ApproxFunc
: llvm::bitc
- ApproximateLoopSize()
: llvm
- APSInt
: llvm::lltok
- AR32Regs
: llvm::SystemZMC
- ArchEnum
: llvm::Hexagon
- ArchExtKind
: llvm::AArch64
, llvm::ARM
- ARCHExtNames
: llvm::ARM
- ArchFeatureKind
: llvm::AMDGPU
- ARCHITECTURE
: llvm::COFF
- ArchKind
: llvm::AArch64
, llvm::ARM
- ArchKinds
: llvm::AArch64
- ARCHNames
: llvm::ARM
- ARCInstKind
: llvm::objcarc
- ARCMDKindID
: llvm::objcarc
- ARCRuntimeEntryPointKind
: llvm::objcarc
- areInlineCompatible()
: llvm::AttributeFuncs
- AreStatisticsEnabled()
: llvm
- ArgFPRs
: llvm::SystemZ
- ArgGPRs
: llvm::SystemZ
- argNumberToAttr()
: llvm::cflaa
- Args
: llvm::AMDGPU::HSAMD::Kernel::Key
- ArgStringList
: llvm::opt
- ArithMiscFrm
: llvm::ARMII
- Arity
: llvm::JumpTable
- ARM64_RELOC_ADDEND
: llvm::MachO
- ARM64_RELOC_BRANCH26
: llvm::MachO
- ARM64_RELOC_GOT_LOAD_PAGE21
: llvm::MachO
- ARM64_RELOC_GOT_LOAD_PAGEOFF12
: llvm::MachO
- ARM64_RELOC_PAGE21
: llvm::MachO
- ARM64_RELOC_PAGEOFF12
: llvm::MachO
- ARM64_RELOC_POINTER_TO_GOT
: llvm::MachO
- ARM64_RELOC_SUBTRACTOR
: llvm::MachO
- ARM64_RELOC_TLVP_LOAD_PAGE21
: llvm::MachO
- ARM64_RELOC_TLVP_LOAD_PAGEOFF12
: llvm::MachO
- ARM64_RELOC_UNSIGNED
: llvm::MachO
- ARM_AAPCS
: llvm::CallingConv
- ARM_AAPCS_VFP
: llvm::CallingConv
- ARM_APCS
: llvm::CallingConv
- arm_cdp
: llvm::Intrinsic
- arm_cdp2
: llvm::Intrinsic
- arm_clrex
: llvm::Intrinsic
- arm_crc32b
: llvm::Intrinsic
- arm_crc32cb
: llvm::Intrinsic
- arm_crc32ch
: llvm::Intrinsic
- arm_crc32cw
: llvm::Intrinsic
- arm_crc32h
: llvm::Intrinsic
- arm_crc32w
: llvm::Intrinsic
- arm_dbg
: llvm::Intrinsic
- ARM_DEBUG_STATE
: llvm::MachO
- arm_dmb
: llvm::Intrinsic
- arm_dsb
: llvm::Intrinsic
- ARM_EXCEPTION_STATE
: llvm::MachO
- ARM_EXCEPTION_STATE64
: llvm::MachO
- ARM_FPU
: llvm::ARM
- arm_get_fpscr
: llvm::Intrinsic
- arm_hint
: llvm::Intrinsic
- ARM_ISA_use
: llvm::ARMBuildAttrs
- arm_isb
: llvm::Intrinsic
- arm_ldaex
: llvm::Intrinsic
- arm_ldaexd
: llvm::Intrinsic
- arm_ldc
: llvm::Intrinsic
- arm_ldc2
: llvm::Intrinsic
- arm_ldc2l
: llvm::Intrinsic
- arm_ldcl
: llvm::Intrinsic
- arm_ldrex
: llvm::Intrinsic
- arm_ldrexd
: llvm::Intrinsic
- arm_mcr
: llvm::Intrinsic
- arm_mcr2
: llvm::Intrinsic
- arm_mcrr
: llvm::Intrinsic
- arm_mcrr2
: llvm::Intrinsic
- arm_mrc
: llvm::Intrinsic
- arm_mrc2
: llvm::Intrinsic
- arm_mrrc
: llvm::Intrinsic
- arm_mrrc2
: llvm::Intrinsic
- arm_neon_aesd
: llvm::Intrinsic
- arm_neon_aese
: llvm::Intrinsic
- arm_neon_aesimc
: llvm::Intrinsic
- arm_neon_aesmc
: llvm::Intrinsic
- arm_neon_sdot
: llvm::Intrinsic
- arm_neon_sha1c
: llvm::Intrinsic
- arm_neon_sha1h
: llvm::Intrinsic
- arm_neon_sha1m
: llvm::Intrinsic
- arm_neon_sha1p
: llvm::Intrinsic
- arm_neon_sha1su0
: llvm::Intrinsic
- arm_neon_sha1su1
: llvm::Intrinsic
- arm_neon_sha256h
: llvm::Intrinsic
- arm_neon_sha256h2
: llvm::Intrinsic
- arm_neon_sha256su0
: llvm::Intrinsic
- arm_neon_sha256su1
: llvm::Intrinsic
- arm_neon_udot
: llvm::Intrinsic
- arm_neon_vabds
: llvm::Intrinsic
- arm_neon_vabdu
: llvm::Intrinsic
- arm_neon_vabs
: llvm::Intrinsic
- arm_neon_vacge
: llvm::Intrinsic
- arm_neon_vacgt
: llvm::Intrinsic
- arm_neon_vbsl
: llvm::Intrinsic
- arm_neon_vcls
: llvm::Intrinsic
- arm_neon_vcvtas
: llvm::Intrinsic
- arm_neon_vcvtau
: llvm::Intrinsic
- arm_neon_vcvtfp2fxs
: llvm::Intrinsic
- arm_neon_vcvtfp2fxu
: llvm::Intrinsic
- arm_neon_vcvtfp2hf
: llvm::Intrinsic
- arm_neon_vcvtfxs2fp
: llvm::Intrinsic
- arm_neon_vcvtfxu2fp
: llvm::Intrinsic
- arm_neon_vcvthf2fp
: llvm::Intrinsic
- arm_neon_vcvtms
: llvm::Intrinsic
- arm_neon_vcvtmu
: llvm::Intrinsic
- arm_neon_vcvtns
: llvm::Intrinsic
- arm_neon_vcvtnu
: llvm::Intrinsic
- arm_neon_vcvtps
: llvm::Intrinsic
- arm_neon_vcvtpu
: llvm::Intrinsic
- arm_neon_vhadds
: llvm::Intrinsic
- arm_neon_vhaddu
: llvm::Intrinsic
- arm_neon_vhsubs
: llvm::Intrinsic
- arm_neon_vhsubu
: llvm::Intrinsic
- arm_neon_vld1
: llvm::Intrinsic
- arm_neon_vld1x2
: llvm::Intrinsic
- arm_neon_vld1x3
: llvm::Intrinsic
- arm_neon_vld1x4
: llvm::Intrinsic
- arm_neon_vld2
: llvm::Intrinsic
- arm_neon_vld2dup
: llvm::Intrinsic
- arm_neon_vld2lane
: llvm::Intrinsic
- arm_neon_vld3
: llvm::Intrinsic
- arm_neon_vld3dup
: llvm::Intrinsic
- arm_neon_vld3lane
: llvm::Intrinsic
- arm_neon_vld4
: llvm::Intrinsic
- arm_neon_vld4dup
: llvm::Intrinsic
- arm_neon_vld4lane
: llvm::Intrinsic
- arm_neon_vmaxnm
: llvm::Intrinsic
- arm_neon_vmaxs
: llvm::Intrinsic
- arm_neon_vmaxu
: llvm::Intrinsic
- arm_neon_vminnm
: llvm::Intrinsic
- arm_neon_vmins
: llvm::Intrinsic
- arm_neon_vminu
: llvm::Intrinsic
- arm_neon_vmullp
: llvm::Intrinsic
- arm_neon_vmulls
: llvm::Intrinsic
- arm_neon_vmullu
: llvm::Intrinsic
- arm_neon_vmulp
: llvm::Intrinsic
- arm_neon_vpadals
: llvm::Intrinsic
- arm_neon_vpadalu
: llvm::Intrinsic
- arm_neon_vpadd
: llvm::Intrinsic
- arm_neon_vpaddls
: llvm::Intrinsic
- arm_neon_vpaddlu
: llvm::Intrinsic
- arm_neon_vpmaxs
: llvm::Intrinsic
- arm_neon_vpmaxu
: llvm::Intrinsic
- arm_neon_vpmins
: llvm::Intrinsic
- arm_neon_vpminu
: llvm::Intrinsic
- arm_neon_vqabs
: llvm::Intrinsic
- arm_neon_vqadds
: llvm::Intrinsic
- arm_neon_vqaddu
: llvm::Intrinsic
- arm_neon_vqdmulh
: llvm::Intrinsic
- arm_neon_vqdmull
: llvm::Intrinsic
- arm_neon_vqmovns
: llvm::Intrinsic
- arm_neon_vqmovnsu
: llvm::Intrinsic
- arm_neon_vqmovnu
: llvm::Intrinsic
- arm_neon_vqneg
: llvm::Intrinsic
- arm_neon_vqrdmulh
: llvm::Intrinsic
- arm_neon_vqrshiftns
: llvm::Intrinsic
- arm_neon_vqrshiftnsu
: llvm::Intrinsic
- arm_neon_vqrshiftnu
: llvm::Intrinsic
- arm_neon_vqrshifts
: llvm::Intrinsic
- arm_neon_vqrshiftu
: llvm::Intrinsic
- arm_neon_vqshiftns
: llvm::Intrinsic
- arm_neon_vqshiftnsu
: llvm::Intrinsic
- arm_neon_vqshiftnu
: llvm::Intrinsic
- arm_neon_vqshifts
: llvm::Intrinsic
- arm_neon_vqshiftsu
: llvm::Intrinsic
- arm_neon_vqshiftu
: llvm::Intrinsic
- arm_neon_vqsubs
: llvm::Intrinsic
- arm_neon_vqsubu
: llvm::Intrinsic
- arm_neon_vraddhn
: llvm::Intrinsic
- arm_neon_vrecpe
: llvm::Intrinsic
- arm_neon_vrecps
: llvm::Intrinsic
- arm_neon_vrhadds
: llvm::Intrinsic
- arm_neon_vrhaddu
: llvm::Intrinsic
- arm_neon_vrinta
: llvm::Intrinsic
- arm_neon_vrintm
: llvm::Intrinsic
- arm_neon_vrintn
: llvm::Intrinsic
- arm_neon_vrintp
: llvm::Intrinsic
- arm_neon_vrintx
: llvm::Intrinsic
- arm_neon_vrintz
: llvm::Intrinsic
- arm_neon_vrshiftn
: llvm::Intrinsic
- arm_neon_vrshifts
: llvm::Intrinsic
- arm_neon_vrshiftu
: llvm::Intrinsic
- arm_neon_vrsqrte
: llvm::Intrinsic
- arm_neon_vrsqrts
: llvm::Intrinsic
- arm_neon_vrsubhn
: llvm::Intrinsic
- arm_neon_vshiftins
: llvm::Intrinsic
- arm_neon_vshifts
: llvm::Intrinsic
- arm_neon_vshiftu
: llvm::Intrinsic
- arm_neon_vst1
: llvm::Intrinsic
- arm_neon_vst1x2
: llvm::Intrinsic
- arm_neon_vst1x3
: llvm::Intrinsic
- arm_neon_vst1x4
: llvm::Intrinsic
- arm_neon_vst2
: llvm::Intrinsic
- arm_neon_vst2lane
: llvm::Intrinsic
- arm_neon_vst3
: llvm::Intrinsic
- arm_neon_vst3lane
: llvm::Intrinsic
- arm_neon_vst4
: llvm::Intrinsic
- arm_neon_vst4lane
: llvm::Intrinsic
- arm_neon_vtbl1
: llvm::Intrinsic
- arm_neon_vtbl2
: llvm::Intrinsic
- arm_neon_vtbl3
: llvm::Intrinsic
- arm_neon_vtbl4
: llvm::Intrinsic
- arm_neon_vtbx1
: llvm::Intrinsic
- arm_neon_vtbx2
: llvm::Intrinsic
- arm_neon_vtbx3
: llvm::Intrinsic
- arm_neon_vtbx4
: llvm::Intrinsic
- arm_qadd
: llvm::Intrinsic
- arm_qadd16
: llvm::Intrinsic
- arm_qadd8
: llvm::Intrinsic
- arm_qasx
: llvm::Intrinsic
- arm_qsax
: llvm::Intrinsic
- arm_qsub
: llvm::Intrinsic
- arm_qsub16
: llvm::Intrinsic
- arm_qsub8
: llvm::Intrinsic
- ARM_RELOC_BR24
: llvm::MachO
- ARM_RELOC_HALF
: llvm::MachO
- ARM_RELOC_HALF_SECTDIFF
: llvm::MachO
- ARM_RELOC_LOCAL_SECTDIFF
: llvm::MachO
- ARM_RELOC_PAIR
: llvm::MachO
- ARM_RELOC_PB_LA_PTR
: llvm::MachO
- ARM_RELOC_SECTDIFF
: llvm::MachO
- ARM_RELOC_VANILLA
: llvm::MachO
- arm_sadd16
: llvm::Intrinsic
- arm_sadd8
: llvm::Intrinsic
- arm_sasx
: llvm::Intrinsic
- arm_sel
: llvm::Intrinsic
- arm_set_fpscr
: llvm::Intrinsic
- arm_shadd16
: llvm::Intrinsic
- arm_shadd8
: llvm::Intrinsic
- arm_shasx
: llvm::Intrinsic
- arm_shsax
: llvm::Intrinsic
- arm_shsub16
: llvm::Intrinsic
- arm_shsub8
: llvm::Intrinsic
- arm_smlabb
: llvm::Intrinsic
- arm_smlabt
: llvm::Intrinsic
- arm_smlad
: llvm::Intrinsic
- arm_smladx
: llvm::Intrinsic
- arm_smlald
: llvm::Intrinsic
- arm_smlaldx
: llvm::Intrinsic
- arm_smlatb
: llvm::Intrinsic
- arm_smlatt
: llvm::Intrinsic
- arm_smlawb
: llvm::Intrinsic
- arm_smlawt
: llvm::Intrinsic
- arm_smlsd
: llvm::Intrinsic
- arm_smlsdx
: llvm::Intrinsic
- arm_smlsld
: llvm::Intrinsic
- arm_smlsldx
: llvm::Intrinsic
- arm_smuad
: llvm::Intrinsic
- arm_smuadx
: llvm::Intrinsic
- arm_smulbb
: llvm::Intrinsic
- arm_smulbt
: llvm::Intrinsic
- arm_smultb
: llvm::Intrinsic
- arm_smultt
: llvm::Intrinsic
- arm_smulwb
: llvm::Intrinsic
- arm_smulwt
: llvm::Intrinsic
- arm_smusd
: llvm::Intrinsic
- arm_smusdx
: llvm::Intrinsic
- arm_space
: llvm::Intrinsic
- arm_ssat
: llvm::Intrinsic
- arm_ssat16
: llvm::Intrinsic
- arm_ssax
: llvm::Intrinsic
- arm_ssub16
: llvm::Intrinsic
- arm_ssub8
: llvm::Intrinsic
- arm_stc
: llvm::Intrinsic
- arm_stc2
: llvm::Intrinsic
- arm_stc2l
: llvm::Intrinsic
- arm_stcl
: llvm::Intrinsic
- arm_stlex
: llvm::Intrinsic
- arm_stlexd
: llvm::Intrinsic
- arm_strex
: llvm::Intrinsic
- arm_strexd
: llvm::Intrinsic
- arm_sxtab16
: llvm::Intrinsic
- arm_sxtb16
: llvm::Intrinsic
- ARM_THREAD_STATE
: llvm::MachO
- ARM_THREAD_STATE64
: llvm::MachO
- ARM_THREAD_STATE64_COUNT
: llvm::MachO
- ARM_THREAD_STATE_COUNT
: llvm::MachO
- ARM_THUMB_32BIT_BRANCH
: llvm::MachO
- ARM_THUMB_RELOC_BR22
: llvm::MachO
- arm_uadd16
: llvm::Intrinsic
- arm_uadd8
: llvm::Intrinsic
- arm_uasx
: llvm::Intrinsic
- arm_uhadd16
: llvm::Intrinsic
- arm_uhadd8
: llvm::Intrinsic
- arm_uhasx
: llvm::Intrinsic
- arm_uhsax
: llvm::Intrinsic
- arm_uhsub16
: llvm::Intrinsic
- arm_uhsub8
: llvm::Intrinsic
- arm_undefined
: llvm::Intrinsic
- arm_uqadd16
: llvm::Intrinsic
- arm_uqadd8
: llvm::Intrinsic
- arm_uqasx
: llvm::Intrinsic
- arm_uqsax
: llvm::Intrinsic
- arm_uqsub16
: llvm::Intrinsic
- arm_uqsub8
: llvm::Intrinsic
- arm_usad8
: llvm::Intrinsic
- arm_usada8
: llvm::Intrinsic
- arm_usat
: llvm::Intrinsic
- arm_usat16
: llvm::Intrinsic
- arm_usax
: llvm::Intrinsic
- arm_usub16
: llvm::Intrinsic
- arm_usub8
: llvm::Intrinsic
- arm_uxtab16
: llvm::Intrinsic
- arm_uxtb16
: llvm::Intrinsic
- arm_vcvtr
: llvm::Intrinsic
- arm_vcvtru
: llvm::Intrinsic
- ARM_VFP_STATE
: llvm::MachO
- ARMCondCodeFromString()
: llvm
- ARMCondCodeToString()
: llvm
- ARMCPKind
: llvm::ARMCP
- ARMCPModifier
: llvm::ARMCP
- ARMInsts
: llvm
- ARMThreadFlavors
: llvm::MachO
- ARN_THREAD_STATE_NONE
: llvm::MachO
- array_lengthof()
: llvm
- array_pod_sort()
: llvm
- array_pod_sort_comparator()
: llvm
- ArrayDimensionOrdering
: llvm::dwarf
- ArrayOrderString()
: llvm::dwarf
- arrayRefFromStringRef()
: llvm
- Asm
: llvm::HexStyle
- AsmComments
: llvm::X86
- AsmRewriteKind
: llvm
- AsmRewritePrecedence
: llvm
- ASR
: llvm::AArch64_AM
, llvm::AArch64SE
- asr
: llvm::ARM_AM
- ASR
: llvm::AVRISD
- ASRLOOP
: llvm::AVRISD
- AssemblerDirective
: llvm::AMDGPU::PALMD
- AssemblerDirectiveBegin
: llvm::AMDGPU::HSAMD
, llvm::AMDGPU::HSAMD::V3
- AssemblerDirectiveEnd
: llvm::AMDGPU::HSAMD
, llvm::AMDGPU::HSAMD::V3
- AssertSext
: llvm::ISD
- AssertZext
: llvm::ISD
- assume
: llvm::Intrinsic
- AT_GOT
: llvm::HexagonISD
- AT_PCREL
: llvm::HexagonISD
- ATOMIC_CMP_SWAP
: llvm::AMDGPUISD
, llvm::ISD
, llvm::SystemZISD
- ATOMIC_CMP_SWAP_128
: llvm::SystemZISD
- ATOMIC_CMP_SWAP_16
: llvm::PPCISD
- ATOMIC_CMP_SWAP_8
: llvm::PPCISD
- ATOMIC_CMP_SWAP_WITH_SUCCESS
: llvm::ISD
- ATOMIC_CMP_SWAPW
: llvm::SystemZISD
- ATOMIC_DEC
: llvm::AMDGPUISD
- ATOMIC_FENCE
: llvm::ISD
- ATOMIC_INC
: llvm::AMDGPUISD
- ATOMIC_LOAD
: llvm::ISD
- ATOMIC_LOAD_128
: llvm::SystemZISD
- ATOMIC_LOAD_ADD
: llvm::ISD
- ATOMIC_LOAD_AND
: llvm::ISD
- ATOMIC_LOAD_CLR
: llvm::ISD
- ATOMIC_LOAD_FADD
: llvm::AMDGPUISD
- ATOMIC_LOAD_FMAX
: llvm::AMDGPUISD
- ATOMIC_LOAD_FMIN
: llvm::AMDGPUISD
- ATOMIC_LOAD_MAX
: llvm::ISD
- ATOMIC_LOAD_MIN
: llvm::ISD
- ATOMIC_LOAD_NAND
: llvm::ISD
- ATOMIC_LOAD_OR
: llvm::ISD
- ATOMIC_LOAD_SUB
: llvm::ISD
- ATOMIC_LOAD_UMAX
: llvm::ISD
- ATOMIC_LOAD_UMIN
: llvm::ISD
- ATOMIC_LOAD_XOR
: llvm::ISD
- ATOMIC_LOADW_ADD
: llvm::SystemZISD
- ATOMIC_LOADW_AND
: llvm::SystemZISD
- ATOMIC_LOADW_MAX
: llvm::SystemZISD
- ATOMIC_LOADW_MIN
: llvm::SystemZISD
- ATOMIC_LOADW_NAND
: llvm::SystemZISD
- ATOMIC_LOADW_OR
: llvm::SystemZISD
- ATOMIC_LOADW_SUB
: llvm::SystemZISD
- ATOMIC_LOADW_UMAX
: llvm::SystemZISD
- ATOMIC_LOADW_UMIN
: llvm::SystemZISD
- ATOMIC_LOADW_XOR
: llvm::SystemZISD
- ATOMIC_STORE
: llvm::ISD
- ATOMIC_STORE_128
: llvm::SystemZISD
- ATOMIC_SWAP
: llvm::ISD
- ATOMIC_SWAPW
: llvm::SystemZISD
- AtomicExpandID
: llvm
- AtomicOrdering
: llvm
- atomicOrderingAtLeastOrStrongerThan()
: llvm::LegalityPredicates
- AtomicOrderingCABI
: llvm
- AtomicOrderingCodes
: llvm::bitc
- AtomTypeString()
: llvm::dwarf
- AtomValueString()
: llvm::dwarf
- ATTR_KIND_ALIGNMENT
: llvm::bitc
- ATTR_KIND_ALLOC_SIZE
: llvm::bitc
- ATTR_KIND_ALWAYS_INLINE
: llvm::bitc
- ATTR_KIND_ARGMEMONLY
: llvm::bitc
- ATTR_KIND_BUILTIN
: llvm::bitc
- ATTR_KIND_BY_VAL
: llvm::bitc
- ATTR_KIND_COLD
: llvm::bitc
- ATTR_KIND_CONVERGENT
: llvm::bitc
- ATTR_KIND_DEREFERENCEABLE
: llvm::bitc
- ATTR_KIND_DEREFERENCEABLE_OR_NULL
: llvm::bitc
- ATTR_KIND_IN_ALLOCA
: llvm::bitc
- ATTR_KIND_IN_REG
: llvm::bitc
- ATTR_KIND_INACCESSIBLEMEM_ONLY
: llvm::bitc
- ATTR_KIND_INACCESSIBLEMEM_OR_ARGMEMONLY
: llvm::bitc
- ATTR_KIND_INLINE_HINT
: llvm::bitc
- ATTR_KIND_JUMP_TABLE
: llvm::bitc
- ATTR_KIND_MIN_SIZE
: llvm::bitc
- ATTR_KIND_NAKED
: llvm::bitc
- ATTR_KIND_NEST
: llvm::bitc
- ATTR_KIND_NO_ALIAS
: llvm::bitc
- ATTR_KIND_NO_BUILTIN
: llvm::bitc
- ATTR_KIND_NO_CAPTURE
: llvm::bitc
- ATTR_KIND_NO_DUPLICATE
: llvm::bitc
- ATTR_KIND_NO_IMPLICIT_FLOAT
: llvm::bitc
- ATTR_KIND_NO_INLINE
: llvm::bitc
- ATTR_KIND_NO_RECURSE
: llvm::bitc
- ATTR_KIND_NO_RED_ZONE
: llvm::bitc
- ATTR_KIND_NO_RETURN
: llvm::bitc
- ATTR_KIND_NO_UNWIND
: llvm::bitc
- ATTR_KIND_NOCF_CHECK
: llvm::bitc
- ATTR_KIND_NON_LAZY_BIND
: llvm::bitc
- ATTR_KIND_NON_NULL
: llvm::bitc
- ATTR_KIND_OPT_FOR_FUZZING
: llvm::bitc
- ATTR_KIND_OPTIMIZE_FOR_SIZE
: llvm::bitc
- ATTR_KIND_OPTIMIZE_NONE
: llvm::bitc
- ATTR_KIND_READ_NONE
: llvm::bitc
- ATTR_KIND_READ_ONLY
: llvm::bitc
- ATTR_KIND_RETURNED
: llvm::bitc
- ATTR_KIND_RETURNS_TWICE
: llvm::bitc
- ATTR_KIND_S_EXT
: llvm::bitc
- ATTR_KIND_SAFESTACK
: llvm::bitc
- ATTR_KIND_SANITIZE_ADDRESS
: llvm::bitc
- ATTR_KIND_SANITIZE_HWADDRESS
: llvm::bitc
- ATTR_KIND_SANITIZE_MEMORY
: llvm::bitc
- ATTR_KIND_SANITIZE_THREAD
: llvm::bitc
- ATTR_KIND_SHADOWCALLSTACK
: llvm::bitc
- ATTR_KIND_SPECULATABLE
: llvm::bitc
- ATTR_KIND_SPECULATIVE_LOAD_HARDENING
: llvm::bitc
- ATTR_KIND_STACK_ALIGNMENT
: llvm::bitc
- ATTR_KIND_STACK_PROTECT
: llvm::bitc
- ATTR_KIND_STACK_PROTECT_REQ
: llvm::bitc
- ATTR_KIND_STACK_PROTECT_STRONG
: llvm::bitc
- ATTR_KIND_STRICT_FP
: llvm::bitc
- ATTR_KIND_STRUCT_RET
: llvm::bitc
- ATTR_KIND_SWIFT_ERROR
: llvm::bitc
- ATTR_KIND_SWIFT_SELF
: llvm::bitc
- ATTR_KIND_UW_TABLE
: llvm::bitc
- ATTR_KIND_WRITEONLY
: llvm::bitc
- ATTR_KIND_Z_EXT
: llvm::bitc
- ATTR_max
: llvm::X86Disassembler
- AttrGrpID
: llvm::lltok
- Attribute
: llvm::dwarf
- attributeBits
: llvm::X86Disassembler
- AttributeCodes
: llvm::bitc
- AttributeEncodingString()
: llvm::dwarf
- AttributeEncodingVendor()
: llvm::dwarf
- AttributeEncodingVersion()
: llvm::dwarf
- AttributeKindCodes
: llvm::bitc
- attributesPermitTailCall()
: llvm
- AttributeString()
: llvm::dwarf
- AttributeValueString()
: llvm::dwarf
- AttributeVendor()
: llvm::dwarf
- AttributeVersion()
: llvm::dwarf
- AttrMagic
: llvm::ARMBuildAttrs
- Attrs
: llvm::AMDGPU::HSAMD::Kernel::Key
- AttrType
: llvm::ARMBuildAttrs
- AttrTypeAsString()
: llvm::ARMBuildAttrs
- AttrTypeFromString()
: llvm::ARMBuildAttrs
- AutoreleasePoolBoundary
: llvm::objcarc
- AuxSymbolType
: llvm::COFF
- AVG
: llvm::X86ISD
- AVR_BUILTIN
: llvm::CallingConv
- AVR_INTR
: llvm::CallingConv
- AVR_SIGNAL
: llvm::CallingConv
- AVRDAGToDAGISel::select< AVRISD::CALL >()
: llvm
- AVRDAGToDAGISel::select< ISD::BRIND >()
: llvm
- AVRDAGToDAGISel::select< ISD::FrameIndex >()
: llvm
- AVRDAGToDAGISel::select< ISD::LOAD >()
: llvm
- AVRDAGToDAGISel::select< ISD::STORE >()
: llvm
- AVRDataLayout
: llvm