LLVM
8.0.1
- r -
R11ThunkName :
X86RetpolineThunks.cpp
R600ExpandSpecialInstrs :
R600ExpandSpecialInstrs.cpp
R600SchedRegistry :
AMDGPUTargetMachine.cpp
RA :
SIOptimizeExecMaskingPreRA.cpp
RawCategory :
RawError.cpp
rcsid :
jitprofiling.c
RDFCount :
HexagonRDFOpt.cpp
RDFDump :
HexagonRDFOpt.cpp
RDFLimit :
HexagonRDFOpt.cpp
ReadyListLimit :
MachineScheduler.cpp
reassociate :
NaryReassociate.cpp
reassociation :
NaryReassociate.cpp
RebalanceOnlyForOptimizations :
HexagonISelDAGToDAG.cpp
RebalanceOnlyImbalancedTrees :
HexagonISelDAGToDAG.cpp
RecursionMaxDepth :
SLPVectorizer.cpp
reduce :
LoopStrengthReduce.cpp
ReduceCRLogical :
PPCTargetMachine.cpp
ReduceLimit :
Thumb2SizeReduction.cpp
ReduceLimit2Addr :
Thumb2SizeReduction.cpp
ReduceLimitLdSt :
Thumb2SizeReduction.cpp
reduction :
StraightLineStrengthReduce.cpp
Reduction :
LoopStrengthReduce.cpp
reductions :
ExpandReductions.cpp
ReductionSize :
ScheduleDAGInstrs.cpp
Reg :
MachineSink.cpp
reg2mem :
Reg2Mem.cpp
RegAlloc :
TargetPassConfig.cpp
regallocbasic :
RegAllocBasic.cpp
RegBanks :
RegisterBankInfo.h
RegBankSelectMode :
RegBankSelect.cpp
RegexAdvancedMetachars :
TrigramIndex.cpp
RegexMetachars :
Regex.cpp
regions :
RegionInfo.cpp
,
MachineRegionInfo.cpp
Register :
Mem2Reg.cpp
RegisterNames :
EnumTables.cpp
RegisterPBQPRepAlloc :
RegAllocPBQP.cpp
RegPressureThreshold :
ResourcePriorityQueue.cpp
RegUsageInfoCollector :
RegUsageInfoCollector.cpp
RelaxNVChecks :
HexagonMCChecker.cpp
remainder :
DivRemPairs.cpp
RematerializationThreshold :
RewriteStatepointsForGC.cpp
ReMatPICStubLoad :
X86InstrInfo.cpp
Removal :
PPCVSXSwapRemoval.cpp
RemoveControlFlowFlag :
ADCE.cpp
RemoveLoops :
ADCE.cpp
renumberings :
SlotIndexes.cpp
ReplaceableCustomAVX2Instrs :
X86InstrInfo.cpp
ReplaceableCustomAVX512LogicInstrs :
X86InstrInfo.cpp
ReplaceableCustomInstrs :
X86InstrInfo.cpp
ReplaceableInstrs :
X86InstrInfo.cpp
ReplaceableInstrsAVX2 :
X86InstrInfo.cpp
ReplaceableInstrsAVX2InsertExtract :
X86InstrInfo.cpp
ReplaceableInstrsAVX512 :
X86InstrInfo.cpp
ReplaceableInstrsAVX512DQ :
X86InstrInfo.cpp
ReplaceableInstrsAVX512DQMasked :
X86InstrInfo.cpp
ReplaceCounter :
HexagonConstExtenders.cpp
ReplaceExitValue :
IndVarSimplify.cpp
ReplaceLimit :
HexagonConstExtenders.cpp
replacement :
CoroElide.cpp
rerrs :
regerror.c
ReserveAppRegisters :
SparcRegisterInfo.cpp
Results :
AliasAnalysis.cpp
reuse :
LoopInterchange.cpp
ReverseCSRRestoreSeq :
AArch64FrameLowering.cpp
ReverseST0Table :
X86FloatingPoint.cpp
ReverseSTiTable :
X86FloatingPoint.cpp
RewriteMapFiles :
SymbolRewriter.cpp
RewritePHILimit :
PeepholeOptimizer.cpp
Rewriter :
VirtRegMap.cpp
rotate :
LoopRotation.cpp
RoundGroups :
X86InstrFMA3Info.cpp
RPO :
FunctionAttrs.cpp
RPThreshold :
HexagonMachineScheduler.cpp
RUIP_NAME :
RegUsageInfoPropagate.cpp
RunLoopRerolling :
PassManagerBuilder.cpp
RunLoopVectorization :
PassManagerBuilder.cpp
RunNewGVN :
PassBuilder.cpp
,
PassManagerBuilder.cpp
RunPartialInlining :
PassBuilder.cpp
,
PassManagerBuilder.cpp
RunPGOInstrGen :
PassManagerBuilder.cpp
RunPGOInstrUse :
PassManagerBuilder.cpp
RunPreEmitPeephole :
PPCPreEmitPeephole.cpp
RunSLPAfterLoopVectorization :
PassManagerBuilder.cpp
RunSLPVectorization :
PassManagerBuilder.cpp
RuntimeMemoryCheckThreshold :
LoopAccessAnalysis.cpp
RuntimeMemSizeThreshold :
HexagonLoopIdiomRecognition.cpp
Generated on Sun Dec 20 2020 14:15:10 for LLVM by
1.8.13