LLVM
8.0.1
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Provides the logic to select generic machine instructions. More...
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
Classes | |
struct | ISelInfoTy |
struct | MatcherState |
Public Member Functions | |
virtual | ~InstructionSelector ()=default |
virtual bool | select (MachineInstr &I, CodeGenCoverage &CoverageInfo) const =0 |
Select the (possibly generic) instruction I to only use target-specific opcodes. More... | |
Protected Types | |
using | ComplexRendererFns = Optional< SmallVector< std::function< void(MachineInstrBuilder &)>, 4 > > |
using | RecordedMIVector = SmallVector< MachineInstr *, 4 > |
using | NewMIVector = SmallVector< MachineInstrBuilder, 4 > |
Protected Member Functions | |
InstructionSelector () | |
template<class TgtInstructionSelector , class PredicateBitset , class ComplexMatcherMemFn , class CustomRendererFn > | |
bool | executeMatchTable (TgtInstructionSelector &ISel, NewMIVector &OutMIs, MatcherState &State, const ISelInfoTy< PredicateBitset, ComplexMatcherMemFn, CustomRendererFn > &ISelInfo, const int64_t *MatchTable, const TargetInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI, const PredicateBitset &AvailableFeatures, CodeGenCoverage &CoverageInfo) const |
Execute a given matcher table and return true if the match was successful and false otherwise. More... | |
virtual const int64_t * | getMatchTable () const |
virtual bool | testImmPredicate_I64 (unsigned, int64_t) const |
virtual bool | testImmPredicate_APInt (unsigned, const APInt &) const |
virtual bool | testImmPredicate_APFloat (unsigned, const APFloat &) const |
virtual bool | testMIPredicate_MI (unsigned, const MachineInstr &) const |
bool | constrainOperandRegToRegClass (MachineInstr &I, unsigned OpIdx, const TargetRegisterClass &RC, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const |
Constrain a register operand of an instruction I to a specified register class. More... | |
bool | isOperandImmEqual (const MachineOperand &MO, int64_t Value, const MachineRegisterInfo &MRI) const |
bool | isBaseWithConstantOffset (const MachineOperand &Root, const MachineRegisterInfo &MRI) const |
Return true if the specified operand is a G_GEP with a G_CONSTANT on the right-hand side. More... | |
bool | isObviouslySafeToFold (MachineInstr &MI, MachineInstr &IntoMI) const |
Return true if MI can obviously be folded into IntoMI. More... | |
Provides the logic to select generic machine instructions.
Definition at line 345 of file InstructionSelector.h.
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Definition at line 363 of file InstructionSelector.h.
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Definition at line 365 of file InstructionSelector.h.
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Definition at line 364 of file InstructionSelector.h.
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Referenced by llvm::InstructionSelector::MatcherState::MatcherState().
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Constrain a register operand of an instruction I
to a specified register class.
This could involve inserting COPYs before (for uses) or after (for defs) and may replace the operand of I
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Definition at line 37 of file InstructionSelector.cpp.
References llvm::constrainRegToClass(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), and MRI.
Referenced by executeMatchTable().
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Execute a given matcher table and return true if the match was successful and false otherwise.
Definition at line 49 of file InstructionSelectorImpl.h.
References llvm::ARM_AM::add, assert(), llvm::BuildMI(), llvm::InstructionSelector::ISelInfoTy< PredicateBitset, ComplexMatcherMemFn, CustomRendererFn >::ComplexPredicates, constrainOperandRegToRegClass(), llvm::constrainSelectedInstRegOperands(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), llvm::InstructionSelector::ISelInfoTy< PredicateBitset, ComplexMatcherMemFn, CustomRendererFn >::CustomRenderers, llvm::dbgs(), DEBUG_WITH_TYPE, llvm::Default, llvm::SmallVectorBase::empty(), llvm::ConstantInt::equalsInt(), llvm::InstructionSelector::ISelInfoTy< PredicateBitset, ComplexMatcherMemFn, CustomRendererFn >::FeatureBitsets, llvm::MCInstrInfo::get(), llvm::MachineOperand::getCImm(), llvm::MachineFunction::getDataLayout(), llvm::MachineOperand::getIntrinsicID(), getName(), llvm::DataLayout::getPointerSizeInBits(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::RegisterBankInfo::getRegBankFromRegClass(), llvm::TargetRegisterInfo::getRegClass(), llvm::MachineMemOperand::getSize(), llvm::LLT::getSizeInBits(), llvm::getSizeInBits(), llvm::MachineRegisterInfo::getType(), llvm::Optional< T >::getValue(), llvm::MachineRegisterInfo::getVRegDef(), llvm::GIM_CheckAPFloatImmPredicate, llvm::GIM_CheckAPIntImmPredicate, llvm::GIM_CheckAtomicOrdering, llvm::GIM_CheckAtomicOrderingOrStrongerThan, llvm::GIM_CheckAtomicOrderingWeakerThan, llvm::GIM_CheckComplexPattern, llvm::GIM_CheckConstantInt, llvm::GIM_CheckCxxInsnPredicate, llvm::GIM_CheckFeatures, llvm::GIM_CheckI64ImmPredicate, llvm::GIM_CheckIntrinsicID, llvm::GIM_CheckIsMBB, llvm::GIM_CheckIsSafeToFold, llvm::GIM_CheckIsSameOperand, llvm::GIM_CheckLiteralInt, llvm::GIM_CheckMemorySizeEqualTo, llvm::GIM_CheckMemorySizeEqualToLLT, llvm::GIM_CheckMemorySizeGreaterThanLLT, llvm::GIM_CheckMemorySizeLessThanLLT, llvm::GIM_CheckNumOperands, llvm::GIM_CheckOpcode, llvm::GIM_CheckPointerToAny, llvm::GIM_CheckRegBankForClass, llvm::GIM_CheckType, llvm::GIM_RecordInsn, llvm::GIM_Reject, llvm::GIM_SwitchOpcode, llvm::GIM_SwitchType, llvm::GIM_Try, llvm::GIPFP_APFloat_Invalid, llvm::GIPFP_APInt_Invalid, llvm::GIPFP_I64_Invalid, llvm::GIPFP_MI_Invalid, llvm::GIR_AddImm, llvm::GIR_AddImplicitDef, llvm::GIR_AddImplicitUse, llvm::GIR_AddRegister, llvm::GIR_AddTempRegister, llvm::GIR_BuildMI, llvm::GIR_ComplexRenderer, llvm::GIR_ComplexSubOperandRenderer, llvm::GIR_ConstrainOperandRC, llvm::GIR_ConstrainSelectedInstOperands, llvm::GIR_Copy, llvm::GIR_CopyConstantAsSImm, llvm::GIR_CopyFConstantAsFPImm, llvm::GIR_CopyOrAddZeroReg, llvm::GIR_CopySubReg, llvm::GIR_Coverage, llvm::GIR_CustomRenderer, llvm::GIR_Done, llvm::GIR_EraseFromParent, llvm::GIR_MakeTempReg, llvm::GIR_MergeMemOperands, llvm::GIR_MutateOpcode, llvm::GIU_MergeMemOperands_EndOfList, llvm::Optional< T >::hasValue(), llvm::RegState::Implicit, llvm::isAtLeastOrStrongerThan(), llvm::MachineOperand::isCImm(), llvm::MachineOperand::isIntrinsicID(), isObviouslySafeToFold(), isOperandImmEqual(), llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::LLT::isPointer(), llvm::MachineOperand::isReg(), llvm::isStrongerThan(), llvm_unreachable, llvm::InstructionSelector::MatcherState::MIs, MRI, llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::InstructionSelector::MatcherState::Renderers, llvm::SmallVectorImpl< T >::resize(), llvm::CodeGenCoverage::setCovered(), llvm::SignExtend64(), Size, llvm::SmallVectorBase::size(), llvm::InstructionSelector::MatcherState::TempRegisters, testImmPredicate_APFloat(), testImmPredicate_APInt(), testImmPredicate_I64(), testMIPredicate_MI(), TII, TRI, llvm::InstructionSelector::ISelInfoTy< PredicateBitset, ComplexMatcherMemFn, CustomRendererFn >::TypeIDMap, and llvm::InstructionSelector::ISelInfoTy< PredicateBitset, ComplexMatcherMemFn, CustomRendererFn >::TypeObjects.
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Definition at line 415 of file InstructionSelector.h.
References llvm_unreachable.
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Return true if the specified operand is a G_GEP with a G_CONSTANT on the right-hand side.
GlobalISel's separation of pointer and integer types means that we don't need to worry about G_OR with equivalent semantics.
Definition at line 58 of file InstructionSelector.cpp.
References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getVRegDef(), and llvm::MachineOperand::isReg().
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Return true if MI can obviously be folded into IntoMI.
MI and IntoMI do not need to be in the same basic blocks, but MI must preceed IntoMI.
Definition at line 75 of file InstructionSelector.cpp.
References llvm::empty(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineInstr::getParent(), llvm::MachineInstr::hasUnmodeledSideEffects(), llvm::MachineInstr::implicit_operands(), and llvm::MachineInstr::mayLoadOrStore().
Referenced by executeMatchTable().
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Definition at line 49 of file InstructionSelector.cpp.
References llvm::getConstantVRegVal(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and MRI.
Referenced by executeMatchTable().
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Select the (possibly generic) instruction I
to only use target-specific opcodes.
It is OK to insert multiple instructions, but they cannot be generic pre-isel instructions.
Implemented in llvm::AMDGPUInstructionSelector.
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Definition at line 427 of file InstructionSelector.h.
References llvm_unreachable.
Referenced by executeMatchTable().
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Definition at line 423 of file InstructionSelector.h.
References llvm_unreachable.
Referenced by executeMatchTable().
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Definition at line 419 of file InstructionSelector.h.
References llvm_unreachable.
Referenced by executeMatchTable().
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Definition at line 431 of file InstructionSelector.h.
References llvm_unreachable, MI, MRI, TII, and TRI.
Referenced by executeMatchTable().