LLVM  8.0.1
Namespaces | Functions
Utils.h File Reference
#include "llvm/ADT/StringRef.h"
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Namespaces

 llvm
 This class represents lattice values for constants.
 

Functions

unsigned llvm::constrainRegToClass (MachineRegisterInfo &MRI, const TargetInstrInfo &TII, const RegisterBankInfo &RBI, MachineInstr &InsertPt, unsigned Reg, const TargetRegisterClass &RegClass)
 Try to constrain Reg to the specified register class. More...
 
unsigned llvm::constrainOperandRegClass (const MachineFunction &MF, const TargetRegisterInfo &TRI, MachineRegisterInfo &MRI, const TargetInstrInfo &TII, const RegisterBankInfo &RBI, MachineInstr &InsertPt, const MCInstrDesc &II, const MachineOperand &RegMO, unsigned OpIdx)
 Try to constrain Reg so that it is usable by argument OpIdx of the provided MCInstrDesc II. More...
 
bool llvm::constrainSelectedInstRegOperands (MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
 Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands to the instruction's register class. More...
 
bool llvm::isTriviallyDead (const MachineInstr &MI, const MachineRegisterInfo &MRI)
 Check whether an instruction MI is dead: it only defines dead virtual registers, and doesn't have other side effects. More...
 
void llvm::reportGISelFailure (MachineFunction &MF, const TargetPassConfig &TPC, MachineOptimizationRemarkEmitter &MORE, MachineOptimizationRemarkMissed &R)
 Report an ISel error as a missed optimization remark to the LLVMContext's diagnostic stream. More...
 
void llvm::reportGISelFailure (MachineFunction &MF, const TargetPassConfig &TPC, MachineOptimizationRemarkEmitter &MORE, const char *PassName, StringRef Msg, const MachineInstr &MI)
 
Optional< int64_t > llvm::getConstantVRegVal (unsigned VReg, const MachineRegisterInfo &MRI)
 
const ConstantFPllvm::getConstantFPVRegVal (unsigned VReg, const MachineRegisterInfo &MRI)
 
MachineInstrllvm::getOpcodeDef (unsigned Opcode, unsigned Reg, const MachineRegisterInfo &MRI)
 See if Reg is defined by an single def instruction that is Opcode. More...
 
APFloat llvm::getAPFloatFromSize (double Val, unsigned Size)
 Returns an APFloat from Val converted to the appropriate size. More...
 
void llvm::getSelectionDAGFallbackAnalysisUsage (AnalysisUsage &AU)
 Modify analysis usage so it preserves passes required for the SelectionDAG fallback. More...
 
Optional< APIntllvm::ConstantFoldBinOp (unsigned Opcode, const unsigned Op1, const unsigned Op2, const MachineRegisterInfo &MRI)