31 #define DEBUG_TYPE "asm-printer" 33 #include "WebAssemblyGenAsmWriter.inc" 41 unsigned RegNo)
const {
60 if (i != 0 && ((MI->
getOpcode() != WebAssembly::CALL_INDIRECT_VOID &&
61 MI->
getOpcode() != WebAssembly::CALL_INDIRECT_VOID_S) ||
79 case WebAssembly::LOOP_S:
81 ControlFlowStack.
push_back(std::make_pair(ControlFlowCounter++,
true));
84 case WebAssembly::BLOCK:
85 case WebAssembly::BLOCK_S:
86 ControlFlowStack.
push_back(std::make_pair(ControlFlowCounter++,
false));
89 case WebAssembly::TRY:
90 case WebAssembly::TRY_S:
91 ControlFlowStack.
push_back(std::make_pair(ControlFlowCounter++,
false));
92 EHPadStack.
push_back(EHPadStackCounter++);
96 case WebAssembly::END_LOOP:
97 case WebAssembly::END_LOOP_S:
98 if (ControlFlowStack.
empty()) {
106 case WebAssembly::END_BLOCK_S:
107 if (ControlFlowStack.
empty()) {
115 case WebAssembly::END_TRY:
116 case WebAssembly::END_TRY_S:
117 if (ControlFlowStack.
empty()) {
122 LastSeenEHInst = END_TRY;
126 case WebAssembly::CATCH_I32:
127 case WebAssembly::CATCH_I32_S:
128 case WebAssembly::CATCH_I64:
129 case WebAssembly::CATCH_I64_S:
130 case WebAssembly::CATCH_ALL:
131 case WebAssembly::CATCH_ALL_S:
134 if (LastSeenEHInst != CATCH) {
135 if (EHPadStack.
empty()) {
142 LastSeenEHInst = CATCH;
151 if (i < NumFixedOperands) {
164 if (!Printed.
insert(Depth).second)
167 if (Opc == WebAssembly::RETHROW || Opc == WebAssembly::RETHROW_S) {
168 if (Depth > EHPadStack.
size()) {
170 }
else if (Depth == EHPadStack.
size()) {
181 if (Depth >= ControlFlowStack.
size()) {
184 const auto &Pair = ControlFlowStack.
rbegin()[
Depth];
186 (Pair.second ?
"up" :
"down") +
" to label" +
200 return std::string(AI.
isNegative() ?
"-" :
"") +
"nan:0x" +
203 : INT64_C(0x000fffffffffffff)),
208 static const size_t BufBytes = 128;
214 assert(Written < BufBytes);
222 unsigned WAReg = Op.
getReg();
234 }
else if (Op.
isImm()) {
248 assert(Op.
isExpr() &&
"unknown operand kind in printOperand");
270 O <<
":p2align=" << Imm;
304 return "invalid_type";
32-bit floating-point immediates.
void printWebAssemblySignatureOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
uint64_t getZExtValue() const
Get zero extended value.
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
This class represents lattice values for constants.
void push_back(const T &Elt)
This class prints an WebAssembly MCInst to wasm file syntax.
Describe properties that are true of each instruction in the target description file.
void printWebAssemblyP2AlignOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
Basic block label in a branch construct.
const char * anyTypeToString(unsigned Ty)
const fltSemantics & getSemantics() const
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end...
WebAssemblyInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
unsigned getBitWidth() const
Return the number of bits in the APInt.
std::string toString(Error E)
Write all error messages (if any) in E to a string.
unsigned getNumOperands() const
Return the number of declared MachineOperands for this MachineInstruction.
unsigned getReg() const
Returns the register number.
uint8_t OperandType
Information about the type of the operand.
void printBrList(const MCInst *MI, unsigned OpNo, raw_ostream &O)
const MCExpr * getExpr() const
Analysis containing CSE Info
Instances of this class represent a single low-level machine instruction.
unsigned short NumOperands
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
bool isNegative() const
Determine sign of this APInt.
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
unsigned const MachineRegisterInfo * MRI
bool isVariadic() const
Return true if this instruction can have a variable number of operands.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
This file provides WebAssembly-specific target descriptions.
Interface to description of machine instruction set.
unsigned getNumOperands() const
unsigned GetDefaultP2Align(unsigned Opcode)
Return the default p2align value for a load or store with the given opcode.
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
static const unsigned UnusedReg
void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
const MCOperand & getOperand(unsigned i) const
LLVM_NODISCARD T pop_back_val()
raw_ostream * CommentStream
A stream that comments can be emitted to if desired.
std::string utostr(uint64_t X, bool isNeg=false)
Class for arbitrary precision integers.
64-bit floating-point immediates.
unsigned int convertToHexString(char *DST, unsigned int HexDigits, bool UpperCase, roundingMode RM) const
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
LLVM_NODISCARD bool empty() const
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
This file declares WebAssembly-specific per-machine-function information.
Generic base class for all target subtargets.
void printInstruction(const MCInst *MI, raw_ostream &O)
reverse_iterator rbegin()
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
bool bitwiseIsEqual(const APFloat &RHS) const
const MCOperandInfo * OpInfo
This class implements an extremely fast bulk output stream that can only output to a stream...
StringRef - Represent a constant reference to a string, i.e.
APInt bitcastToAPInt() const
This holds information about one operand of a machine instruction, indicating the register class for ...
unsigned getOpcode() const
const char * typeToString(wasm::ValType Ty)
Instances of this class represent operands of the MCInst class.
static APFloat getQNaN(const fltSemantics &Sem, bool Negative=false, const APInt *payload=nullptr)
Factory for QNaN values.
std::string utohexstr(uint64_t X, bool LowerCase=false)
static unsigned getWARegStackId(unsigned Reg)