ARM_AM - ARM Addressing Mode Stuff. More...

Enumerations
enum	ShiftOpc { no_shift = 0, asr, lsl, lsr, ror, rrx }

enum	AddrOpc { sub = 0, add }

enum	AMSubMode { bad_am_submode = 0, ia, ib, da, db }

Functions
static ShiftOpc	getShiftOpcForNode (unsigned Opcode)

const char *	getAddrOpcStr (AddrOpc Op)

const char *	getShiftOpcStr (ShiftOpc Op)

unsigned	getShiftOpcEncoding (ShiftOpc Op)

const char *	getAMSubModeStr (AMSubMode Mode)

unsigned	rotr32 (unsigned Val, unsigned Amt)
	rotr32 - Rotate a 32-bit unsigned value right by a specified # bits. More...

unsigned	rotl32 (unsigned Val, unsigned Amt)
	rotl32 - Rotate a 32-bit unsigned value left by a specified # bits. More...

unsigned	getSORegOpc (ShiftOpc ShOp, unsigned Imm)

unsigned	getSORegOffset (unsigned Op)

ShiftOpc	getSORegShOp (unsigned Op)

unsigned	getSOImmValImm (unsigned Imm)
	getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value. More...

unsigned	getSOImmValRot (unsigned Imm)
	getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount. More...

unsigned	getSOImmValRotate (unsigned Imm)
	getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use. More...

int	getSOImmVal (unsigned Arg)
	getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immediate operand, return the 12-bit encoding for it. More...

bool	isSOImmTwoPartVal (unsigned V)
	isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's. More...

unsigned	getSOImmTwoPartFirst (unsigned V)
	getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it. More...

unsigned	getSOImmTwoPartSecond (unsigned V)
	getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it. More...

unsigned	getThumbImmValShift (unsigned Imm)
	getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift. More...

bool	isThumbImmShiftedVal (unsigned V)
	isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate. More...

unsigned	getThumbImm16ValShift (unsigned Imm)
	getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift. More...

bool	isThumbImm16ShiftedVal (unsigned V)
	isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit immediate. More...

unsigned	getThumbImmNonShiftedVal (unsigned V)
	getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value. More...

int	getT2SOImmValSplatVal (unsigned V)
	getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained by splatting the low 8 bits into every other byte or every byte of a 32-bit value. More...

int	getT2SOImmValRotateVal (unsigned V)
	getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated 8-bit value. More...

int	getT2SOImmVal (unsigned Arg)
	getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit into a Thumb-2 shifter_operand immediate operand, return the 12-bit encoding for it. More...

unsigned	getT2SOImmValRotate (unsigned V)

bool	isT2SOImmTwoPartVal (unsigned Imm)

unsigned	getT2SOImmTwoPartFirst (unsigned Imm)

unsigned	getT2SOImmTwoPartSecond (unsigned Imm)

unsigned	getAM2Opc (AddrOpc Opc, unsigned Imm12, ShiftOpc SO, unsigned IdxMode=0)

unsigned	getAM2Offset (unsigned AM2Opc)

AddrOpc	getAM2Op (unsigned AM2Opc)

ShiftOpc	getAM2ShiftOpc (unsigned AM2Opc)

unsigned	getAM2IdxMode (unsigned AM2Opc)

unsigned	getAM3Opc (AddrOpc Opc, unsigned char Offset, unsigned IdxMode=0)
	getAM3Opc - This function encodes the addrmode3 opc field. More...

unsigned char	getAM3Offset (unsigned AM3Opc)

AddrOpc	getAM3Op (unsigned AM3Opc)

unsigned	getAM3IdxMode (unsigned AM3Opc)

AMSubMode	getAM4SubMode (unsigned Mode)

unsigned	getAM4ModeImm (AMSubMode SubMode)

unsigned	getAM5Opc (AddrOpc Opc, unsigned char Offset)
	getAM5Opc - This function encodes the addrmode5 opc field. More...

unsigned char	getAM5Offset (unsigned AM5Opc)

AddrOpc	getAM5Op (unsigned AM5Opc)

unsigned	getAM5FP16Opc (AddrOpc Opc, unsigned char Offset)
	getAM5FP16Opc - This function encodes the addrmode5fp16 opc field. More...

unsigned char	getAM5FP16Offset (unsigned AM5Opc)

AddrOpc	getAM5FP16Op (unsigned AM5Opc)

unsigned	createNEONModImm (unsigned OpCmode, unsigned Val)

unsigned	getNEONModImmOpCmode (unsigned ModImm)

unsigned	getNEONModImmVal (unsigned ModImm)

uint64_t	decodeNEONModImm (unsigned ModImm, unsigned &EltBits)
	decodeNEONModImm - Decode a NEON modified immediate value into the element value and the element size in bits. More...

bool	isNEONBytesplat (unsigned Value, unsigned Size)

bool	isNEONi16splat (unsigned Value)
	Checks if Value is a correct immediate for instructions like VBIC/VORR. More...

unsigned	encodeNEONi16splat (unsigned Value)

bool	isNEONi32splat (unsigned Value)
	Checks if Value is a correct immediate for instructions like VBIC/VORR. More...

unsigned	encodeNEONi32splat (unsigned Value)
	Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR. More...

float	getFPImmFloat (unsigned Imm)

int	getFP16Imm (const APInt &Imm)
	getFP16Imm - Return an 8-bit floating-point version of the 16-bit floating-point value. More...

int	getFP16Imm (const APFloat &FPImm)

int	getFP32Imm (const APInt &Imm)
	getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value. More...

int	getFP32Imm (const APFloat &FPImm)

int	getFP64Imm (const APInt &Imm)
	getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value. More...

int	getFP64Imm (const APFloat &FPImm)

Detailed Description

ARM_AM - ARM Addressing Mode Stuff.

Enumeration Type Documentation

◆ AddrOpc

enum llvm::ARM_AM::AddrOpc

Enumerator
sub
add

Definition at line 37 of file ARMAddressingModes.h.

◆ AMSubMode

enum llvm::ARM_AM::AMSubMode

Enumerator
bad_am_submode
ia
ib
da
db

Definition at line 65 of file ARMAddressingModes.h.

◆ ShiftOpc

enum llvm::ARM_AM::ShiftOpc

Enumerator
no_shift
asr
lsl
lsr
ror
rrx

Definition at line 28 of file ARMAddressingModes.h.

Function Documentation

◆ createNEONModImm()

unsigned llvm::ARM_AM::createNEONModImm	(	unsigned	OpCmode,
		unsigned	Val
	)

inline

Definition at line 531 of file ARMAddressingModes.h.

Referenced by isNEONModifiedImm(), and LowerVectorINT_TO_FP().

◆ decodeNEONModImm()

uint64_t llvm::ARM_AM::decodeNEONModImm	(	unsigned	ModImm,
		unsigned &	EltBits
	)

inline

decodeNEONModImm - Decode a NEON modified immediate value into the element value and the element size in bits.

(If the element size is smaller than the vector, it is splatted into all the elements.)

Definition at line 542 of file ARMAddressingModes.h.

References getNEONModImmOpCmode(), getNEONModImmVal(), llvm::X86II::Imm8, and llvm_unreachable.

Referenced by PerformVDUPLANECombine(), and llvm::ARMInstPrinter::printNEONModImmOperand().

◆ encodeNEONi16splat()

unsigned llvm::ARM_AM::encodeNEONi16splat ( unsigned Value )

inline

Definition at line 599 of file ARMAddressingModes.h.

References assert(), and isNEONi16splat().

◆ encodeNEONi32splat()

unsigned llvm::ARM_AM::encodeNEONi32splat ( unsigned Value )

inline

Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR.

Definition at line 615 of file ARMAddressingModes.h.

References assert(), and isNEONi32splat().

◆ getAddrOpcStr()

const char* llvm::ARM_AM::getAddrOpcStr ( AddrOpc Op )

inline

Definition at line 42 of file ARMAddressingModes.h.

References sub.

Referenced by llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAddrMode5FP16Operand(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp().

◆ getAM2IdxMode()

unsigned llvm::ARM_AM::getAM2IdxMode ( unsigned AM2Opc )

inline

Definition at line 413 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstPrinter::printAddrMode2Operand().

◆ getAM2Offset()

unsigned llvm::ARM_AM::getAM2Offset ( unsigned AM2Opc )

inline

Definition at line 404 of file ARMAddressingModes.h.

Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getNumMicroOpsSwiftLdSt(), llvm::ARMBaseInstrInfo::getOperandLatency(), HasConditionalBranch(), llvm::ARMBaseInstrInfo::isLdstScaledRegNotPlusLsl2(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().

◆ getAM2Op()

AddrOpc llvm::ARM_AM::getAM2Op ( unsigned AM2Opc )

inline

Definition at line 407 of file ARMAddressingModes.h.

References add, and sub.

Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getNumMicroOpsSwiftLdSt(), HasConditionalBranch(), llvm::ARMBaseInstrInfo::isLdstScaledRegNotPlusLsl2(), llvm::ARMBaseInstrInfo::isLdstSoMinusReg(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().

◆ getAM2Opc()

unsigned llvm::ARM_AM::getAM2Opc	(	AddrOpc	Opc,
		unsigned	Imm12,
		ShiftOpc	SO,
		unsigned	IdxMode = `0`
	)

inline

Definition at line 398 of file ARMAddressingModes.h.

References assert(), and sub.

Referenced by DecodeAddrMode2IdxInstruction(), DecodeSORegMemOperand(), getPostIndexedLoadStoreOpcode(), and llvm::ARMFrameLowering::ResolveFrameIndexReference().

◆ getAM2ShiftOpc()

ShiftOpc llvm::ARM_AM::getAM2ShiftOpc ( unsigned AM2Opc )

inline

Definition at line 410 of file ARMAddressingModes.h.

Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), getNumMicroOpsSwiftLdSt(), llvm::ARMBaseInstrInfo::getOperandLatency(), HasConditionalBranch(), llvm::ARMBaseInstrInfo::isAm2ScaledReg(), llvm::ARMBaseInstrInfo::isLdstScaledReg(), llvm::ARMBaseInstrInfo::isLdstScaledRegNotPlusLsl2(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), and llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp().

◆ getAM3IdxMode()

unsigned llvm::ARM_AM::getAM3IdxMode ( unsigned AM3Opc )

inline

Definition at line 439 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstPrinter::printAddrMode3Operand().

◆ getAM3Offset()

unsigned char llvm::ARM_AM::getAM3Offset ( unsigned AM3Opc )

inline

Definition at line 435 of file ARMAddressingModes.h.

Referenced by llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), HasConditionalBranch(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().

◆ getAM3Op()

AddrOpc llvm::ARM_AM::getAM3Op ( unsigned AM3Opc )

inline

Definition at line 436 of file ARMAddressingModes.h.

References add, and sub.

Referenced by llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), getNumMicroOpsSwiftLdSt(), HasConditionalBranch(), llvm::ARMBaseInstrInfo::isAddrMode3OpMinusReg(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().

◆ getAM3Opc()

unsigned llvm::ARM_AM::getAM3Opc	(	AddrOpc	Opc,
		unsigned char	Offset,
		unsigned	IdxMode = `0`
	)

inline

getAM3Opc - This function encodes the addrmode3 opc field.

Definition at line 430 of file ARMAddressingModes.h.

References sub.

Referenced by IsSafeAndProfitableToMove().

◆ getAM4ModeImm()

unsigned llvm::ARM_AM::getAM4ModeImm ( AMSubMode SubMode )

inline

Definition at line 460 of file ARMAddressingModes.h.

◆ getAM4SubMode()

AMSubMode llvm::ARM_AM::getAM4SubMode ( unsigned Mode )

inline

Definition at line 456 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstPrinter::printLdStmModeOperand().

◆ getAM5FP16Offset()

unsigned char llvm::ARM_AM::getAM5FP16Offset ( unsigned AM5Opc )

inline

Definition at line 499 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstPrinter::printAddrMode5FP16Operand(), and llvm::rewriteT2FrameIndex().

◆ getAM5FP16Op()

AddrOpc llvm::ARM_AM::getAM5FP16Op ( unsigned AM5Opc )

inline

Definition at line 502 of file ARMAddressingModes.h.

References add, and sub.

Referenced by llvm::ARMInstPrinter::printAddrMode5FP16Operand(), and llvm::rewriteT2FrameIndex().

◆ getAM5FP16Opc()

unsigned llvm::ARM_AM::getAM5FP16Opc	(	AddrOpc	Opc,
		unsigned char	Offset
	)

inline

getAM5FP16Opc - This function encodes the addrmode5fp16 opc field.

Definition at line 495 of file ARMAddressingModes.h.

References sub.

Referenced by DecodeAddrMode5FP16Operand().

◆ getAM5Offset()

unsigned char llvm::ARM_AM::getAM5Offset ( unsigned AM5Opc )

inline

Definition at line 478 of file ARMAddressingModes.h.

Referenced by llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), getPostIndexedLoadStoreOpcode(), HasConditionalBranch(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().

◆ getAM5Op()

AddrOpc llvm::ARM_AM::getAM5Op ( unsigned AM5Opc )

inline

Definition at line 479 of file ARMAddressingModes.h.

References add, and sub.

Referenced by llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), HasConditionalBranch(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().

◆ getAM5Opc()

unsigned llvm::ARM_AM::getAM5Opc	(	AddrOpc	Opc,
		unsigned char	Offset
	)

inline

getAM5Opc - This function encodes the addrmode5 opc field.

Definition at line 474 of file ARMAddressingModes.h.

References sub.

Referenced by DecodeAddrMode5Operand(), and DecodeCopMemInstruction().

◆ getAMSubModeStr()

const char* llvm::ARM_AM::getAMSubModeStr ( AMSubMode Mode )

inline

Definition at line 73 of file ARMAddressingModes.h.

References da, db, ia, ib, and llvm_unreachable.

Referenced by llvm::ARMInstPrinter::printLdStmModeOperand().

◆ getFP16Imm() [1/2]

int llvm::ARM_AM::getFP16Imm ( const APInt & Imm )

inline

getFP16Imm - Return an 8-bit floating-point version of the 16-bit floating-point value.

If the value cannot be represented as an 8-bit floating-point value, then return -1.

Definition at line 652 of file ARMAddressingModes.h.

References llvm::APInt::getSExtValue(), llvm::APInt::getZExtValue(), and llvm::APInt::lshr().

Referenced by getFP16Imm(), and llvm::ARMTargetLowering::isFPImmLegal().

◆ getFP16Imm() [2/2]

int llvm::ARM_AM::getFP16Imm ( const APFloat & FPImm )

inline

Definition at line 671 of file ARMAddressingModes.h.

References llvm::APFloat::bitcastToAPInt(), and getFP16Imm().

◆ getFP32Imm() [1/2]

int llvm::ARM_AM::getFP32Imm ( const APInt & Imm )

inline

getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value.

If the value cannot be represented as an 8-bit floating-point value, then return -1.

Definition at line 678 of file ARMAddressingModes.h.

References llvm::APInt::getSExtValue(), llvm::APInt::getZExtValue(), and llvm::APInt::lshr().

Referenced by getFP32Imm(), llvm::ARMTargetLowering::isFPImmLegal(), isNEONModifiedImm(), and IsSingleInstrConstant().

◆ getFP32Imm() [2/2]

int llvm::ARM_AM::getFP32Imm ( const APFloat & FPImm )

inline

Definition at line 699 of file ARMAddressingModes.h.

References llvm::APFloat::bitcastToAPInt(), and getFP32Imm().

◆ getFP64Imm() [1/2]

int llvm::ARM_AM::getFP64Imm ( const APInt & Imm )

inline

getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value.

If the value cannot be represented as an 8-bit floating-point value, then return -1.

Definition at line 706 of file ARMAddressingModes.h.

References llvm::APInt::getSExtValue(), llvm::APInt::getZExtValue(), and llvm::APInt::lshr().

Referenced by getFP64Imm(), llvm::ARMTargetLowering::isFPImmLegal(), and isNEONModifiedImm().

◆ getFP64Imm() [2/2]

int llvm::ARM_AM::getFP64Imm ( const APFloat & FPImm )

inline

Definition at line 727 of file ARMAddressingModes.h.

References llvm::APFloat::bitcastToAPInt(), and getFP64Imm().

◆ getFPImmFloat()

float llvm::ARM_AM::getFPImmFloat ( unsigned Imm )

inline

Definition at line 629 of file ARMAddressingModes.h.

References llvm::bit_cast(), and I.

Referenced by llvm::ARMInstPrinter::printFPImmOperand().

◆ getNEONModImmOpCmode()

unsigned llvm::ARM_AM::getNEONModImmOpCmode ( unsigned ModImm )

inline

Definition at line 534 of file ARMAddressingModes.h.

Referenced by decodeNEONModImm().

◆ getNEONModImmVal()

unsigned llvm::ARM_AM::getNEONModImmVal ( unsigned ModImm )

inline

Definition at line 537 of file ARMAddressingModes.h.

Referenced by decodeNEONModImm().

◆ getShiftOpcEncoding()

unsigned llvm::ARM_AM::getShiftOpcEncoding ( ShiftOpc Op )

inline

Definition at line 55 of file ARMAddressingModes.h.

References asr, llvm_unreachable, lsl, lsr, and ror.

◆ getShiftOpcForNode()

static ShiftOpc llvm::ARM_AM::getShiftOpcForNode ( unsigned Opcode )

inlinestatic

Definition at line 24 of file ARMSelectionDAGInfo.h.

References asr, lsl, lsr, no_shift, ror, llvm::ISD::ROTR, llvm::ISD::SHL, llvm::ISD::SRA, and llvm::ISD::SRL.

Referenced by getARMIndexedAddressParts(), isFloatingPointZero(), and isPerfectIncrement().

◆ getShiftOpcStr()

const char* llvm::ARM_AM::getShiftOpcStr ( ShiftOpc Op )

inline

Definition at line 44 of file ARMAddressingModes.h.

References asr, llvm_unreachable, lsl, lsr, ror, and rrx.

Referenced by llvm::ARMInstPrinter::printInst(), printRegImmShift(), and llvm::ARMInstPrinter::printSORegRegOperand().

◆ getSOImmTwoPartFirst()

unsigned llvm::ARM_AM::getSOImmTwoPartFirst ( unsigned V )

inline

getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it.

Definition at line 192 of file ARMAddressingModes.h.

References getSOImmValRotate(), and rotr32().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and makeImplicit().

◆ getSOImmTwoPartSecond()

unsigned llvm::ARM_AM::getSOImmTwoPartSecond ( unsigned V )

inline

getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it.

Definition at line 198 of file ARMAddressingModes.h.

References assert(), getSOImmValRotate(), and rotr32().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and makeImplicit().

◆ getSOImmVal()

int llvm::ARM_AM::getSOImmVal ( unsigned Arg )

inline

getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immediate operand, return the 12-bit encoding for it.

If not, return -1.

Definition at line 162 of file ARMAddressingModes.h.

References Arg, getSOImmValRotate(), rotl32(), and rotr32().

Referenced by llvm::ARMAsmBackend::adjustFixupValue(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::emitARMRegPlusImmediate(), getComparePred(), llvm::ARMTTIImpl::getIntImmCost(), getRealVLDOpcode(), HasConditionalBranch(), llvm::ARMTargetLowering::isLegalAddImmediate(), llvm::ARMTargetLowering::isLegalICmpImmediate(), IsSingleInstrConstant(), llvm::LowerARMMachineInstrToMCInst(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMInstPrinter::printModImmOperand(), and llvm::rewriteARMFrameIndex().

◆ getSOImmValImm()

unsigned llvm::ARM_AM::getSOImmValImm ( unsigned Imm )

inline

getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value.

Definition at line 119 of file ARMAddressingModes.h.

◆ getSOImmValRot()

unsigned llvm::ARM_AM::getSOImmValRot ( unsigned Imm )

inline

getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount.

Definition at line 122 of file ARMAddressingModes.h.

◆ getSOImmValRotate()

unsigned llvm::ARM_AM::getSOImmValRotate ( unsigned Imm )

inline

getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use.

If this immediate value cannot be handled with a single shifter-op, determine a good rotate amount that will take a maximal chunk of bits out of the immediate.

Definition at line 128 of file ARMAddressingModes.h.

References llvm::countTrailingZeros(), and rotr32().

Referenced by llvm::emitARMRegPlusImmediate(), getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), isSOImmTwoPartVal(), and llvm::rewriteARMFrameIndex().

◆ getSORegOffset()

unsigned llvm::ARM_AM::getSORegOffset ( unsigned Op )

inline

Definition at line 114 of file ARMAddressingModes.h.

Referenced by getRealVLDOpcode(), HasConditionalBranch(), llvm::ARMBaseInstrInfo::isSwiftFastImmShift(), llvm::ARMInstPrinter::printInst(), llvm::ARMInstPrinter::printSORegImmOperand(), llvm::ARMInstPrinter::printSORegRegOperand(), and llvm::ARMInstPrinter::printT2SOOperand().

◆ getSORegOpc()

unsigned llvm::ARM_AM::getSORegOpc	(	ShiftOpc	ShOp,
		unsigned	Imm
	)

inline

Definition at line 111 of file ARMAddressingModes.h.

Referenced by addExclusiveRegPair(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), emitAligningInstructions(), getComparePred(), getContiguousRangeOfSetBits(), getRealVLDOpcode(), isPerfectIncrement(), and llvm::ARMTargetLowering::ReplaceNodeResults().

◆ getSORegShOp()

ShiftOpc llvm::ARM_AM::getSORegShOp ( unsigned Op )

inline

Definition at line 115 of file ARMAddressingModes.h.

Referenced by getRealVLDOpcode(), HasConditionalBranch(), llvm::ARMBaseInstrInfo::isSwiftFastImmShift(), llvm::ARMInstPrinter::printInst(), llvm::ARMInstPrinter::printSORegImmOperand(), llvm::ARMInstPrinter::printSORegRegOperand(), and llvm::ARMInstPrinter::printT2SOOperand().

◆ getT2SOImmTwoPartFirst()

unsigned llvm::ARM_AM::getT2SOImmTwoPartFirst ( unsigned Imm )

inline

Definition at line 353 of file ARMAddressingModes.h.

References assert(), getT2SOImmVal(), getT2SOImmValRotate(), getT2SOImmValSplatVal(), isT2SOImmTwoPartVal(), and rotr32().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and getT2SOImmTwoPartSecond().

◆ getT2SOImmTwoPartSecond()

unsigned llvm::ARM_AM::getT2SOImmTwoPartSecond ( unsigned Imm )

inline

Definition at line 370 of file ARMAddressingModes.h.

References assert(), getT2SOImmTwoPartFirst(), and getT2SOImmVal().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate().

◆ getT2SOImmVal()

int llvm::ARM_AM::getT2SOImmVal ( unsigned Arg )

inline

getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit into a Thumb-2 shifter_operand immediate operand, return the 12-bit encoding for it.

If not, return -1. See ARM Reference Manual A6.3.2.

Definition at line 305 of file ARMAddressingModes.h.

References getT2SOImmValRotateVal(), and getT2SOImmValSplatVal().

Referenced by llvm::ARMAsmBackend::adjustFixupValue(), llvm::emitT2RegPlusImmediate(), getComparePred(), llvm::ARMTTIImpl::getIntImmCost(), getRealVLDOpcode(), getT2SOImmTwoPartFirst(), getT2SOImmTwoPartSecond(), llvm::ARMTargetLowering::isLegalAddImmediate(), llvm::ARMTargetLowering::isLegalICmpImmediate(), isT2SOImmTwoPartVal(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), and llvm::rewriteT2FrameIndex().

◆ getT2SOImmValRotate()

unsigned llvm::ARM_AM::getT2SOImmValRotate ( unsigned V )

inline

Definition at line 319 of file ARMAddressingModes.h.

References llvm::countTrailingZeros().

Referenced by getT2SOImmTwoPartFirst(), and isT2SOImmTwoPartVal().

◆ getT2SOImmValRotateVal()

int llvm::ARM_AM::getT2SOImmValRotateVal ( unsigned V )

inline

getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated 8-bit value.

Return -1 if no rotation encoding is possible. See ARM Reference Manual A6.3.2.

Definition at line 289 of file ARMAddressingModes.h.

References llvm::countLeadingZeros(), and rotr32().

Referenced by getT2SOImmVal().

◆ getT2SOImmValSplatVal()

int llvm::ARM_AM::getT2SOImmValSplatVal ( unsigned V )

inline

getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained by splatting the low 8 bits into every other byte or every byte of a 32-bit value.

i.e., 00000000 00000000 00000000 abcdefgh control = 0 00000000 abcdefgh 00000000 abcdefgh control = 1 abcdefgh 00000000 abcdefgh 00000000 control = 2 abcdefgh abcdefgh abcdefgh abcdefgh control = 3 Return -1 if none of the above apply. See ARM Reference Manual A6.3.2.

Definition at line 261 of file ARMAddressingModes.h.

Referenced by getT2SOImmTwoPartFirst(), getT2SOImmVal(), and isT2SOImmTwoPartVal().

◆ getThumbImm16ValShift()

unsigned llvm::ARM_AM::getThumbImm16ValShift ( unsigned Imm )

inline

getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift.

Returns the shift amount to use.

Definition at line 228 of file ARMAddressingModes.h.

References llvm::countTrailingZeros().

Referenced by isThumbImm16ShiftedVal().

◆ getThumbImmNonShiftedVal()

unsigned llvm::ARM_AM::getThumbImmNonShiftedVal ( unsigned V )

inline

getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value.

Definition at line 247 of file ARMAddressingModes.h.

References getThumbImmValShift().

◆ getThumbImmValShift()

unsigned llvm::ARM_AM::getThumbImmValShift ( unsigned Imm )

inline

getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift.

Returns the shift amount to use.

Definition at line 209 of file ARMAddressingModes.h.

References llvm::countTrailingZeros().

Referenced by getThumbImmNonShiftedVal(), and isThumbImmShiftedVal().

◆ isNEONBytesplat()

bool llvm::ARM_AM::isNEONBytesplat	(	unsigned	Value,
		unsigned	Size
	)

inline

Definition at line 580 of file ARMAddressingModes.h.

References assert(), llvm::count(), and Size.

Referenced by isNEONi16splat(), and isNEONi32splat().

◆ isNEONi16splat()

bool llvm::ARM_AM::isNEONi16splat ( unsigned Value )

inline

Checks if Value is a correct immediate for instructions like VBIC/VORR.

Definition at line 591 of file ARMAddressingModes.h.

References isNEONBytesplat().

Referenced by encodeNEONi16splat().

◆ isNEONi32splat()

bool llvm::ARM_AM::isNEONi32splat ( unsigned Value )

inline

Checks if Value is a correct immediate for instructions like VBIC/VORR.

Definition at line 609 of file ARMAddressingModes.h.

References isNEONBytesplat().

Referenced by encodeNEONi32splat().

◆ isSOImmTwoPartVal()

bool llvm::ARM_AM::isSOImmTwoPartVal ( unsigned V )

inline

isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's.

Definition at line 179 of file ARMAddressingModes.h.

References getSOImmValRotate(), and rotr32().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate().

◆ isT2SOImmTwoPartVal()

bool llvm::ARM_AM::isT2SOImmTwoPartVal ( unsigned Imm )

inline

Definition at line 326 of file ARMAddressingModes.h.

References getT2SOImmVal(), getT2SOImmValRotate(), getT2SOImmValSplatVal(), and rotr32().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and getT2SOImmTwoPartFirst().

◆ isThumbImm16ShiftedVal()

bool llvm::ARM_AM::isThumbImm16ShiftedVal ( unsigned V )

inline

isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit immediate.

Definition at line 239 of file ARMAddressingModes.h.

References getThumbImm16ValShift().

◆ isThumbImmShiftedVal()

bool llvm::ARM_AM::isThumbImmShiftedVal ( unsigned V )

inline

isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate.

Definition at line 220 of file ARMAddressingModes.h.

References getThumbImmValShift().

Referenced by llvm::ARMTTIImpl::getIntImmCost(), and llvm::ARMTargetLowering::LowerAsmOperandForConstraint().

◆ rotl32()

unsigned llvm::ARM_AM::rotl32	(	unsigned	Val,
		unsigned	Amt
	)

inline

rotl32 - Rotate a 32-bit unsigned value left by a specified # bits.

Definition at line 92 of file ARMAddressingModes.h.

References assert().

Referenced by getSOImmVal().

◆ rotr32()

unsigned llvm::ARM_AM::rotr32	(	unsigned	Val,
		unsigned	Amt
	)

inline

rotr32 - Rotate a 32-bit unsigned value right by a specified # bits.

Definition at line 85 of file ARMAddressingModes.h.

References assert().

Referenced by llvm::emitARMRegPlusImmediate(), llvm::emitT2RegPlusImmediate(), getRealVLDOpcode(), getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), getSOImmValRotate(), getT2SOImmTwoPartFirst(), getT2SOImmValRotateVal(), isSOImmTwoPartVal(), isT2SOImmTwoPartVal(), llvm::ARMInstPrinter::printModImmOperand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

◆ AddrOpc

◆ AMSubMode

◆ ShiftOpc

Function Documentation

◆ createNEONModImm()

◆ decodeNEONModImm()

◆ encodeNEONi16splat()

◆ encodeNEONi32splat()

◆ getAddrOpcStr()

◆ getAM2IdxMode()

◆ getAM2Offset()

◆ getAM2Op()

◆ getAM2Opc()

◆ getAM2ShiftOpc()

◆ getAM3IdxMode()

◆ getAM3Offset()

◆ getAM3Op()

◆ getAM3Opc()

◆ getAM4ModeImm()

◆ getAM4SubMode()

◆ getAM5FP16Offset()

◆ getAM5FP16Op()

◆ getAM5FP16Opc()

◆ getAM5Offset()

◆ getAM5Op()

◆ getAM5Opc()

◆ getAMSubModeStr()

◆ getFP16Imm() [1/2]

◆ getFP16Imm() [2/2]

◆ getFP32Imm() [1/2]

◆ getFP32Imm() [2/2]

◆ getFP64Imm() [1/2]

◆ getFP64Imm() [2/2]

◆ getFPImmFloat()

◆ getNEONModImmOpCmode()

◆ getNEONModImmVal()

◆ getShiftOpcEncoding()

◆ getShiftOpcForNode()

◆ getShiftOpcStr()

◆ getSOImmTwoPartFirst()

◆ getSOImmTwoPartSecond()

◆ getSOImmVal()

◆ getSOImmValImm()

◆ getSOImmValRot()

◆ getSOImmValRotate()

◆ getSORegOffset()

◆ getSORegOpc()

◆ getSORegShOp()

◆ getT2SOImmTwoPartFirst()

◆ getT2SOImmTwoPartSecond()

◆ getT2SOImmVal()

◆ getT2SOImmValRotate()

◆ getT2SOImmValRotateVal()

◆ getT2SOImmValSplatVal()

◆ getThumbImm16ValShift()

◆ getThumbImmNonShiftedVal()

◆ getThumbImmValShift()

◆ isNEONBytesplat()

◆ isNEONi16splat()

◆ isNEONi32splat()

◆ isSOImmTwoPartVal()

◆ isT2SOImmTwoPartVal()

◆ isThumbImm16ShiftedVal()

◆ isThumbImmShiftedVal()

◆ rotl32()

◆ rotr32()