LLVM  8.0.1
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llvm::ARM Namespace Reference

Define some predicates that are used for node matching. More...

Namespaces

 EHABI
 
 WinEH
 

Classes

struct  ArchNames
 
struct  CpuNames
 
struct  ExtName
 
struct  FPUName
 

Enumerations

enum  ArchExtKind : unsigned {
  AEK_INVALID = 0, AEK_NONE = 1, AEK_CRC = 1 << 1, AEK_CRYPTO = 1 << 2,
  AEK_FP = 1 << 3, AEK_HWDIVTHUMB = 1 << 4, AEK_HWDIVARM = 1 << 5, AEK_MP = 1 << 6,
  AEK_SIMD = 1 << 7, AEK_SEC = 1 << 8, AEK_VIRT = 1 << 9, AEK_DSP = 1 << 10,
  AEK_FP16 = 1 << 11, AEK_RAS = 1 << 12, AEK_SVE = 1 << 13, AEK_DOTPROD = 1 << 14,
  AEK_SHA2 = 1 << 15, AEK_AES = 1 << 16, AEK_FP16FML = 1 << 17, AEK_SB = 1 << 18,
  AEK_OS = 0x8000000, AEK_IWMMXT = 0x10000000, AEK_IWMMXT2 = 0x20000000, AEK_MAVERICK = 0x40000000,
  AEK_XSCALE = 0x80000000
}
 
enum  ArchKind { ArchKind::ARM_ARCH, ARM_FPU, ARM_FPU }
 
enum  FPUKind {
  ARM_FPU, ARM_FPU, ARM_FPU, ARM_FPU,
  ARM_FPU, ARM_FPU, ARM_FPU, ARM_FPU,
  ARM_FPU
}
 
enum  FPUVersion {
  FPUVersion::NONE, FPUVersion::VFPV2, FPUVersion::VFPV3, FPUVersion::VFPV3_FP16,
  FPUVersion::VFPV4, FPUVersion::VFPV5
}
 
enum  FPURestriction { FPURestriction::None = 0, FPURestriction::D16, FPURestriction::SP_D16 }
 
enum  NeonSupportLevel { NeonSupportLevel::None = 0, NeonSupportLevel::Neon, NeonSupportLevel::Crypto }
 
enum  ISAKind { ISAKind::INVALID = 0, ISAKind::ARM, ISAKind::THUMB, ISAKind::AARCH64 }
 
enum  EndianKind { EndianKind::INVALID = 0, EndianKind::LITTLE, EndianKind::BIG }
 
enum  ProfileKind { ProfileKind::INVALID = 0, ProfileKind::A, ProfileKind::R, ProfileKind::M }
 
enum  DW_ISA { DW_ISA_ARM_thumb = 1, DW_ISA_ARM_arm = 2 }
 
enum  PartialMappingIdx { PMI_GPR, PMI_SPR, PMI_DPR, PMI_Min = PMI_GPR }
 
enum  ValueMappingIdx { InvalidIdx = 0, GPR3OpsIdx = 1, SPR3OpsIdx = 4, DPR3OpsIdx = 7 }
 
enum  Fixups {
  fixup_arm_ldst_pcrel_12 = FirstTargetFixupKind, fixup_t2_ldst_pcrel_12, fixup_arm_pcrel_10_unscaled, fixup_arm_pcrel_10,
  fixup_t2_pcrel_10, fixup_arm_pcrel_9, fixup_t2_pcrel_9, fixup_thumb_adr_pcrel_10,
  fixup_arm_adr_pcrel_12, fixup_t2_adr_pcrel_12, fixup_arm_condbranch, fixup_arm_uncondbranch,
  fixup_t2_condbranch, fixup_t2_uncondbranch, fixup_arm_thumb_br, fixup_arm_uncondbl,
  fixup_arm_condbl, fixup_arm_blx, fixup_arm_thumb_bl, fixup_arm_thumb_blx,
  fixup_arm_thumb_cb, fixup_arm_thumb_cp, fixup_arm_thumb_bcc, fixup_arm_movt_hi16,
  fixup_arm_movw_lo16, fixup_t2_movt_hi16, fixup_t2_movw_lo16, fixup_arm_mod_imm,
  fixup_t2_so_imm, LastTargetFixupKind, NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
}
 

Functions

StringRef getFPUName (unsigned FPUKind)
 
FPUVersion getFPUVersion (unsigned FPUKind)
 
NeonSupportLevel getFPUNeonSupportLevel (unsigned FPUKind)
 
FPURestriction getFPURestriction (unsigned FPUKind)
 
bool getFPUFeatures (unsigned FPUKind, std::vector< StringRef > &Features)
 
bool getHWDivFeatures (unsigned HWDivKind, std::vector< StringRef > &Features)
 
bool getExtensionFeatures (unsigned Extensions, std::vector< StringRef > &Features)
 
StringRef getArchName (ArchKind AK)
 
unsigned getArchAttr (ArchKind AK)
 
StringRef getCPUAttr (ArchKind AK)
 
StringRef getSubArch (ArchKind AK)
 
StringRef getArchExtName (unsigned ArchExtKind)
 
StringRef getArchExtFeature (StringRef ArchExt)
 
StringRef getHWDivName (unsigned HWDivKind)
 
unsigned getDefaultFPU (StringRef CPU, ArchKind AK)
 
unsigned getDefaultExtensions (StringRef CPU, ArchKind AK)
 
StringRef getDefaultCPU (StringRef Arch)
 
StringRef getCanonicalArchName (StringRef Arch)
 
StringRef getFPUSynonym (StringRef FPU)
 
StringRef getArchSynonym (StringRef Arch)
 
unsigned parseHWDiv (StringRef HWDiv)
 
unsigned parseFPU (StringRef FPU)
 
ArchKind parseArch (StringRef Arch)
 
unsigned parseArchExt (StringRef ArchExt)
 
ArchKind parseCPUArch (StringRef CPU)
 
ISAKind parseArchISA (StringRef Arch)
 
EndianKind parseArchEndian (StringRef Arch)
 
ProfileKind parseArchProfile (StringRef Arch)
 
unsigned parseArchVersion (StringRef Arch)
 
void fillValidCPUArchList (SmallVectorImpl< StringRef > &Values)
 
StringRef computeDefaultTargetABI (const Triple &TT, StringRef CPU)
 
bool isBitFieldInvertedMask (unsigned v)
 
FastISel * createFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)
 
static bool checkPartMapping (const RegisterBankInfo::PartialMapping &PM, unsigned Start, unsigned Length, unsigned RegBankID)
 
static void checkPartialMappings ()
 
static bool checkValueMapping (const RegisterBankInfo::ValueMapping &VM, RegisterBankInfo::PartialMapping *BreakDown)
 
static void checkValueMappings ()
 

Variables

const ExtName ARCHExtNames []
 
struct {
   const char *   llvm::ARM::NameCStr
 
   size_t   llvm::ARM::NameLength
 
   unsigned   llvm::ARM::ID
 
} HWDivNames []
 
const CpuNames< ArchKind > CPUNames []
 
static const FPUName FPUNames []
 
static const ArchNames< ArchKind > ARCHNames []
 
RegisterBankInfo::PartialMapping PartMappings []
 
RegisterBankInfo::ValueMapping ValueMappings []
 

Detailed Description

Define some predicates that are used for node matching.

Enumeration Type Documentation

◆ ArchExtKind

enum llvm::ARM::ArchExtKind : unsigned
Enumerator
AEK_INVALID 
AEK_NONE 
AEK_CRC 
AEK_CRYPTO 
AEK_FP 
AEK_HWDIVTHUMB 
AEK_HWDIVARM 
AEK_MP 
AEK_SIMD 
AEK_SEC 
AEK_VIRT 
AEK_DSP 
AEK_FP16 
AEK_RAS 
AEK_SVE 
AEK_DOTPROD 
AEK_SHA2 
AEK_AES 
AEK_FP16FML 
AEK_SB 
AEK_OS 
AEK_IWMMXT 
AEK_IWMMXT2 
AEK_MAVERICK 
AEK_XSCALE 

Definition at line 28 of file ARMTargetParser.h.

◆ ArchKind

enum llvm::ARM::ArchKind
strong
Enumerator
ARM_ARCH 
ARM_FPU 
ARM_FPU 

Definition at line 90 of file ARMTargetParser.h.

◆ DW_ISA

enum llvm::ARM::DW_ISA
Enumerator
DW_ISA_ARM_thumb 
DW_ISA_ARM_arm 

Definition at line 26 of file ARMAsmPrinter.h.

◆ EndianKind

enum llvm::ARM::EndianKind
strong
Enumerator
INVALID 
LITTLE 
BIG 

Definition at line 152 of file ARMTargetParser.h.

◆ Fixups

enum llvm::ARM::Fixups
Enumerator
fixup_arm_ldst_pcrel_12 
fixup_t2_ldst_pcrel_12 
fixup_arm_pcrel_10_unscaled 
fixup_arm_pcrel_10 
fixup_t2_pcrel_10 
fixup_arm_pcrel_9 
fixup_t2_pcrel_9 
fixup_thumb_adr_pcrel_10 
fixup_arm_adr_pcrel_12 
fixup_t2_adr_pcrel_12 
fixup_arm_condbranch 
fixup_arm_uncondbranch 
fixup_t2_condbranch 
fixup_t2_uncondbranch 
fixup_arm_thumb_br 
fixup_arm_uncondbl 
fixup_arm_condbl 
fixup_arm_blx 
fixup_arm_thumb_bl 
fixup_arm_thumb_blx 
fixup_arm_thumb_cb 
fixup_arm_thumb_cp 
fixup_arm_thumb_bcc 
fixup_arm_movt_hi16 
fixup_arm_movw_lo16 
fixup_t2_movt_hi16 
fixup_t2_movw_lo16 
fixup_arm_mod_imm 
fixup_t2_so_imm 
LastTargetFixupKind 
NumTargetFixupKinds 

Definition at line 17 of file ARMFixupKinds.h.

◆ FPUKind

enum llvm::ARM::FPUKind
Enumerator
ARM_FPU 
ARM_FPU 
ARM_FPU 
ARM_FPU 
ARM_FPU 
ARM_FPU 
ARM_FPU 
ARM_FPU 
ARM_FPU 

Definition at line 117 of file ARMTargetParser.h.

◆ FPURestriction

enum llvm::ARM::FPURestriction
strong
Enumerator
None 

No restriction.

D16 

Only 16 D registers.

SP_D16 

Only single-precision instructions, with 16 D registers.

Definition at line 134 of file ARMTargetParser.h.

◆ FPUVersion

enum llvm::ARM::FPUVersion
strong
Enumerator
NONE 
VFPV2 
VFPV3 
VFPV3_FP16 
VFPV4 
VFPV5 

Definition at line 124 of file ARMTargetParser.h.

◆ ISAKind

enum llvm::ARM::ISAKind
strong
Enumerator
INVALID 
ARM 
THUMB 
AARCH64 

Definition at line 148 of file ARMTargetParser.h.

◆ NeonSupportLevel

enum llvm::ARM::NeonSupportLevel
strong
Enumerator
None 

No Neon.

Neon 

Neon.

Crypto 

Neon with Crypto.

Definition at line 141 of file ARMTargetParser.h.

◆ PartialMappingIdx

enum llvm::ARM::PartialMappingIdx
Enumerator
PMI_GPR 
PMI_SPR 
PMI_DPR 
PMI_Min 

Definition at line 32 of file ARMRegisterBankInfo.cpp.

◆ ProfileKind

enum llvm::ARM::ProfileKind
strong
Enumerator
INVALID 
A 
R 
M 

Definition at line 155 of file ARMTargetParser.h.

◆ ValueMappingIdx

enum llvm::ARM::ValueMappingIdx
Enumerator
InvalidIdx 
GPR3OpsIdx 
SPR3OpsIdx 
DPR3OpsIdx 

Definition at line 69 of file ARMRegisterBankInfo.cpp.

Function Documentation

◆ checkPartialMappings()

static void llvm::ARM::checkPartialMappings ( )
static

Definition at line 56 of file ARMRegisterBankInfo.cpp.

References assert(), checkPartMapping(), PartMappings, PMI_DPR, PMI_GPR, PMI_Min, and PMI_SPR.

Referenced by llvm::ARMRegisterBankInfo::ARMRegisterBankInfo().

◆ checkPartMapping()

static bool llvm::ARM::checkPartMapping ( const RegisterBankInfo::PartialMapping &  PM,
unsigned  Start,
unsigned  Length,
unsigned  RegBankID 
)
static

Definition at line 49 of file ARMRegisterBankInfo.cpp.

Referenced by checkPartialMappings().

◆ checkValueMapping()

static bool llvm::ARM::checkValueMapping ( const RegisterBankInfo::ValueMapping &  VM,
RegisterBankInfo::PartialMapping *  BreakDown 
)
static

Definition at line 93 of file ARMRegisterBankInfo.cpp.

References llvm::RegisterBankInfo::ValueMapping::BreakDown, and llvm::RegisterBankInfo::ValueMapping::NumBreakDowns.

Referenced by checkValueMappings().

◆ checkValueMappings()

static void llvm::ARM::checkValueMappings ( )
static

Definition at line 98 of file ARMRegisterBankInfo.cpp.

References assert(), checkValueMapping(), DPR3OpsIdx, GPR3OpsIdx, PartMappings, PMI_DPR, PMI_GPR, PMI_Min, PMI_SPR, and SPR3OpsIdx.

Referenced by llvm::ARMRegisterBankInfo::ARMRegisterBankInfo().

◆ computeDefaultTargetABI()

StringRef llvm::ARM::computeDefaultTargetABI ( const Triple &  TT,
StringRef  CPU 
)

Definition at line 543 of file ARMTargetParser.cpp.

References llvm::Triple::Android, llvm::Triple::EABI, llvm::Triple::EABIHF, llvm::StringRef::empty(), llvm::AArch64::getArchName(), llvm::Triple::getArchName(), llvm::Triple::getEnvironment(), llvm::Triple::getOS(), llvm::Triple::GNUEABI, llvm::Triple::GNUEABIHF, llvm::Triple::isOSBinFormatMachO(), llvm::Triple::isOSNetBSD(), llvm::Triple::isOSOpenBSD(), llvm::Triple::isOSWindows(), llvm::Triple::isWatchABI(), llvm::Triple::MuslEABI, llvm::Triple::MuslEABIHF, parseArchProfile(), llvm::AArch64::parseCPUArch(), and llvm::Triple::UnknownOS.

Referenced by computeTargetABI().

◆ createFastISel()

FastISel * llvm::ARM::createFastISel ( FunctionLoweringInfo &  funcInfo,
const TargetLibraryInfo *  libInfo 
)

Definition at line 3086 of file ARMFastISel.cpp.

References llvm::MachineFunction::getSubtarget(), llvm::FunctionLoweringInfo::MF, and llvm::ARMSubtarget::useFastISel().

Referenced by llvm::ARMTargetLowering::createFastISel(), and llvm::ARMTargetLowering::isNoopAddrSpaceCast().

◆ fillValidCPUArchList()

void llvm::ARM::fillValidCPUArchList ( SmallVectorImpl< StringRef > &  Values)

Definition at line 536 of file ARMTargetParser.cpp.

References CPUNames, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

◆ getArchAttr()

unsigned llvm::ARM::getArchAttr ( ARM::ArchKind  AK)

Definition at line 460 of file ARMTargetParser.cpp.

References ARCHNames.

Referenced by GetAEABIUnwindPersonalityName().

◆ getArchExtFeature()

StringRef llvm::ARM::getArchExtFeature ( StringRef  ArchExt)

Definition at line 472 of file ARMTargetParser.cpp.

References ARCHExtNames, llvm::StringRef::startswith(), and llvm::StringRef::substr().

◆ getArchExtName()

StringRef llvm::ARM::getArchExtName ( unsigned  ArchExtKind)

Definition at line 464 of file ARMTargetParser.cpp.

References ARCHExtNames.

Referenced by GetAEABIUnwindPersonalityName().

◆ getArchName()

StringRef llvm::ARM::getArchName ( ARM::ArchKind  AK)

Definition at line 448 of file ARMTargetParser.cpp.

References ARCHNames, and getName().

Referenced by GetAEABIUnwindPersonalityName(), llvm::IsCPSRDead< MCInst >(), and llvm::ARM_MC::ParseARMTriple().

◆ getArchSynonym()

StringRef llvm::ARM::getArchSynonym ( StringRef  Arch)

Definition at line 134 of file ARMTargetParser.cpp.

References llvm::StringSwitch< T, R >::Case(), llvm::StringSwitch< T, R >::Cases(), and llvm::StringSwitch< T, R >::Default().

Referenced by llvm::AArch64::parseArch(), and parseArch().

◆ getCanonicalArchName()

StringRef llvm::ARM::getCanonicalArchName ( StringRef  Arch)

Definition at line 287 of file ARMTargetParser.cpp.

References llvm::StringRef::empty(), llvm::StringRef::endswith(), llvm::StringRef::find(), llvm::StringRef::npos, llvm::StringRef::size(), llvm::StringRef::startswith(), and llvm::StringRef::substr().

Referenced by llvm::Triple::getARMCPUForArch(), llvm::AArch64::parseArch(), parseArch(), parseArchProfile(), parseArchVersion(), parseARMArch(), and parseSubArch().

◆ getCPUAttr()

StringRef llvm::ARM::getCPUAttr ( ARM::ArchKind  AK)

Definition at line 452 of file ARMTargetParser.cpp.

References ARCHNames, and llvm::AArch64::getCPUAttr().

Referenced by GetAEABIUnwindPersonalityName().

◆ getDefaultCPU()

StringRef llvm::ARM::getDefaultCPU ( StringRef  Arch)

Definition at line 496 of file ARMTargetParser.cpp.

References CPUNames, and parseArch().

Referenced by llvm::Triple::getARMCPUForArch().

◆ getDefaultExtensions()

unsigned llvm::ARM::getDefaultExtensions ( StringRef  CPU,
ARM::ArchKind  AK 
)

Definition at line 382 of file ARMTargetParser.cpp.

References AEK_INVALID, ARCHNames, and ARM_CPU_NAME.

◆ getDefaultFPU()

unsigned llvm::ARM::getDefaultFPU ( StringRef  CPU,
ARM::ArchKind  AK 
)

Definition at line 371 of file ARMTargetParser.cpp.

References ARCHNames, and ARM_CPU_NAME.

◆ getExtensionFeatures()

bool llvm::ARM::getExtensionFeatures ( unsigned  Extensions,
std::vector< StringRef > &  Features 
)

Definition at line 414 of file ARMTargetParser.cpp.

References llvm::AArch64::AEK_CRC, llvm::AArch64::AEK_DOTPROD, AEK_DSP, llvm::AArch64::AEK_FP16FML, llvm::AArch64::AEK_INVALID, llvm::AArch64::AEK_RAS, and getHWDivFeatures().

◆ getFPUFeatures()

bool llvm::ARM::getFPUFeatures ( unsigned  FPUKind,
std::vector< StringRef > &  Features 
)

Definition at line 158 of file ARMTargetParser.cpp.

References FPUNames, llvm::None, and llvm::SIOutMods::NONE.

Referenced by llvm::IsCPSRDead< MCInst >().

◆ getFPUName()

StringRef llvm::ARM::getFPUName ( unsigned  FPUKind)

Definition at line 353 of file ARMTargetParser.cpp.

References FPUNames, and llvm::ARM::FPUName::getName().

Referenced by GetAEABIUnwindPersonalityName().

◆ getFPUNeonSupportLevel()

ARM::NeonSupportLevel llvm::ARM::getFPUNeonSupportLevel ( unsigned  FPUKind)

Definition at line 277 of file ARMTargetParser.cpp.

References FPUNames, llvm::ARM::FPUName::NeonSupport, and llvm::None.

◆ getFPURestriction()

ARM::FPURestriction llvm::ARM::getFPURestriction ( unsigned  FPUKind)

Definition at line 365 of file ARMTargetParser.cpp.

References FPUNames, llvm::None, and llvm::ARM::FPUName::Restriction.

◆ getFPUSynonym()

StringRef llvm::ARM::getFPUSynonym ( StringRef  FPU)

Definition at line 336 of file ARMTargetParser.cpp.

References llvm::StringSwitch< T, R >::Case(), llvm::StringSwitch< T, R >::Cases(), and llvm::StringSwitch< T, R >::Default().

Referenced by parseFPU().

◆ getFPUVersion()

ARM::FPUVersion llvm::ARM::getFPUVersion ( unsigned  FPUKind)

Definition at line 359 of file ARMTargetParser.cpp.

References FPUNames, llvm::ARM::FPUName::FPUVer, and llvm::SIOutMods::NONE.

◆ getHWDivFeatures()

bool llvm::ARM::getHWDivFeatures ( unsigned  HWDivKind,
std::vector< StringRef > &  Features 
)

Definition at line 395 of file ARMTargetParser.cpp.

References AEK_HWDIVARM, AEK_HWDIVTHUMB, and llvm::AArch64::AEK_INVALID.

Referenced by getExtensionFeatures().

◆ getHWDivName()

StringRef llvm::ARM::getHWDivName ( unsigned  HWDivKind)

Definition at line 488 of file ARMTargetParser.cpp.

References D, and HWDivNames.

◆ getSubArch()

StringRef llvm::ARM::getSubArch ( ARM::ArchKind  AK)

Definition at line 456 of file ARMTargetParser.cpp.

References ARCHNames, and llvm::AArch64::getSubArch().

◆ isBitFieldInvertedMask()

bool llvm::ARM::isBitFieldInvertedMask ( unsigned  v)

Definition at line 14283 of file ARMISelLowering.cpp.

References llvm::isShiftedMask_32().

Referenced by PerformORCombineToBFI().

◆ parseArch()

ARM::ArchKind llvm::ARM::parseArch ( StringRef  Arch)

Definition at line 28 of file ARMTargetParser.cpp.

References ARCHNames, getArchSynonym(), and getCanonicalArchName().

Referenced by getMachOSubTypeFromArch(), llvm::IsCPSRDead< MCInst >(), llvm::ARMSubtarget::isXRaySupported(), llvm::ARM_MC::ParseARMTriple(), and parseSubArch().

◆ parseArchEndian()

ARM::EndianKind llvm::ARM::parseArchEndian ( StringRef  Arch)

Definition at line 240 of file ARMTargetParser.cpp.

References llvm::StringRef::endswith(), and llvm::StringRef::startswith().

Referenced by parseARMArch().

◆ parseArchExt()

unsigned llvm::ARM::parseArchExt ( StringRef  ArchExt)

Definition at line 520 of file ARMTargetParser.cpp.

References llvm::AArch64::AEK_INVALID, and ARCHExtNames.

◆ parseArchISA()

ARM::ISAKind llvm::ARM::parseArchISA ( StringRef  Arch)

Definition at line 259 of file ARMTargetParser.cpp.

References llvm::ARM, llvm::StringSwitch< T, R >::Default(), and llvm::StringSwitch< T, R >::StartsWith().

Referenced by parseARMArch().

◆ parseArchProfile()

ARM::ProfileKind llvm::ARM::parseArchProfile ( StringRef  Arch)

Definition at line 89 of file ARMTargetParser.cpp.

References A, getCanonicalArchName(), llvm_unreachable, parseArch(), and llvm::RISCVFenceField::R.

Referenced by computeDefaultTargetABI(), and parseARMArch().

◆ parseArchVersion()

unsigned llvm::ARM::parseArchVersion ( StringRef  Arch)

Definition at line 39 of file ARMTargetParser.cpp.

References getCanonicalArchName(), llvm_unreachable, and parseArch().

Referenced by parseARMArch().

◆ parseCPUArch()

ARM::ArchKind llvm::ARM::parseCPUArch ( StringRef  CPU)

Definition at line 528 of file ARMTargetParser.cpp.

References C, CPUNames, and llvm::Value::getName().

◆ parseFPU()

unsigned llvm::ARM::parseFPU ( StringRef  FPU)

Definition at line 268 of file ARMTargetParser.cpp.

References F(), FPUNames, and getFPUSynonym().

Referenced by llvm::IsCPSRDead< MCInst >().

◆ parseHWDiv()

unsigned llvm::ARM::parseHWDiv ( StringRef  HWDiv)

Definition at line 511 of file ARMTargetParser.cpp.

References llvm::AArch64::AEK_INVALID, D, getHWDivSynonym(), and HWDivNames.

Variable Documentation

◆ ARCHExtNames

const ExtName llvm::ARM::ARCHExtNames[]

Definition at line 69 of file ARMTargetParser.h.

Referenced by getArchExtFeature(), getArchExtName(), and parseArchExt().

◆ ARCHNames

const ArchNames<ArchKind> llvm::ARM::ARCHNames[]
static
Initial value:
= {
#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)
}

Definition at line 208 of file ARMTargetParser.h.

Referenced by getArchAttr(), getArchName(), getCPUAttr(), getDefaultExtensions(), getDefaultFPU(), getSubArch(), and parseArch().

◆ CPUNames

const CpuNames<ArchKind> llvm::ARM::CPUNames[]

Definition at line 110 of file ARMTargetParser.h.

Referenced by fillValidCPUArchList(), getDefaultCPU(), and parseCPUArch().

◆ FPUNames

const FPUName llvm::ARM::FPUNames[]
static
Initial value:
= {
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION)
}

Definition at line 173 of file ARMTargetParser.h.

Referenced by getFPUFeatures(), getFPUName(), getFPUNeonSupportLevel(), getFPURestriction(), getFPUVersion(), and parseFPU().

◆ HWDivNames

const { ... } llvm::ARM::HWDivNames[]

Referenced by getHWDivName(), and parseHWDiv().

◆ ID

unsigned llvm::ARM::ID

Definition at line 81 of file ARMTargetParser.h.

◆ NameCStr

const char* llvm::ARM::NameCStr

Definition at line 79 of file ARMTargetParser.h.

◆ NameLength

size_t llvm::ARM::NameLength

Definition at line 80 of file ARMTargetParser.h.

◆ PartMappings

RegisterBankInfo::PartialMapping llvm::ARM::PartMappings[]
Initial value:
{
{0, 32, GPRRegBank},
{0, 32, FPRRegBank},
{0, 64, FPRRegBank},
}

Definition at line 39 of file ARMRegisterBankInfo.cpp.

Referenced by checkPartialMappings(), and checkValueMappings().

◆ ValueMappings

RegisterBankInfo::ValueMapping llvm::ARM::ValueMappings[]
Initial value:
= {
{nullptr, 0},
{&PartMappings[PMI_GPR - PMI_Min], 1},
{&PartMappings[PMI_GPR - PMI_Min], 1},
{&PartMappings[PMI_GPR - PMI_Min], 1},
{&PartMappings[PMI_SPR - PMI_Min], 1},
{&PartMappings[PMI_SPR - PMI_Min], 1},
{&PartMappings[PMI_SPR - PMI_Min], 1},
{&PartMappings[PMI_DPR - PMI_Min], 1},
{&PartMappings[PMI_DPR - PMI_Min], 1},
{&PartMappings[PMI_DPR - PMI_Min], 1}}
llvm::ARM::PartMappings
RegisterBankInfo::PartialMapping PartMappings[]
Definition: ARMRegisterBankInfo.cpp:39

Definition at line 76 of file ARMRegisterBankInfo.cpp.

Referenced by llvm::ARMRegisterBankInfo::getInstrMapping().

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