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LLVM
8.0.1
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Functions | |
| template<typename E > | |
| std::underlying_type< E >::type | Mask () |
| Get a bitmask with 1s in all places up to the high-order bit of E's largest value. More... | |
| template<typename E > | |
| std::underlying_type< E >::type | Underlying (E Val) |
| Check that Val is in range for E, and return Val cast to E's underlying type. More... | |
| template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type> | |
| E | operator~ (E Val) |
| template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type> | |
| E | operator| (E LHS, E RHS) |
| template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type> | |
| E | operator & (E LHS, E RHS) |
| template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type> | |
| E | operator^ (E LHS, E RHS) |
| template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type> | |
| E & | operator|= (E &LHS, E RHS) |
| template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type> | |
| E & | operator &= (E &LHS, E RHS) |
| template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type> | |
| E & | operator^= (E &LHS, E RHS) |
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition at line 81 of file BitmaskEnum.h.
References llvm::NextPowerOf2().
Referenced by llvm::LiveRegUnits::addRegMasked(), addSegmentsWithValNo(), AddThumb1SBit(), adjustFixupValue(), adjustForRedundantAnd(), adjustForTestUnderMask(), adjustSubwordCmp(), llvm::MachineFunction::allocateRegMask(), llvm::analyzeArguments(), llvm::MipsAsmBackend::applyFixup(), ApplyX86MaskOn1BitsVec(), llvm::LivePhysRegs::available(), llvm::lowertypetests::BitSetBuilder::build(), buildFromShuffleMostly(), buildVector(), calculateByteProvider(), CallingConvSupported(), llvm::canConstantFoldCallTo(), canEvaluateShiftedShift(), canEvaluateShuffled(), canEvaluateTruncated(), canonicalizeSaturatedSubtract(), CC_Lanai32_VarArg(), llvm::ARMTargetLowering::CCAssignFnForReturn(), changeFCMPPredToAArch64CC(), llvm::GlobalObject::classof(), llvm::APInt::clearBit(), llvm::SmallBitVector::clearBitsInMask(), llvm::BitVector::clearBitsInMask(), llvm::SmallBitVector::clearBitsNotInMask(), llvm::BitVector::clearBitsNotInMask(), CollectOpsToWiden(), collectShuffleElements(), combineADDToADDZE(), combineBasicSADPattern(), combineConcatVectorOfExtracts(), combineExtractWithShuffle(), combineHorizontalMinMaxResult(), combineInsertSubvector(), combineLogicBlendIntoPBLENDV(), combineMaskedLoad(), combineMaskedStore(), combineSelect(), combineShuffleOfConcatUndef(), combineShuffleToVectorExtend(), combineTargetShuffle(), combineTruncationShuffle(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), commitFpm(), llvm::X86InstrInfo::commuteInstructionImpl(), llvm::TargetRegisterInfo::composeSubRegIndexLaneMask(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::X86TargetLowering::computeKnownBitsForTargetNode(), llvm::computeKnownBitsFromRangeMetadata(), llvm::slpvectorizer::BoUpSLP::computeMinimumValueSizes(), llvm::SelectionDAG::ComputeNumSignBits(), computeRecurrenceType(), concatenateTwoVectors(), llvm::ConstantFoldCastOperand(), llvm::MIRPrinter::convert(), llvm::PPCInstrInfo::convertToImmediateForm(), llvm::MachineInstr::copyIRFlags(), llvm::detail::TrailingZerosCounter< T, SizeOfT >::count(), llvm::createBitMaskForGaps(), createBSWAPShuffleMask(), llvm::LiveRangeCalc::createDeadDefs(), llvm::IRBuilderBase::CreateElementUnorderedAtomicMemMove(), llvm::IRBuilder< TargetFolder >::CreateExtractInteger(), llvm::createHexagonHardwareLoops(), llvm::mca::InstrBuilder::createInstruction(), llvm::createInterleaveMask(), createMaskedBitTest(), llvm::IRBuilderBase::CreateMaskedGather(), llvm::IRBuilderBase::CreateMaskedLoad(), llvm::createR600ExpandSpecialInstrsPass(), llvm::MachineOperand::CreateRegLiveOut(), llvm::MachineOperand::CreateRegMask(), llvm::IRBuilder< TargetFolder >::CreateShuffleVector(), llvm::createSIModeRegisterPass(), DecodeMSRMask(), decomposeBitTestICmp(), llvm::AArch64InstrInfo::decomposeMachineOperandsTargetFlags(), llvm::ARMBaseInstrInfo::decomposeMachineOperandsTargetFlags(), llvm::PPCInstrInfo::decomposeMachineOperandsTargetFlags(), llvm::mca::DefaultResourceStrategy::DefaultResourceStrategy(), llvm::HexagonDAGToDAGISel::DetectUseSxtw(), llvm::DWARFContext::dump(), eliminateDeadStores(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::X86AsmPrinter::EmitInstruction(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), llvm::UnwindOpcodeAssembler::EmitRegSave(), encodeBitmaskPerm(), llvm::RuntimeDyldCheckerExprEval::evaluate(), evaluateInDifferentElementOrder(), llvm::VPInterleaveRecipe::execute(), llvm::VPWidenMemoryInstructionRecipe::execute(), expandf64Toi32(), ExtractBitFromMaskVector(), extractVector(), llvm::SmallBitVector::find_next_unset(), foldAndOrOfEqualityCmpsWithConstants(), foldAnyOrAllBitsSet(), foldConstantInsEltIntoShuffle(), foldICmpShlOne(), foldICmpWithMinMax(), foldICmpWithTruncSignExtendedVal(), foldIdentityExtractShuffle(), foldLogOpOfMaskedICmps(), foldMaskedShiftToBEXTR(), foldSelectShuffle(), foldSelectShuffleWith1Binop(), llvm::InstCombiner::FoldShiftByConstant(), foldShiftedShift(), foldShuffleWithInsert(), foldSignedTruncationCheck(), foldVecTruncToExtElt(), foreachUnit(), fp16SrcZerosHighBits(), GeneratePerfectShuffle(), GetAEABIUnwindPersonalityName(), getARClassRegisterMask(), getAVX2GatherNode(), getCmpOperandFoldingProfit(), GetConstantInt(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::GetDemandedBits(), getDemandedSrcElements(), getDPPOp(), getDwarfRegNum(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getExpandedMinMaxOps(), getFauxShuffleMask(), llvm::StackMaps::getFnInfos(), GetFPLibCall(), llvm::DWARFUnitIndex::getFromHash(), getGatherNode(), llvm::ConstantExpr::getInBoundsGetElementPtr(), llvm::X86TargetLowering::getInlineAsmMemConstraint(), getIntrinsicForMaskedAtomicRMWBinOp32(), llvm::BasicTTIImplBase< AMDGPUTTIImpl >::getIntrinsicInstrCost(), llvm::ARMTargetLowering::getJumpTableEncoding(), getMad64_32(), llvm::SuperRegClassIterator::getMask(), llvm::SelectionDAG::getMaskedLoad(), getMopState(), getMOVL(), getNarrowIntrinsic(), getNextRegister(), llvm::SCEVNAryExpr::getNoWrapFlags(), llvm::MipsTargetLowering::getOpndList(), llvm::HvxSelector::getPairVT(), getParentPad(), getPermuteMask(), getPSHUFShuffleMask(), getRealVLDOpcode(), llvm::TargetLowering::getRecipEstimate(), getReductionSDNode(), llvm::RegScavenger::getRegsAvailable(), getScatterNode(), llvm::AArch64RegisterInfo::getSEHRegNum(), getShiftAmountTyForConstant(), llvm::ShuffleVectorInst::getShuffleMask(), getTargetConstantBitsFromNode(), llvm::ARCTargetLowering::getTargetNodeName(), llvm::rdf::PhysicalRegisterInfo::getTRI(), getUniformBase(), getUnpackh(), getUnpackl(), getUsefulBitsFromBFM(), getUsefulBitsFromOrWithShiftedReg(), llvm::SimplifyQuery::getWithInstruction(), getX86MaskVec(), group2Shuffle(), llvm::MCCodePadder::handleBasicBlockStart(), llvm::MCCodePadder::handleInstructionBegin(), hasOnlySelectUsers(), INITIALIZE_PASS(), llvm::mca::initializeUsedResources(), insertDAGNode(), insertInteger(), insertVector(), instIsBreakpoint(), inversePermutation(), isBroadcastShuffle(), isBSwapHWordElement(), isCDisp8(), isConstantIntVector(), isCopy(), isCrossCopy(), llvm::HexagonTargetLowering::isCtlzFast(), isDefInSubRange(), llvm::ARMBaseRegisterInfo::isFrameOffsetLegal(), llvm::ShuffleVectorInst::isIdentityWithPadding(), llvm::isKnownNonEqual(), llvm::AArch64TargetLowering::isMaskAndCmp0FoldingBeneficial(), isMatchingOrAlias(), isMemOPCandidate(), isMulPowOf2(), isOpcWithIntImmediate(), llvm::PPCInstrInfo::isProfitableToUnpredicate(), isSETCCorConvertedSETCC(), IsSingleInstrConstant(), llvm::SelectionDAG::isSplatValue(), isStackPtrRelative(), llvm::ShuffleVectorInst::isValidOperands(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerBITCAST(), LowerBITREVERSE_XOP(), LowerBUILD_VECTORAsVariablePermute(), llvm::AArch64CallLowering::lowerCall(), llvm::HexagonTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerEXTEND_VECTOR_INREG(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::AMDGPUTargetLowering::LowerFROUND64(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::AArch64TargetLowering::lowerInterleavedStore(), llvm::ARMTargetLowering::lowerInterleavedStore(), llvm::X86TargetLowering::lowerInterleavedStore(), LowerMGATHER(), LowerMLOAD(), lowerMSABitClearImm(), LowerMSCATTER(), LowerMSTORE(), lowerV16I8VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), LowerVectorINT_TO_FP(), lowerVectorShuffleAsShift(), lowerVectorShuffleByMerging128BitLanes(), lowerVSELECTtoVectorShuffle(), llvm::SCEVWrapPredicate::maskFlags(), llvm::ScalarEvolution::maskFlags(), maskIsAllOneOrUndef(), maskIsAllZeroOrUndef(), maskMatters(), llvm::DwarfExpression::maskSubRegister(), matchLogicBlend(), matchPair(), matchPairwiseShuffleMask(), matchRotate(), matchVectorSplittingReduction(), mayTailCallThisCC(), mayUseP9Setb(), numVectorEltsOrZero(), llvm::ShuffleVectorInst::operator new(), llvm::BitVector::operator<<=(), llvm::BitVector::operator>>=(), llvm::BitVector::operator[](), llvm::AArch64InstrInfo::optimizeCondBranch(), optimizeLogicalImm(), performANDCombine(), PerformANDCombine(), performAtomicOp(), PerformBFICombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), performORCombine(), PerformORCombineToBFI(), performSelectCombine(), PerformSHLSimplify(), PrepareCall(), llvm::LiveIntervals::print(), printBitField(), printMCExpr(), llvm::ARMInstPrinter::printMSRMaskOperand(), printSwizzleBitmask(), llvm::MachineOperand::printTargetFlags(), llvm::ARMInstPrinter::printThumbITMask(), llvm::AArch64_AM::processLogicalImmediate(), profitImm(), llvm::SimpleBitstreamCursor::Read(), llvm::AArch64TargetLowering::ReconstructShuffle(), recoverFramePointer(), reduceBuildVecToShuffleWithZero(), replaceAllUsesOfWithIn(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), replaceShuffleOfInsert(), llvm::Thumb2InstrInfo::ReplaceTailWithBranchTo(), llvm::SmallBitVector::reset(), llvm::BitVector::reset(), llvm::mca::ResourceManager::ResourceManager(), llvm::rewriteARMFrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), scalarizeExtractedBinop(), scalarizeMaskedGather(), scalarizeMaskedLoad(), scalarizeMaskedScatter(), scalarizeMaskedStore(), selectI64Imm(), llvm::HvxSelector::selectShuffle(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), llvm::SmallBitVector::set(), llvm::BitVector::set(), llvm::APInt::setBit(), llvm::SmallBitVector::setBitsInMask(), llvm::BitVector::setBitsInMask(), llvm::SmallBitVector::setBitsNotInMask(), llvm::BitVector::setBitsNotInMask(), llvm::mca::ResourceManager::setCustomStrategy(), llvm::MachineInstr::setFlags(), llvm::Function::setIsMaterializable(), llvm::DwarfExpression::setSubRegisterPiece(), setTargetShuffleZeroElements(), llvm::RISCVTargetLowering::shouldInsertFencesForAtomic(), shouldMergeGEPs(), ShrinkLoadReplaceStoreWithStore(), SimplifyAndInst(), llvm::TargetLowering::SimplifyDemandedBits(), simplifyDivRem(), simplifySelectWithFakeICmpEq(), llvm::TargetLowering::SimplifySetCC(), simplifyX86MaskedLoad(), simplifyX86MaskedStore(), simplifyX86round(), Status::Status(), stripModuloOnShift(), llvm::ARMTargetLowering::targetShrinkDemandedConstant(), toString(), tryCombineCRC32(), llvm::LegalizationArtifactCombiner::tryCombineZExt(), tryFormConcatFromShuffle(), trySequenceOfOnes(), llvm::VPRecipeBuilder::tryToInterleaveMemory(), llvm::VPRecipeBuilder::tryToWidenMemory(), TypeSizeToSizeIndex(), unpackF64OnRV32DSoftABI(), llvm::MachineInstr::untieRegOperand(), updateImm(), upgradeMaskedCompare(), upgradeMaskedMove(), UpgradeMaskToInt(), upgradePMULDQ(), UpgradeX86AddSubSatIntrinsics(), upgradeX86ConcatShift(), upgradeX86Rotate(), llvm::mca::DefaultResourceStrategy::used(), llvm::InnerLoopVectorizer::vectorizeInterleaveGroup(), llvm::InnerLoopVectorizer::vectorizeMemoryInstruction(), llvm::LiveInterval::verify(), llvm::InstCombiner::visitAdd(), llvm::InstCombiner::visitCallInst(), llvm::InstCombiner::visitInsertElementInst(), llvm::InstCombiner::visitLShr(), llvm::InstCombiner::visitSDiv(), llvm::InstCombiner::visitShl(), llvm::InstCombiner::visitShuffleVectorInst(), llvm::InstCombiner::visitSRem(), llvm::LegalizerHelper::widenScalar(), and write32AArch64Addr().
| E llvm::BitmaskEnumDetail::operator& | ( | E | LHS, |
| E | RHS | ||
| ) |
Definition at line 112 of file BitmaskEnum.h.
References E, and Underlying().
| E& llvm::BitmaskEnumDetail::operator&= | ( | E & | LHS, |
| E | RHS | ||
| ) |
Definition at line 134 of file BitmaskEnum.h.
References E.
| E llvm::BitmaskEnumDetail::operator^ | ( | E | LHS, |
| E | RHS | ||
| ) |
Definition at line 118 of file BitmaskEnum.h.
References E, and Underlying().
| E& llvm::BitmaskEnumDetail::operator^= | ( | E & | LHS, |
| E | RHS | ||
| ) |
Definition at line 141 of file BitmaskEnum.h.
References llvm::LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE().
| E llvm::BitmaskEnumDetail::operator| | ( | E | LHS, |
| E | RHS | ||
| ) |
Definition at line 106 of file BitmaskEnum.h.
References E, and Underlying().
| E& llvm::BitmaskEnumDetail::operator|= | ( | E & | LHS, |
| E | RHS | ||
| ) |
Definition at line 127 of file BitmaskEnum.h.
References E.
| E llvm::BitmaskEnumDetail::operator~ | ( | E | Val | ) |
Definition at line 100 of file BitmaskEnum.h.
References E, and Underlying().
Check that Val is in range for E, and return Val cast to E's underlying type.
Definition at line 91 of file BitmaskEnum.h.
Referenced by eliminateDeadStores(), findInitTrampolineFromAlloca(), llvm::pdb::NativeTypeEnum::getBuiltinType(), llvm::InstrProfReaderItaniumRemapper< HashTableImpl >::getRecords(), llvm::InstrProfReaderIndex< HashTableImpl >::InstrProfReaderIndex(), operator &(), operator^(), operator|(), operator~(), llvm::InstrProfReaderItaniumRemapper< HashTableImpl >::populateRemappings(), and llvm::sampleprof::SampleProfileReaderItaniumRemapper::SampleProfileReaderItaniumRemapper().
1.8.13