14 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 15 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 33 class TargetRegisterInfo;
51 : Start(Expr.
begin()), End(Expr.
end()) {}
63 void consume(
unsigned N) { std::advance(Start, N); }
85 operator bool()
const {
return Start != End; }
112 uint64_t OffsetInBits = 0;
116 unsigned SubRegisterSizeInBits = 0;
117 unsigned SubRegisterOffsetInBits = 0;
125 SubRegisterSizeInBits = SizeInBits;
126 SubRegisterOffsetInBits = OffsetInBits;
130 void maskSubRegister();
133 virtual void emitOp(uint8_t
Op,
const char *Comment =
nullptr) = 0;
136 virtual void emitSigned(int64_t
Value) = 0;
139 virtual void emitUnsigned(uint64_t Value) = 0;
142 void emitConstu(uint64_t Value);
150 void addReg(
int DwarfReg,
const char *Comment =
nullptr);
153 void addBReg(
int DwarfReg,
int Offset);
156 void addFBReg(
int Offset);
174 unsigned MaxSize = ~1U);
179 void addOpPiece(
unsigned SizeInBits,
unsigned OffsetInBits = 0);
182 void addShr(
unsigned ShiftBy);
185 void addAnd(
unsigned Mask);
198 void addStackValue();
209 void addSignedConstant(int64_t Value);
212 void addUnsignedConstant(uint64_t Value);
215 void addUnsignedConstant(
const APInt &Value);
238 unsigned FragmentOffsetInBits = 0);
246 unsigned FragmentOffsetInBits = 0);
257 void emitOp(uint8_t
Op,
const char *Comment =
nullptr)
override;
258 void emitSigned(int64_t
Value)
override;
259 void emitUnsigned(uint64_t Value)
override;
261 unsigned MachineReg)
override;
274 void emitOp(uint8_t
Op,
const char *Comment =
nullptr)
override;
275 void emitSigned(int64_t
Value)
override;
276 void emitUnsigned(uint64_t Value)
override;
278 unsigned MachineReg)
override;
290 #endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H DIELoc - Represents an expression location.
This class represents lattice values for constants.
void setMemoryLocationKind()
Lock this down to become a memory location description.
This class provides various memory handling functions that manipulate MemoryBlock instances...
Base class containing the logic for constructing DWARF expressions independently of whether they are ...
unsigned const TargetRegisterInfo * TRI
DwarfExpression(unsigned DwarfVersion)
expr_op_iterator expr_op_begin() const
Visit the elements via ExprOperand wrappers.
Holds a DIExpression and keeps track of how many operands have been consumed so far.
DwarfExpression implementation for .debug_loc entries.
void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits)
Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed to represent a subregister...
expr_op_iterator expr_op_end() const
Optional< DIExpression::ExprOperand > peek() const
Return the current operation.
Optional< DIExpression::ExprOperand > peekNext() const
Return the next operation.
Optional< DIExpression::ExprOperand > take()
Consume one operation.
This dwarf writer support class manages information associated with a source file.
DIExpressionCursor(const DIExpression *Expr)
A structured debug information entry.
This class is intended to be used as a driving class for all asm writers.
Optional< FragmentInfo > getFragmentInfo() const
Retrieve the details of this fragment expression.
bool isMemoryLocation() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
bool isUnknownLocation() const
Promote Memory to Register
Class for arbitrary precision integers.
Optional< DIExpression::FragmentInfo > getFragmentInfo() const
Retrieve the fragment information, if any.
void consume(unsigned N)
Consume N operations.
DIExpression::expr_op_iterator begin() const
void finalize()
This needs to be called last to commit any pending changes.
DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
DIExpressionCursor(ArrayRef< uint64_t > Expr)
DwarfExpression implementation for singular DW_AT_location.
Holds information about all subregisters comprising a register location.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
expr_op_iterator getNext() const
Get the next iterator.
An iterator for expression operands.
SmallVector< Register, 2 > DwarfRegs
The register location, if any.
DIExpression::expr_op_iterator end() const