21 #define GET_INSTRINFO_MC_DESC 22 #include "SystemZGenInstrInfo.inc" 24 #define GET_SUBTARGETINFO_MC_DESC 25 #include "SystemZGenSubtargetInfo.inc" 27 #define GET_REGINFO_MC_DESC 28 #include "SystemZGenRegisterInfo.inc" 31 SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
32 SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
33 SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L,
34 SystemZ::R12L, SystemZ::R13L, SystemZ::R14L, SystemZ::R15L
38 SystemZ::R0H, SystemZ::R1H, SystemZ::R2H, SystemZ::R3H,
39 SystemZ::R4H, SystemZ::R5H, SystemZ::R6H, SystemZ::R7H,
40 SystemZ::R8H, SystemZ::R9H, SystemZ::R10H, SystemZ::R11H,
41 SystemZ::R12H, SystemZ::R13H, SystemZ::R14H, SystemZ::R15H
45 SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
46 SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D,
47 SystemZ::R8D, SystemZ::R9D, SystemZ::R10D, SystemZ::R11D,
48 SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D
52 SystemZ::R0Q, 0, SystemZ::R2Q, 0,
53 SystemZ::R4Q, 0, SystemZ::R6Q, 0,
54 SystemZ::R8Q, 0, SystemZ::R10Q, 0,
55 SystemZ::R12Q, 0, SystemZ::R14Q, 0
59 SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
60 SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
61 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
62 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S
66 SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
67 SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
68 SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
69 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D
73 SystemZ::F0Q, SystemZ::F1Q, 0, 0,
74 SystemZ::F4Q, SystemZ::F5Q, 0, 0,
75 SystemZ::F8Q, SystemZ::F9Q, 0, 0,
76 SystemZ::F12Q, SystemZ::F13Q, 0, 0
80 SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
81 SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
82 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
83 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S,
84 SystemZ::F16S, SystemZ::F17S, SystemZ::F18S, SystemZ::F19S,
85 SystemZ::F20S, SystemZ::F21S, SystemZ::F22S, SystemZ::F23S,
86 SystemZ::F24S, SystemZ::F25S, SystemZ::F26S, SystemZ::F27S,
87 SystemZ::F28S, SystemZ::F29S, SystemZ::F30S, SystemZ::F31S
91 SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
92 SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
93 SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
94 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D,
95 SystemZ::F16D, SystemZ::F17D, SystemZ::F18D, SystemZ::F19D,
96 SystemZ::F20D, SystemZ::F21D, SystemZ::F22D, SystemZ::F23D,
97 SystemZ::F24D, SystemZ::F25D, SystemZ::F26D, SystemZ::F27D,
98 SystemZ::F28D, SystemZ::F29D, SystemZ::F30D, SystemZ::F31D
102 SystemZ::V0, SystemZ::V1,
SystemZ::V2, SystemZ::V3,
103 SystemZ::V4, SystemZ::V5, SystemZ::V6, SystemZ::V7,
104 SystemZ::V8, SystemZ::V9, SystemZ::V10, SystemZ::V11,
105 SystemZ::V12, SystemZ::V13, SystemZ::V14, SystemZ::V15,
106 SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19,
107 SystemZ::V20, SystemZ::V21, SystemZ::V22, SystemZ::V23,
108 SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27,
109 SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
113 SystemZ::A0, SystemZ::A1, SystemZ::A2, SystemZ::A3,
114 SystemZ::A4, SystemZ::A5, SystemZ::A6, SystemZ::A7,
115 SystemZ::A8, SystemZ::A9, SystemZ::A10, SystemZ::A11,
116 SystemZ::A12, SystemZ::A13, SystemZ::A14, SystemZ::A15
120 SystemZ::C0, SystemZ::C1, SystemZ::C2, SystemZ::C3,
121 SystemZ::C4, SystemZ::C5, SystemZ::C6, SystemZ::C7,
122 SystemZ::C8, SystemZ::C9, SystemZ::C10, SystemZ::C11,
123 SystemZ::C12, SystemZ::C13, SystemZ::C14, SystemZ::C15
127 static unsigned Map[SystemZ::NUM_TARGET_REGS];
128 static bool Initialized =
false;
130 for (
unsigned I = 0;
I < 16; ++
I) {
138 for (
unsigned I = 0;
I < 32; ++
I) {
144 assert(Reg < SystemZ::NUM_TARGET_REGS);
161 InitSystemZMCInstrInfo(X);
167 InitSystemZMCRegisterInfo(X, SystemZ::R14D);
173 return createSystemZMCSubtargetInfoImpl(TT, CPU, FS);
177 unsigned SyntaxVariant,
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
const unsigned GR32Regs[16]
unsigned getFirstReg(unsigned Reg)
This class represents lattice values for constants.
const unsigned FP128Regs[16]
const unsigned FP32Regs[16]
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
const unsigned VR64Regs[32]
const unsigned AR32Regs[16]
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
const unsigned GRH32Regs[16]
static MCSubtargetInfo * createSystemZMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
void addInitialFrameState(const MCCFIInstruction &Inst)
static MCInstrInfo * createSystemZMCInstrInfo()
const unsigned CR64Regs[16]
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
unsigned const MachineRegisterInfo * MRI
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
const int64_t CFAOffsetFromInitialSP
Interface to description of machine instruction set.
static void RegisterMCAsmInfo(Target &T, Target::MCAsmInfoCtorFnTy Fn)
RegisterMCAsmInfo - Register a MCAsmInfo implementation for the given target.
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target...
Triple - Helper class for working with autoconf configuration names.
const unsigned FP64Regs[16]
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
static MCAsmInfo * createSystemZMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT)
const unsigned GR128Regs[16]
void LLVMInitializeSystemZTargetMC()
static MCRegisterInfo * createSystemZMCRegisterInfo(const Triple &TT)
const unsigned GR64Regs[16]
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
MCCodeEmitter * createSystemZMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
MCAsmBackend * createSystemZMCAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Target & getTheSystemZTarget()
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target. ...
Generic base class for all target subtargets.
const unsigned VR32Regs[32]
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
StringRef - Represent a constant reference to a string, i.e.
static MCInstPrinter * createSystemZMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
const unsigned VR128Regs[32]