LLVM  8.0.1
Functions | Variables
llvm::SystemZMC Namespace Reference

Functions

unsigned getFirstReg (unsigned Reg)
 
unsigned getRegAsGR64 (unsigned Reg)
 
unsigned getRegAsGR32 (unsigned Reg)
 
unsigned getRegAsGRH32 (unsigned Reg)
 
unsigned getRegAsVR128 (unsigned Reg)
 

Variables

const int64_t CallFrameSize = 160
 
const int64_t CFAOffsetFromInitialSP = CallFrameSize
 
const unsigned GR32Regs [16]
 
const unsigned GRH32Regs [16]
 
const unsigned GR64Regs [16]
 
const unsigned GR128Regs [16]
 
const unsigned FP32Regs [16]
 
const unsigned FP64Regs [16]
 
const unsigned FP128Regs [16]
 
const unsigned VR32Regs [32]
 
const unsigned VR64Regs [32]
 
const unsigned VR128Regs [32]
 
const unsigned AR32Regs [16]
 
const unsigned CR64Regs [16]
 

Function Documentation

◆ getFirstReg()

unsigned llvm::SystemZMC::getFirstReg ( unsigned  Reg)

◆ getRegAsGR32()

unsigned llvm::SystemZMC::getRegAsGR32 ( unsigned  Reg)
inline

Definition at line 72 of file SystemZMCTargetDesc.h.

References getFirstReg().

Referenced by llvm::SystemZAsmPrinter::EmitInstruction(), and lowerRILow().

◆ getRegAsGR64()

unsigned llvm::SystemZMC::getRegAsGR64 ( unsigned  Reg)
inline

◆ getRegAsGRH32()

unsigned llvm::SystemZMC::getRegAsGRH32 ( unsigned  Reg)
inline

Definition at line 77 of file SystemZMCTargetDesc.h.

References getFirstReg().

Referenced by llvm::SystemZAsmPrinter::EmitInstruction(), and lowerRIHigh().

◆ getRegAsVR128()

unsigned llvm::SystemZMC::getRegAsVR128 ( unsigned  Reg)
inline

Variable Documentation

◆ AR32Regs

const unsigned llvm::SystemZMC::AR32Regs
Initial value:
= {
SystemZ::A0, SystemZ::A1, SystemZ::A2, SystemZ::A3,
SystemZ::A4, SystemZ::A5, SystemZ::A6, SystemZ::A7,
SystemZ::A8, SystemZ::A9, SystemZ::A10, SystemZ::A11,
SystemZ::A12, SystemZ::A13, SystemZ::A14, SystemZ::A15
}

Definition at line 112 of file SystemZMCTargetDesc.cpp.

Referenced by DecodeAR32BitRegisterClass(), getFirstReg(), and printMCExpr().

◆ CallFrameSize

const int64_t llvm::SystemZMC::CallFrameSize = 160

◆ CFAOffsetFromInitialSP

const int64_t llvm::SystemZMC::CFAOffsetFromInitialSP = CallFrameSize

◆ CR64Regs

const unsigned llvm::SystemZMC::CR64Regs
Initial value:
= {
SystemZ::C0, SystemZ::C1, SystemZ::C2, SystemZ::C3,
SystemZ::C4, SystemZ::C5, SystemZ::C6, SystemZ::C7,
SystemZ::C8, SystemZ::C9, SystemZ::C10, SystemZ::C11,
SystemZ::C12, SystemZ::C13, SystemZ::C14, SystemZ::C15
}

Definition at line 119 of file SystemZMCTargetDesc.cpp.

Referenced by DecodeCR64BitRegisterClass(), and printMCExpr().

◆ FP128Regs

const unsigned llvm::SystemZMC::FP128Regs
Initial value:
= {
SystemZ::F0Q, SystemZ::F1Q, 0, 0,
SystemZ::F4Q, SystemZ::F5Q, 0, 0,
SystemZ::F8Q, SystemZ::F9Q, 0, 0,
SystemZ::F12Q, SystemZ::F13Q, 0, 0
}

Definition at line 72 of file SystemZMCTargetDesc.cpp.

Referenced by DecodeFP128BitRegisterClass(), getFirstReg(), and llvm::SystemZTargetLowering::getRegForInlineAsmConstraint().

◆ FP32Regs

const unsigned llvm::SystemZMC::FP32Regs
Initial value:
= {
SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S
}

Definition at line 58 of file SystemZMCTargetDesc.cpp.

Referenced by DecodeFP32BitRegisterClass(), and llvm::SystemZTargetLowering::getRegForInlineAsmConstraint().

◆ FP64Regs

const unsigned llvm::SystemZMC::FP64Regs
Initial value:
= {
SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D
}

Definition at line 65 of file SystemZMCTargetDesc.cpp.

Referenced by createPHIsForSelects(), DecodeFP64BitRegisterClass(), llvm::SystemZTargetLowering::getRegForInlineAsmConstraint(), and printMCExpr().

◆ GR128Regs

const unsigned llvm::SystemZMC::GR128Regs
Initial value:
= {
SystemZ::R0Q, 0, SystemZ::R2Q, 0,
SystemZ::R4Q, 0, SystemZ::R6Q, 0,
SystemZ::R8Q, 0, SystemZ::R10Q, 0,
SystemZ::R12Q, 0, SystemZ::R14Q, 0
}

Definition at line 51 of file SystemZMCTargetDesc.cpp.

Referenced by DecodeGR128BitRegisterClass(), getFirstReg(), and llvm::SystemZTargetLowering::getRegForInlineAsmConstraint().

◆ GR32Regs

const unsigned llvm::SystemZMC::GR32Regs
Initial value:
= {
SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L,
SystemZ::R12L, SystemZ::R13L, SystemZ::R14L, SystemZ::R15L
}

Definition at line 30 of file SystemZMCTargetDesc.cpp.

Referenced by decodeBDAddr32Disp12Operand(), decodeBDAddr32Disp20Operand(), DecodeGR32BitRegisterClass(), getFirstReg(), and llvm::SystemZTargetLowering::getRegForInlineAsmConstraint().

◆ GR64Regs

const unsigned llvm::SystemZMC::GR64Regs
Initial value:
= {
SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D,
SystemZ::R8D, SystemZ::R9D, SystemZ::R10D, SystemZ::R11D,
SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D
}

Definition at line 44 of file SystemZMCTargetDesc.cpp.

Referenced by createPHIsForSelects(), DecodeADDR64BitRegisterClass(), decodeBDAddr64Disp12Operand(), decodeBDAddr64Disp20Operand(), decodeBDLAddr64Disp12Len4Operand(), decodeBDLAddr64Disp12Len8Operand(), decodeBDRAddr64Disp12Operand(), decodeBDVAddr64Disp12Operand(), decodeBDXAddr64Disp12Operand(), decodeBDXAddr64Disp20Operand(), DecodeGR64BitRegisterClass(), getFirstReg(), llvm::SystemZTargetLowering::getRegForInlineAsmConstraint(), and printMCExpr().

◆ GRH32Regs

const unsigned llvm::SystemZMC::GRH32Regs
Initial value:
= {
SystemZ::R0H, SystemZ::R1H, SystemZ::R2H, SystemZ::R3H,
SystemZ::R4H, SystemZ::R5H, SystemZ::R6H, SystemZ::R7H,
SystemZ::R8H, SystemZ::R9H, SystemZ::R10H, SystemZ::R11H,
SystemZ::R12H, SystemZ::R13H, SystemZ::R14H, SystemZ::R15H
}

Definition at line 37 of file SystemZMCTargetDesc.cpp.

Referenced by DecodeGRH32BitRegisterClass(), and getFirstReg().

◆ VR128Regs

const unsigned llvm::SystemZMC::VR128Regs
Initial value:
= {
SystemZ::V0, SystemZ::V1, SystemZ::V2, SystemZ::V3,
SystemZ::V4, SystemZ::V5, SystemZ::V6, SystemZ::V7,
SystemZ::V8, SystemZ::V9, SystemZ::V10, SystemZ::V11,
SystemZ::V12, SystemZ::V13, SystemZ::V14, SystemZ::V15,
SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19,
SystemZ::V20, SystemZ::V21, SystemZ::V22, SystemZ::V23,
SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27,
SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
}

Definition at line 101 of file SystemZMCTargetDesc.cpp.

Referenced by createPHIsForSelects(), decodeBDVAddr12Operand(), DecodeVR128BitRegisterClass(), getFirstReg(), llvm::SystemZTargetLowering::getRegForInlineAsmConstraint(), and printMCExpr().

◆ VR32Regs

const unsigned llvm::SystemZMC::VR32Regs
Initial value:
= {
SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S,
SystemZ::F16S, SystemZ::F17S, SystemZ::F18S, SystemZ::F19S,
SystemZ::F20S, SystemZ::F21S, SystemZ::F22S, SystemZ::F23S,
SystemZ::F24S, SystemZ::F25S, SystemZ::F26S, SystemZ::F27S,
SystemZ::F28S, SystemZ::F29S, SystemZ::F30S, SystemZ::F31S
}

Definition at line 79 of file SystemZMCTargetDesc.cpp.

Referenced by DecodeVR32BitRegisterClass(), getFirstReg(), and llvm::SystemZTargetLowering::getRegForInlineAsmConstraint().

◆ VR64Regs

const unsigned llvm::SystemZMC::VR64Regs
Initial value:
= {
SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D,
SystemZ::F16D, SystemZ::F17D, SystemZ::F18D, SystemZ::F19D,
SystemZ::F20D, SystemZ::F21D, SystemZ::F22D, SystemZ::F23D,
SystemZ::F24D, SystemZ::F25D, SystemZ::F26D, SystemZ::F27D,
SystemZ::F28D, SystemZ::F29D, SystemZ::F30D, SystemZ::F31D
}

Definition at line 90 of file SystemZMCTargetDesc.cpp.

Referenced by DecodeVR64BitRegisterClass(), getFirstReg(), and llvm::SystemZTargetLowering::getRegForInlineAsmConstraint().