LLVM  8.0.1
BPFISelLowering.h
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1 //===-- BPFISelLowering.h - BPF DAG Lowering Interface ----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the interfaces that BPF uses to lower LLVM code into a
11 // selection DAG.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_BPF_BPFISELLOWERING_H
16 #define LLVM_LIB_TARGET_BPF_BPFISELLOWERING_H
17 
18 #include "BPF.h"
21 
22 namespace llvm {
23 class BPFSubtarget;
24 namespace BPFISD {
25 enum NodeType : unsigned {
33 };
34 }
35 
37 public:
38  explicit BPFTargetLowering(const TargetMachine &TM, const BPFSubtarget &STI);
39 
40  // Provide custom lowering hooks for some operations.
41  SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
42 
43  // This method returns the name of a target specific DAG node.
44  const char *getTargetNodeName(unsigned Opcode) const override;
45 
46  // This method decides whether folding a constant offset
47  // with the given GlobalAddress is legal.
48  bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
49 
50  std::pair<unsigned, const TargetRegisterClass *>
51  getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
52  StringRef Constraint, MVT VT) const override;
53 
55  EmitInstrWithCustomInserter(MachineInstr &MI,
56  MachineBasicBlock *BB) const override;
57 
58  bool getHasAlu32() const { return HasAlu32; }
59  bool getHasJmpExt() const { return HasJmpExt; }
60 
61  EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
62  EVT VT) const override;
63 
64  MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override;
65 
66 private:
67  // Control Instruction Selection Features
68  bool HasAlu32;
69  bool HasJmpExt;
70 
71  SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
73  SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
74 
75  // Lower the result values of a call, copying them out of physregs into vregs
76  SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
77  CallingConv::ID CallConv, bool IsVarArg,
79  const SDLoc &DL, SelectionDAG &DAG,
80  SmallVectorImpl<SDValue> &InVals) const;
81 
82  // Maximum number of arguments to a call
83  static const unsigned MaxArgs;
84 
85  // Lower a call into CALLSEQ_START - BPFISD:CALL - CALLSEQ_END chain
87  SmallVectorImpl<SDValue> &InVals) const override;
88 
89  // Lower incoming arguments, copy physregs into vregs
90  SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
91  bool IsVarArg,
93  const SDLoc &DL, SelectionDAG &DAG,
94  SmallVectorImpl<SDValue> &InVals) const override;
95 
96  SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
98  const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
99  SelectionDAG &DAG) const override;
100 
101  EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
102  bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc,
103  MachineFunction &MF) const override {
104  return Size >= 8 ? MVT::i64 : MVT::i32;
105  }
106 
107  bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
108  Type *Ty) const override {
109  return true;
110  }
111 
112  unsigned EmitSubregExt(MachineInstr &MI, MachineBasicBlock *BB, unsigned Reg,
113  bool isSigned) const;
114 
115  MachineBasicBlock * EmitInstrWithCustomInserterMemcpy(MachineInstr &MI,
116  MachineBasicBlock *BB)
117  const;
118 
119 };
120 }
121 
122 #endif
static SDValue LowerCallResult(SDValue Chain, SDValue InFlag, const SmallVectorImpl< CCValAssign > &RVLocs, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals)
LowerCallResult - Lower the result values of a call into the appropriate copies out of appropriate ph...
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:877
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
LLVMContext & Context
This class represents lattice values for constants.
Definition: AllocatorList.h:24
unsigned Reg
unsigned const TargetRegisterInfo * TRI
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Machine Value Type.
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
Extended Value Type.
Definition: ValueTypes.h:34
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This structure contains all information that is necessary for lowering calls.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:222
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Class for arbitrary precision integers.
Definition: APInt.h:70
static SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG, const SparcTargetLowering &TLI, bool hasHardQuad)
static SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG, const SparcTargetLowering &TLI, bool hasHardQuad)
Representation of each machine instruction.
Definition: MachineInstr.h:64
uint32_t Size
Definition: Profile.cpp:47
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:59
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
This file describes how to lower LLVM code to machine code.