LLVM
8.0.1
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#include "Target/ARM/ARMTargetTransformInfo.h"
Additional Inherited Members | |
Protected Types inherited from llvm::TargetTransformInfoImplBase | |
typedef TargetTransformInfo | TTI |
Protected Member Functions inherited from llvm::BasicTTIImplBase< ARMTTIImpl > | |
BasicTTIImplBase (const TargetMachine *TM, const DataLayout &DL) | |
Protected Member Functions inherited from llvm::TargetTransformInfoImplCRTPBase< ARMTTIImpl > | |
TargetTransformInfoImplCRTPBase (const DataLayout &DL) | |
Protected Member Functions inherited from llvm::TargetTransformInfoImplBase | |
TargetTransformInfoImplBase (const DataLayout &DL) | |
unsigned | minRequiredElementSize (const Value *Val, bool &isSigned) |
bool | isStridedAccess (const SCEV *Ptr) |
const SCEVConstant * | getConstantStrideStep (ScalarEvolution *SE, const SCEV *Ptr) |
bool | isConstantStridedAccessLessThan (ScalarEvolution *SE, const SCEV *Ptr, int64_t MergeDistance) |
Protected Attributes inherited from llvm::TargetTransformInfoImplBase | |
const DataLayout & | DL |
Definition at line 42 of file ARMTargetTransformInfo.h.
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inlineexplicit |
Definition at line 88 of file ARMTargetTransformInfo.h.
References areInlineCompatible(), and Callee.
Definition at line 39 of file ARMTargetTransformInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), llvm::TargetMachine::getSubtargetImpl(), llvm::TargetLoweringBase::getTargetMachine(), and llvm::SystemZISD::TM.
Referenced by ARMTTIImpl().
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inline |
Definition at line 95 of file ARMTargetTransformInfo.h.
int ARMTTIImpl::getAddressComputationCost | ( | Type * | Val, |
ScalarEvolution * | SE, | ||
const SCEV * | Ptr | ||
) |
Definition at line 383 of file ARMTargetTransformInfo.cpp.
References llvm::TargetTransformInfoImplBase::isConstantStridedAccessLessThan(), and llvm::Type::isVectorTy().
Referenced by getMaxInterleaveFactor().
int ARMTTIImpl::getArithmeticInstrCost | ( | unsigned | Opcode, |
Type * | Ty, | ||
TTI::OperandValueKind | Op1Info = TTI::OK_AnyValue , |
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TTI::OperandValueKind | Op2Info = TTI::OK_AnyValue , |
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TTI::OperandValueProperties | Opd1PropInfo = TTI::OP_None , |
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TTI::OperandValueProperties | Opd2PropInfo = TTI::OP_None , |
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ArrayRef< const Value *> | Args = ArrayRef<const Value *>() |
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) |
Definition at line 477 of file ARMTargetTransformInfo.cpp.
References llvm::CostTableLookup(), llvm::TargetTransformInfoImplBase::DL, llvm::BasicTTIImplBase< ARMTTIImpl >::getArithmeticInstrCost(), llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::ARMSubtarget::hasNEON(), llvm::TargetLoweringBase::InstructionOpcodeToISD(), llvm::AArch64CC::LT, llvm::TargetTransformInfo::OK_UniformConstantValue, llvm::ISD::SDIV, llvm::ISD::SREM, llvm::ISD::UDIV, llvm::ISD::UREM, llvm::MVT::v16i8, llvm::MVT::v1i64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, and llvm::MVT::v8i8.
Referenced by getMaxInterleaveFactor().
int ARMTTIImpl::getCastInstrCost | ( | unsigned | Opcode, |
Type * | Dst, | ||
Type * | Src, | ||
const Instruction * | I = nullptr |
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) |
Definition at line 136 of file ARMTargetTransformInfo.cpp.
References assert(), llvm::ConvertCostTableLookup(), llvm::CostTableLookup(), llvm::TargetTransformInfoImplBase::DL, llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::BasicTTIImplBase< ARMTTIImpl >::getCastInstrCost(), llvm::EVT::getSimpleVT(), llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::TargetLoweringBase::getValueType(), llvm::ARMSubtarget::hasNEON(), llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::TargetLoweringBase::InstructionOpcodeToISD(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::EVT::isSimple(), llvm::EVT::isVector(), llvm::Type::isVectorTy(), llvm::AArch64CC::LT, llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::MVT::v16f32, llvm::MVT::v16i16, llvm::MVT::v16i32, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i16, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v2i8, llvm::MVT::v4f32, llvm::MVT::v4i1, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v4i64, llvm::MVT::v4i8, llvm::MVT::v8f32, llvm::MVT::v8i16, llvm::MVT::v8i32, llvm::MVT::v8i64, llvm::MVT::v8i8, and llvm::ISD::ZERO_EXTEND.
Referenced by getMaxInterleaveFactor().
int ARMTTIImpl::getCmpSelInstrCost | ( | unsigned | Opcode, |
Type * | ValTy, | ||
Type * | CondTy, | ||
const Instruction * | I = nullptr |
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) |
Definition at line 355 of file ARMTargetTransformInfo.cpp.
References llvm::ConvertCostTableLookup(), llvm::TargetTransformInfoImplBase::DL, llvm::BasicTTIImplBase< ARMTTIImpl >::getCmpSelInstrCost(), llvm::EVT::getSimpleVT(), llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::TargetLoweringBase::getValueType(), llvm::ARMSubtarget::hasNEON(), llvm::TargetLoweringBase::InstructionOpcodeToISD(), llvm::EVT::isSimple(), llvm::Type::isVectorTy(), llvm::AArch64CC::LT, llvm::ISD::SELECT, llvm::MVT::v16i1, llvm::MVT::v16i64, llvm::MVT::v4i1, llvm::MVT::v4i64, llvm::MVT::v8i1, and llvm::MVT::v8i64.
Referenced by getMaxInterleaveFactor().
int ARMTTIImpl::getInterleavedMemoryOpCost | ( | unsigned | Opcode, |
Type * | VecTy, | ||
unsigned | Factor, | ||
ArrayRef< unsigned > | Indices, | ||
unsigned | Alignment, | ||
unsigned | AddressSpace, | ||
bool | UseMaskForCond = false , |
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bool | UseMaskForGaps = false |
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) |
Definition at line 562 of file ARMTargetTransformInfo.cpp.
References assert(), llvm::TargetTransformInfoImplBase::DL, llvm::VectorType::get(), llvm::BasicTTIImplBase< ARMTTIImpl >::getInterleavedMemoryOpCost(), llvm::ARMTargetLowering::getNumInterleavedAccesses(), llvm::Type::getScalarType(), llvm::DataLayout::getTypeSizeInBits(), llvm::Type::getVectorNumElements(), and llvm::ARMTargetLowering::isLegalInterleavedAccessType().
Referenced by getMaxInterleaveFactor().
int ARMTTIImpl::getIntImmCodeSizeCost | ( | unsigned | Opcode, |
unsigned | Idx, | ||
const APInt & | Imm, | ||
Type * | Ty | ||
) |
Definition at line 91 of file ARMTargetTransformInfo.cpp.
References llvm::APInt::getLimitedValue(), and llvm::APInt::isNonNegative().
Referenced by isFPVectorizationPotentiallyUnsafe().
Definition at line 57 of file ARMTargetTransformInfo.cpp.
References assert(), llvm::tgtok::Bits, llvm::APInt::getActiveBits(), llvm::Type::getPrimitiveSizeInBits(), llvm::APInt::getSExtValue(), llvm::ARM_AM::getSOImmVal(), llvm::ARM_AM::getT2SOImmVal(), llvm::APInt::getZExtValue(), llvm::ARMSubtarget::hasV6T2Ops(), llvm::Type::isIntegerTy(), llvm::ARMSubtarget::isThumb(), llvm::ARMSubtarget::isThumb2(), and llvm::ARM_AM::isThumbImmShiftedVal().
Referenced by getIntImmCost(), and isFPVectorizationPotentiallyUnsafe().
Definition at line 99 of file ARMTargetTransformInfo.cpp.
References llvm::MCID::Add, llvm::Type::getIntegerBitWidth(), getIntImmCost(), llvm::APInt::getSExtValue(), llvm::APInt::isAllOnesValue(), llvm::APInt::isNegative(), llvm::ARMSubtarget::isThumb(), and llvm::ARMSubtarget::isThumb2().
Definition at line 142 of file ARMTargetTransformInfo.h.
References llvm::AMDGPU::HSAMD::Kernel::Key::Args, getAddressComputationCost(), getArithmeticInstrCost(), getCastInstrCost(), getCmpSelInstrCost(), getInterleavedMemoryOpCost(), llvm::ARMSubtarget::getMaxInterleaveFactor(), getMemoryOpCost(), getShuffleCost(), getUnrollingPreferences(), getVectorInstrCost(), I, Kind, llvm::TargetTransformInfo::OK_AnyValue, and llvm::TargetTransformInfo::OP_None.
int ARMTTIImpl::getMemoryOpCost | ( | unsigned | Opcode, |
Type * | Src, | ||
unsigned | Alignment, | ||
unsigned | AddressSpace, | ||
const Instruction * | I = nullptr |
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) |
Definition at line 549 of file ARMTargetTransformInfo.cpp.
References llvm::TargetTransformInfoImplBase::DL, llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::Type::getVectorElementType(), llvm::Type::isDoubleTy(), llvm::Type::isVectorTy(), and llvm::AArch64CC::LT.
Referenced by getMaxInterleaveFactor().
Definition at line 120 of file ARMTargetTransformInfo.h.
References llvm::ARMSubtarget::hasNEON(), and llvm::ARMSubtarget::isThumb1Only().
Definition at line 132 of file ARMTargetTransformInfo.h.
References llvm::ARMSubtarget::hasNEON().
int ARMTTIImpl::getShuffleCost | ( | TTI::ShuffleKind | Kind, |
Type * | Tp, | ||
int | Index, | ||
Type * | SubTp | ||
) |
Definition at line 401 of file ARMTargetTransformInfo.cpp.
References llvm::CostTableLookup(), llvm::TargetTransformInfoImplBase::DL, llvm::BasicTTIImplBase< ARMTTIImpl >::getShuffleCost(), llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::AArch64CC::LT, llvm::TargetTransformInfo::SK_Broadcast, llvm::TargetTransformInfo::SK_Reverse, llvm::TargetTransformInfo::SK_Select, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4f32, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, llvm::MVT::v8i8, and llvm::ISD::VECTOR_SHUFFLE.
Referenced by getMaxInterleaveFactor().
void ARMTTIImpl::getUnrollingPreferences | ( | Loop * | L, |
ScalarEvolution & | SE, | ||
TTI::UnrollingPreferences & | UP | ||
) |
Definition at line 593 of file ARMTargetTransformInfo.cpp.
References llvm::dbgs(), llvm::TargetTransformInfo::UnrollingPreferences::DefaultUnrollRuntimeCount, F(), llvm::TargetTransformInfo::UnrollingPreferences::Force, llvm::LoopBase< BlockT, LoopT >::getBlocks(), llvm::CallSiteBase< FunTy, BBTy, ValTy, UserTy, UseTy, InstrTy, CallTy, InvokeTy, IterTy >::getCalledFunction(), llvm::LoopBase< BlockT, LoopT >::getExitingBlocks(), llvm::LoopBase< BlockT, LoopT >::getHeader(), llvm::LoopBase< BlockT, LoopT >::getNumBlocks(), llvm::BasicBlock::getParent(), llvm::BasicTTIImplBase< T >::getUnrollingPreferences(), llvm::TargetTransformInfoImplCRTPBase< ARMTTIImpl >::getUserCost(), llvm::ARMSubtarget::hasBranchPredictor(), I, llvm::TargetTransformInfoImplBase::isLoweredToCall(), llvm::ARMSubtarget::isMClass(), llvm::ARMSubtarget::isThumb2(), LLVM_DEBUG, llvm::Function::optForSize(), llvm::TargetTransformInfo::UnrollingPreferences::OptSizeThreshold, llvm::TargetTransformInfo::UnrollingPreferences::Partial, llvm::TargetTransformInfo::UnrollingPreferences::PartialOptSizeThreshold, llvm::TargetTransformInfo::UnrollingPreferences::Runtime, llvm::SmallVectorBase::size(), llvm::TargetTransformInfo::UnrollingPreferences::UnrollAndJam, llvm::TargetTransformInfo::UnrollingPreferences::UnrollAndJamInnerLoopThreshold, and llvm::TargetTransformInfo::UnrollingPreferences::UnrollRemainder.
Referenced by getMaxInterleaveFactor().
Definition at line 330 of file ARMTargetTransformInfo.cpp.
References llvm::Type::getScalarSizeInBits(), llvm::Type::getVectorElementType(), llvm::BasicTTIImplBase< ARMTTIImpl >::getVectorInstrCost(), llvm::ARMSubtarget::hasSlowLoadDSubregister(), llvm::Type::isIntegerTy(), llvm::Type::isVectorTy(), and llvm::max().
Referenced by getMaxInterleaveFactor().
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inline |
Floating-point computation using ARMv8 AArch32 Advanced SIMD instructions remains unchanged from ARMv7.
Only AArch64 SIMD is IEEE-754 compliant, but it's not covered in this target.
Definition at line 100 of file ARMTargetTransformInfo.h.
References getIntImmCodeSizeCost(), getIntImmCost(), llvm::TargetTransformInfoImplBase::getIntImmCost(), and llvm::ARMSubtarget::isTargetDarwin().
Definition at line 179 of file ARMTargetTransformInfo.h.
References llvm::ARMSubtarget::isROPI(), llvm::ARMSubtarget::isRWPI(), and llvm::Constant::needsRelocation().