14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H 15 #define LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H 30 #define GET_SUBTARGETINFO_HEADER 31 #include "AArch64GenSubtargetInfo.inc" 217 void initializeProperties();
284 return CustomCallSavedXRegs[i];
433 unsigned NumRegionInstrs)
const override;
const Triple & getTargetTriple() const
bool isOSDarwin() const
isOSDarwin - Is this a "Darwin" OS (OS X, iOS, or watchOS).
uint16_t PrefetchDistance
bool hasAlternativeNZCV() const
C - The default llvm calling convention, compatible with C.
bool isLittleEndian() const
bool isMisaligned128StoreSlow() const
This class represents lattice values for constants.
bool hasCustomCallingConv() const
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
BitVector CustomCallSavedXRegs
bool predictableSelectIsExpensive() const
unsigned char ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const
ClassifyGlobalReference - Find the target operand flags that describe how a global value should be re...
const InstructionSelector * getInstructionSelector() const override
bool UseAlternateSExtLoadCVTF32Pattern
The C convention as implemented on Windows/x86-64 and AArch64.
BitVector ReserveXRegister
AArch64SelectionDAGInfo TSInfo
bool HasZeroCycleZeroingFP
const AArch64FrameLowering * getFrameLowering() const override
bool HasFuseArithmeticLogic
bool DisableLatencySchedHeuristic
const CallLowering * getCallLowering() const override
bool isCallingConvWin64(CallingConv::ID CC) const
bool hasCustomCheapAsMoveHandling() const
bool hasFuseLiterals() const
void mirFileLoaded(MachineFunction &MF) const override
bool isTargetCOFF() const
void overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
bool hasFuseArithmeticLogic() const
unsigned getCacheLineSize() const
Holds all the information related to register banks.
bool hasFusion() const
Return true if the CPU supports any kind of instruction fusion.
bool isTargetDarwin() const
bool hasFRInt3264() const
bool hasArithmeticBccFusion() const
bool hasZeroCycleRegMove() const
bool isTargetMachO() const
bool force32BitJumpTables() const
bool hasFuseAddress() const
std::unique_ptr< InstructionSelector > InstSelector
Fast - This calling convention attempts to make calls as fast as possible (e.g.
uint8_t VectorInsertExtractBaseCost
unsigned MinVectorRegisterBitWidth
bool useAlternateSExtLoadCVTF32Pattern() const
bool hasComplxNum() const
const AArch64RegisterInfo * getRegisterInfo() const override
std::unique_ptr< LegalizerInfo > Legalizer
unsigned getPrefetchDistance() const
bool useAA() const override
bool isiOS() const
Is this an iOS triple.
unsigned getWideningBaseCost() const
bool hasSpecRestrict() const
bool isTargetFuchsia() const
bool enableMachineScheduler() const override
bool isXRegisterReserved(size_t i) const
bool supportsAddressTopByteIgnored() const
CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it...
bool enableEarlyIfConversion() const override
unsigned getMinVectorRegisterBitWidth() const
bool isTargetWindows() const
bool isOSWindows() const
Tests whether the OS is Windows.
bool HasArithmeticBccFusion
const AArch64TargetLowering * getTargetLowering() const override
bool isTargetAndroid() const
const AArch64RegisterInfo & getRegisterInfo() const
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
bool Misaligned128StoreIsSlow
bool requiresStrictAlign() const
bool Force32BitJumpTables
bool isOSBinFormatCOFF() const
Tests whether the OS uses the COFF binary format.
bool hasExynosCheapAsMoveHandling() const
bool isXRaySupported() const override
bool balanceFPOps() const
unsigned MaxPrefetchIterationsAhead
bool any() const
any - Returns true if any bit is set.
unsigned PrefLoopAlignment
unsigned getPrefFunctionAlignment() const
bool useSmallAddressing() const
std::unique_ptr< CallLowering > CallLoweringInfo
GlobalISel related APIs.
unsigned PrefFunctionAlignment
bool isOSBinFormatMachO() const
Tests whether the environment is MachO.
bool hasAggressiveFMA() const
uint16_t MinPrefetchStride
const TargetMachine & getTargetMachine() const
Triple - Helper class for working with autoconf configuration names.
bool isPaired128Slow() const
bool hasTRACEV8_4() const
unsigned getMinPrefetchStride() const
const AArch64SelectionDAGInfo * getSelectionDAGInfo() const override
bool hasArithmeticCbzFusion() const
size_type count() const
count - Returns the number of bits which are set.
AArch64InstrInfo InstrInfo
unsigned getMaximumJumpTableSize() const
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
bool isOSLinux() const
Tests whether the OS is Linux.
unsigned WideningBaseCost
bool hasFuseCryptoEOR() const
bool enablePostRAScheduler() const override
CodeModel::Model getCodeModel() const
Returns the code model.
unsigned getMaxInterleaveFactor() const
unsigned getNumXRegisterReserved() const
std::unique_ptr< RegisterBankInfo > RegBankInfo
Provides the logic to select generic machine instructions.
Define a generic scheduling policy for targets that don't provide their own MachineSchedStrategy.
std::unique_ptr< PBQPRAConstraint > getCustomPBQPConstraints() const override
AArch64Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian)
This constructor initializes the data members to match that of the specified triple.
const LegalizerInfo * getLegalizerInfo() const override
AArch64FrameLowering FrameLowering
ARMProcFamilyEnum getProcFamily() const
Returns ARM processor family.
bool hasZeroCycleZeroingFPWorkaround() const
unsigned MaxJumpTableSize
uint8_t MaxInterleaveFactor
Triple TargetTriple
TargetTriple - What processor and OS we're targeting.
ARMProcFamilyEnum ARMProcFamily
ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
bool hasZeroCycleZeroingFP() const
bool hasZeroCycleZeroingGP() const
unsigned getMaxPrefetchIterationsAhead() const
bool isXRegCustomCalleeSaved(size_t i) const
const AArch64InstrInfo * getInstrInfo() const override
This file describes how to lower LLVM calls to machine code calls.
const RegisterBankInfo * getRegBankInfo() const override
bool isAndroid() const
Tests whether the target is Android.
Primary interface to the complete machine description for the target machine.
bool isTargetLinux() const
bool hasRCPC_IMMO() const
StringRef - Represent a constant reference to a string, i.e.
AArch64TargetLowering TLInfo
unsigned char classifyGlobalFunctionReference(const GlobalValue *GV, const TargetMachine &TM) const
bool hasFuseCCSelect() const
bool HasZeroCycleZeroingFPWorkaround
bool HasZeroCycleZeroingGP
bool PredictableSelectIsExpensive
bool isSTRQroSlow() const
unsigned getPrefLoopAlignment() const
bool HasArithmeticCbzFusion
unsigned getVectorInsertExtractBaseCost() const