19 #include "llvm/Config/llvm-config.h" 29 #define DEBUG_TYPE DebugType 33 const char *ParentDebugType)
40 unsigned ScoreboardDepth = 1;
41 if (ItinData && !ItinData->
isEmpty()) {
42 for (
unsigned idx = 0; ; ++idx) {
48 unsigned CurCycle = 0;
49 unsigned ItinDepth = 0;
50 for (; IS !=
E; ++IS) {
51 unsigned StageDepth = CurCycle + IS->
getCycles();
52 if (ItinDepth < StageDepth) ItinDepth = StageDepth;
57 while (ItinDepth > ScoreboardDepth) {
67 ReservedScoreboard.reset(ScoreboardDepth);
68 RequiredScoreboard.reset(ScoreboardDepth);
76 LLVM_DEBUG(
dbgs() <<
"Using scoreboard hazard recognizer: Depth = " 77 << ScoreboardDepth <<
'\n');
83 RequiredScoreboard.reset();
84 ReservedScoreboard.reset();
87 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 89 dbgs() <<
"Scoreboard:\n";
91 unsigned last =
Depth - 1;
92 while ((last > 0) && ((*
this)[last] == 0))
95 for (
unsigned i = 0; i <= last; i++) {
96 unsigned FUs = (*this)[i];
98 for (
int j = 31; j >= 0; j--)
99 dbgs() << ((FUs & (1 << j)) ?
'1' :
'0');
109 return IssueCount == IssueWidth;
114 if (!ItinData || ItinData->
isEmpty())
130 *
E = ItinData->
endStage(idx); IS !=
E; ++IS) {
134 for (
unsigned int i = 0; i < IS->getCycles(); ++i) {
135 int StageCycle = cycle + (int)i;
139 if (StageCycle >= (
int)RequiredScoreboard.getDepth()) {
140 assert((StageCycle - Stalls) < (
int)RequiredScoreboard.getDepth() &&
141 "Scoreboard depth exceeded!");
146 unsigned freeUnits = IS->getUnits();
147 switch (IS->getReservationKind()) {
150 freeUnits &= ~ReservedScoreboard[StageCycle];
154 freeUnits &= ~RequiredScoreboard[StageCycle];
159 LLVM_DEBUG(
dbgs() <<
"*** Hazard in cycle +" << StageCycle <<
", ");
166 cycle += IS->getNextCycles();
173 if (!ItinData || ItinData->
isEmpty())
179 assert(MCID &&
"The scheduler must filter non-machineinstrs");
189 *
E = ItinData->
endStage(idx); IS !=
E; ++IS) {
193 for (
unsigned int i = 0; i < IS->getCycles(); ++i) {
194 assert(((cycle + i) < RequiredScoreboard.getDepth()) &&
195 "Scoreboard depth exceeded!");
197 unsigned freeUnits = IS->getUnits();
198 switch (IS->getReservationKind()) {
201 freeUnits &= ~ReservedScoreboard[cycle + i];
205 freeUnits &= ~RequiredScoreboard[cycle + i];
210 unsigned freeUnit = 0;
212 freeUnit = freeUnits;
213 freeUnits = freeUnit & (freeUnit - 1);
217 RequiredScoreboard[cycle + i] |= freeUnit;
219 ReservedScoreboard[cycle + i] |= freeUnit;
223 cycle += IS->getNextCycles();
232 ReservedScoreboard[0] = 0; ReservedScoreboard.advance();
233 RequiredScoreboard[0] = 0; RequiredScoreboard.advance();
238 ReservedScoreboard[ReservedScoreboard.getDepth()-1] = 0;
239 ReservedScoreboard.recede();
240 RequiredScoreboard[RequiredScoreboard.getDepth()-1] = 0;
241 RequiredScoreboard.recede();
This class represents lattice values for constants.
const InstrStage * beginStage(unsigned ItinClassIndx) const
Return the first stage of the itinerary.
void RecedeCycle() override
RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot...
Describe properties that are true of each instruction in the target description file.
virtual void dumpNode(const SUnit &SU) const =0
static void dump(StringRef Title, SpillInfo const &Spills)
ScoreboardHazardRecognizer(const InstrItineraryData *II, const ScheduleDAG *DAG, const char *ParentDebugType="")
const MCInstrDesc * getInstrDesc(const SUnit *SU) const
Returns the MCInstrDesc of this SUnit.
bool atIssueLimit() const override
atIssueLimit - Return true if no more instructions may be issued in this cycle.
void EmitInstruction(SUnit *SU) override
EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard stat...
Itinerary data supplied by a subtarget to be used by a target.
unsigned MaxLookAhead
MaxLookAhead - Indicate the number of cycles in the scoreboard state.
unsigned getSchedClass() const
Return the scheduling class for this instruction.
unsigned getNextCycles() const
Returns the number of cycles from the start of this stage to the start of the next stage in the itine...
HazardType getHazardType(SUnit *SU, int Stalls) override
getHazardType - Return the hazard type of emitting this node.
HazardRecognizer - This determines whether or not an instruction can be issued this cycle...
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
void Reset() override
Reset - This callback is invoked when a new block of instructions is about to be schedule.
void AdvanceCycle() override
AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot...
bool isEndMarker(unsigned ItinClassIndx) const
Returns true if the index is for the end marker itinerary.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
unsigned getCycles() const
Returns the number of cycles the stage is occupied.
bool isEmpty() const
Returns true if there are no itineraries.
MCSchedModel SchedModel
Basic machine properties.
These values represent a non-pipelined step in the execution of an instruction.
const InstrStage * endStage(unsigned ItinClassIndx) const
Return the last+1 stage of the itinerary.
bool isZeroCost(unsigned Opcode) const
Return true for pseudo instructions that don't consume any machine resources in their current form...
const TargetInstrInfo * TII
Target instruction information.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Scheduling unit. This is a node in the scheduling DAG.