LLVM  8.0.1
ARMAsmBackendDarwin.h
Go to the documentation of this file.
1 //===-- ARMAsmBackendDarwin.h ARM Asm Backend Darwin ----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_LIB_TARGET_ARM_ARMASMBACKENDDARWIN_H
11 #define LLVM_LIB_TARGET_ARM_ARMASMBACKENDDARWIN_H
12 
13 #include "ARMAsmBackend.h"
15 #include "llvm/MC/MCObjectWriter.h"
16 
17 namespace llvm {
19  const MCRegisterInfo &MRI;
20 public:
23  const MCRegisterInfo &MRI, MachO::CPUSubTypeARM st)
24  : ARMAsmBackend(T, STI, support::little), MRI(MRI), Subtype(st) {}
25 
26  std::unique_ptr<MCObjectTargetWriter>
27  createObjectTargetWriter() const override {
28  return createARMMachObjectWriter(/*Is64Bit=*/false, MachO::CPU_TYPE_ARM,
29  Subtype);
30  }
31 
33  ArrayRef<MCCFIInstruction> Instrs) const override;
34 };
35 } // end namespace llvm
36 
37 #endif
This class represents lattice values for constants.
Definition: AllocatorList.h:24
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
uint32_t generateCompactUnwindEncoding(ArrayRef< MCCFIInstruction > Instrs) const override
Generate compact unwind encoding for the function based on the CFI instructions.
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
ARMAsmBackendDarwin(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, MachO::CPUSubTypeARM st)
const MachO::CPUSubTypeARM Subtype
Target - Wrapper for Target specific information.
std::unique_ptr< MCObjectTargetWriter > createARMMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an ARM Mach-O object writer.
Generic base class for all target subtargets.