#include "Target/AMDGPU/AMDGPURegisterBankInfo.h"

Inheritance diagram for llvm::AMDGPURegisterBankInfo:

Collaboration diagram for llvm::AMDGPURegisterBankInfo:

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Public Member Functions
	AMDGPURegisterBankInfo (const TargetRegisterInfo &TRI)

unsigned	copyCost (const RegisterBank &A, const RegisterBank &B, unsigned Size) const override
	Get the cost of a copy from `B` to `A`, or put differently, get the cost of A = COPY B. More...

const RegisterBank &	getRegBankFromRegClass (const TargetRegisterClass &RC) const override
	Get a register bank that covers `RC`. More...

InstructionMappings	getInstrAlternativeMappings (const MachineInstr &MI) const override
	Get the alternative mappings for `MI`. More...

const InstructionMapping &	getInstrMapping (const MachineInstr &MI) const override
	This function must return a legal mapping, because AMDGPURegisterBankInfo::getInstrAlternativeMappings() is not called in RegBankSelect::Mode::Fast. More...

Public Member Functions inherited from llvm::RegisterBankInfo
const RegisterBank *	getRegBankFromConstraints (const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) const
	Get the register bank for the `OpIdx-th` operand of `MI` form the encoding constraints, if any. More...

virtual	~RegisterBankInfo ()=default

const RegisterBank &	getRegBank (unsigned ID) const
	Get the register bank identified by `ID`. More...

const RegisterBank *	getRegBank (unsigned Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI) const
	Get the register bank of `Reg`. More...

unsigned	getNumRegBanks () const
	Get the total number of register banks. More...

const InstructionMapping &	getInstructionMapping (unsigned ID, unsigned Cost, const ValueMapping *OperandsMapping, unsigned NumOperands) const
	Method to get a uniquely generated InstructionMapping. More...

const InstructionMapping &	getInvalidInstructionMapping () const
	Method to get a uniquely generated invalid InstructionMapping. More...

Additional Inherited Members
Public Types inherited from llvm::RegisterBankInfo
using	InstructionMappings = SmallVector< const InstructionMapping *, 4 >
	Convenient type to represent the alternatives for mapping an instruction. More...

Static Public Member Functions inherited from llvm::RegisterBankInfo
static void	applyDefaultMapping (const OperandsMapper &OpdMapper)
	Helper method to apply something that is like the default mapping. More...

static const TargetRegisterClass *	constrainGenericRegister (unsigned Reg, const TargetRegisterClass &RC, MachineRegisterInfo &MRI)
	Constrain the (possibly generic) virtual register `Reg` to `RC`. More...

Public Attributes inherited from llvm::RegisterBankInfo
struct llvm::RegisterBankInfo::PartialMapping	ScalarAddx2

	VectorAdd
	Get the possible mapping for `MI`. More...

Static Public Attributes inherited from llvm::RegisterBankInfo
static const unsigned	DefaultMappingID = UINT_MAX
	Identifier used when the related instruction mapping instance is generated by target independent code. More...

static const unsigned	InvalidMappingID = UINT_MAX - 1
	Identifier used when the related instruction mapping instance is generated by the default constructor. More...

Protected Member Functions inherited from llvm::RegisterBankInfo
	RegisterBankInfo (RegisterBank **RegBanks, unsigned NumRegBanks)
	Create a RegisterBankInfo that can accommodate up to `NumRegBanks` RegisterBank instances. More...

	RegisterBankInfo ()
	This constructor is meaningless. More...

RegisterBank &	getRegBank (unsigned ID)
	Get the register bank identified by `ID`. More...

const TargetRegisterClass &	getMinimalPhysRegClass (unsigned Reg, const TargetRegisterInfo &TRI) const
	Get the MinimalPhysRegClass for Reg. More...

const InstructionMapping &	getInstrMappingImpl (const MachineInstr &MI) const
	Try to get the mapping of `MI`. More...

const PartialMapping &	getPartialMapping (unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) const
	Get the uniquely generated PartialMapping for the given arguments. More...

const ValueMapping &	getValueMapping (unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) const
	The most common ValueMapping consists of a single PartialMapping. More...

const ValueMapping &	getValueMapping (const PartialMapping *BreakDown, unsigned NumBreakDowns) const
	Get the ValueMapping for the given arguments. More...

template<typename Iterator >
const ValueMapping *	getOperandsMapping (Iterator Begin, Iterator End) const
	Get the uniquely generated array of ValueMapping for the elements of between `Begin` and `End`. More...

const ValueMapping *	getOperandsMapping (const SmallVectorImpl< const ValueMapping *> &OpdsMapping) const
	Get the uniquely generated array of ValueMapping for the elements of `OpdsMapping`. More...

const ValueMapping *	getOperandsMapping (std::initializer_list< const ValueMapping *> OpdsMapping) const
	Get the uniquely generated array of ValueMapping for the given arguments. More...

Protected Attributes inherited from llvm::RegisterBankInfo
RegisterBank **	RegBanks
	Hold the set of supported register banks. More...

unsigned	NumRegBanks
	Total number of register banks. More...

DenseMap< unsigned, std::unique_ptr< const PartialMapping > >	MapOfPartialMappings
	Keep dynamically allocated PartialMapping in a separate map. More...

DenseMap< unsigned, std::unique_ptr< const ValueMapping > >	MapOfValueMappings
	Keep dynamically allocated ValueMapping in a separate map. More...

DenseMap< unsigned, std::unique_ptr< ValueMapping[]> >	MapOfOperandsMappings
	Keep dynamically allocated array of ValueMapping in a separate map. More...

DenseMap< unsigned, std::unique_ptr< const InstructionMapping > >	MapOfInstructionMappings
	Keep dynamically allocated InstructionMapping in a separate map. More...

DenseMap< unsigned, const TargetRegisterClass * >	PhysRegMinimalRCs
	Getting the minimal register class of a physreg is expensive. More...

Detailed Description

Definition at line 36 of file AMDGPURegisterBankInfo.h.

Constructor & Destructor Documentation

◆ AMDGPURegisterBankInfo()

AMDGPURegisterBankInfo::AMDGPURegisterBankInfo ( const TargetRegisterInfo & TRI )

Definition at line 34 of file AMDGPURegisterBankInfo.cpp.

References assert(), and llvm::RegisterBankInfo::getRegBank().

Member Function Documentation

◆ copyCost()

unsigned AMDGPURegisterBankInfo::copyCost	(	const RegisterBank &	A,
		const RegisterBank &	B,
		unsigned	Size
	)		const

overridevirtual

Get the cost of a copy from B to A, or put differently, get the cost of A = COPY B.

Since register banks may cover different size, Size specifies what will be the size in bits that will be copied around.

Note: Since this is a copy, both registers have the same size.

Reimplemented from llvm::RegisterBankInfo.

Definition at line 73 of file AMDGPURegisterBankInfo.cpp.

References llvm::RegisterBankInfo::copyCost(), llvm::RegisterBank::getID(), and llvm::max().

◆ getInstrAlternativeMappings()

RegisterBankInfo::InstructionMappings AMDGPURegisterBankInfo::getInstrAlternativeMappings ( const MachineInstr & MI ) const

overridevirtual

Get the alternative mappings for MI.

Alternative in the sense different from getInstrMapping.

Reimplemented from llvm::RegisterBankInfo.

Definition at line 102 of file AMDGPURegisterBankInfo.cpp.

References llvm::RegisterBankInfo::applyDefaultMapping(), assert(), llvm::RegisterBankInfo::getInstrAlternativeMappings(), llvm::RegisterBankInfo::getInstructionMapping(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::RegisterBankInfo::getOperandsMapping(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::getSizeInBits(), llvm::MachineRegisterInfo::getType(), getValueMapping(), MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and Size.

◆ getInstrMapping()

const RegisterBankInfo::InstructionMapping & AMDGPURegisterBankInfo::getInstrMapping ( const MachineInstr & MI ) const

overridevirtual

This function must return a legal mapping, because AMDGPURegisterBankInfo::getInstrAlternativeMappings() is not called in RegBankSelect::Mode::Fast.

Any mapping that would cause a VGPR to SGPR generated is illegal.

Reimplemented from llvm::RegisterBankInfo.

Definition at line 385 of file AMDGPURegisterBankInfo.cpp.

References llvm::Intrinsic::amdgcn_cvt_pkrtz, llvm::Intrinsic::amdgcn_exp, llvm::Intrinsic::amdgcn_exp_compr, llvm::Intrinsic::amdgcn_kernarg_segment_ptr, llvm::Intrinsic::amdgcn_wqm_vote, assert(), llvm::RegisterBankInfo::getInstrMappingImpl(), llvm::RegisterBankInfo::getInstructionMapping(), llvm::MachineOperand::getIntrinsicID(), llvm::RegisterBankInfo::getInvalidInstructionMapping(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::RegisterBankInfo::getOperandsMapping(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::getSizeInBits(), llvm::MachineRegisterInfo::getType(), getValueMapping(), isConstant(), llvm::MachineOperand::isReg(), llvm::RegisterBankInfo::InstructionMapping::isValid(), LLVM_FALLTHROUGH, llvm::Intrinsic::maxnum, llvm::Intrinsic::minnum, MRI, and Size.

◆ getRegBankFromRegClass()

const RegisterBank & AMDGPURegisterBankInfo::getRegBankFromRegClass ( const TargetRegisterClass & RC ) const

overridevirtual

Get a register bank that covers RC.

Precondition: RC is a user-defined register class (as opposed as one generated by TableGen).

Note: The mapping RC -> RegBank could be built while adding the coverage for the register banks. However, we do not do it, because, at least for now, we only need this information for register classes that are used in the description of instruction. In other words, there are just a handful of them and we do not want to waste space.

Todo:: This should be TableGen'ed.

Reimplemented from llvm::RegisterBankInfo.

Definition at line 92 of file AMDGPURegisterBankInfo.cpp.

References llvm::RegisterBankInfo::getRegBank(), and llvm::SIRegisterInfo::isSGPRClass().

The documentation for this class was generated from the following files:

lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Public Member Functions

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ AMDGPURegisterBankInfo()

Member Function Documentation

◆ copyCost()

◆ getInstrAlternativeMappings()

◆ getInstrMapping()

◆ getRegBankFromRegClass()