LLVM
8.0.1
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#include "RISCVInstrInfo.h"
#include "RISCV.h"
#include "RISCVSubtarget.h"
#include "RISCVTargetMachine.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#include "RISCVGenInstrInfo.inc"
Go to the source code of this file.
Macros | |
#define | GET_INSTRINFO_CTOR_DTOR |
Functions | |
static void | parseCondBranch (MachineInstr &LastInst, MachineBasicBlock *&Target, SmallVectorImpl< MachineOperand > &Cond) |
static unsigned | getOppositeBranchOpcode (int Opc) |
#define GET_INSTRINFO_CTOR_DTOR |
Definition at line 27 of file RISCVInstrInfo.cpp.
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Definition at line 194 of file RISCVInstrInfo.cpp.
References llvm_unreachable.
Referenced by llvm::RISCVInstrInfo::reverseBranchCondition().
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static |
Definition at line 183 of file RISCVInstrInfo.cpp.
References assert(), llvm::MachineOperand::CreateImm(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MCInstrDesc::isConditionalBranch(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by llvm::RISCVInstrInfo::analyzeBranch().