LLVM  8.0.1
RISCVSubtarget.h
Go to the documentation of this file.
1 //===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the RISCV specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
15 #define LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
16 
17 #include "RISCVFrameLowering.h"
18 #include "RISCVISelLowering.h"
19 #include "RISCVInstrInfo.h"
22 #include "llvm/IR/DataLayout.h"
24 
25 #define GET_SUBTARGETINFO_HEADER
26 #include "RISCVGenSubtargetInfo.inc"
27 
28 namespace llvm {
29 class StringRef;
30 
32  virtual void anchor();
33  bool HasStdExtM = false;
34  bool HasStdExtA = false;
35  bool HasStdExtF = false;
36  bool HasStdExtD = false;
37  bool HasStdExtC = false;
38  bool HasRV64 = false;
39  bool EnableLinkerRelax = false;
40  unsigned XLen = 32;
41  MVT XLenVT = MVT::i32;
42  RISCVFrameLowering FrameLowering;
43  RISCVInstrInfo InstrInfo;
44  RISCVRegisterInfo RegInfo;
45  RISCVTargetLowering TLInfo;
47 
48  /// Initializes using the passed in CPU and feature strings so that we can
49  /// use initializer lists for subtarget initialization.
50  RISCVSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
51  bool Is64Bit);
52 
53 public:
54  // Initializes the data members to match that of the specified triple.
55  RISCVSubtarget(const Triple &TT, const std::string &CPU,
56  const std::string &FS, const TargetMachine &TM);
57 
58  // Parses features string setting specified subtarget options. The
59  // definition of this function is auto-generated by tblgen.
61 
62  const RISCVFrameLowering *getFrameLowering() const override {
63  return &FrameLowering;
64  }
65  const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; }
66  const RISCVRegisterInfo *getRegisterInfo() const override {
67  return &RegInfo;
68  }
69  const RISCVTargetLowering *getTargetLowering() const override {
70  return &TLInfo;
71  }
72  const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
73  return &TSInfo;
74  }
75  bool hasStdExtM() const { return HasStdExtM; }
76  bool hasStdExtA() const { return HasStdExtA; }
77  bool hasStdExtF() const { return HasStdExtF; }
78  bool hasStdExtD() const { return HasStdExtD; }
79  bool hasStdExtC() const { return HasStdExtC; }
80  bool is64Bit() const { return HasRV64; }
81  bool enableLinkerRelax() const { return EnableLinkerRelax; }
82  MVT getXLenVT() const { return XLenVT; }
83  unsigned getXLen() const { return XLen; }
84 };
85 } // End llvm namespace
86 
87 #endif
This class represents lattice values for constants.
Definition: AllocatorList.h:24
const RISCVRegisterInfo * getRegisterInfo() const override
const SelectionDAGTargetInfo * getSelectionDAGInfo() const override
unsigned getXLen() const
bool hasStdExtA() const
bool enableLinkerRelax() const
Machine Value Type.
bool hasStdExtF() const
const RISCVTargetLowering * getTargetLowering() const override
bool hasStdExtM() const
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
RISCVSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM)
bool hasStdExtD() const
const RISCVFrameLowering * getFrameLowering() const override
bool is64Bit() const
bool hasStdExtC() const
const RISCVInstrInfo * getInstrInfo() const override
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:59
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)