Superclass for all disassemblers. More...

#include "llvm/MC/MCDisassembler/MCDisassembler.h"

Inheritance diagram for llvm::MCDisassembler:

Collaboration diagram for llvm::MCDisassembler:

Public Types
enum	DecodeStatus { Fail = 0, SoftFail = 1, Success = 3 }
	Ternary decode status. More...

Public Member Functions
	MCDisassembler (const MCSubtargetInfo &STI, MCContext &Ctx)

virtual	~MCDisassembler ()

virtual DecodeStatus	getInstruction (MCInst &Instr, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &VStream, raw_ostream &CStream) const =0
	Returns the disassembly of a single instruction. More...

bool	tryAddingSymbolicOperand (MCInst &Inst, int64_t Value, uint64_t Address, bool IsBranch, uint64_t Offset, uint64_t InstSize) const

void	tryAddingPcLoadReferenceComment (int64_t Value, uint64_t Address) const

void	setSymbolizer (std::unique_ptr< MCSymbolizer > Symzer)
	Set `Symzer` as the current symbolizer. More...

MCContext &	getContext () const

const MCSubtargetInfo &	getSubtargetInfo () const

Public Attributes
raw_ostream *	CommentStream = nullptr

Protected Attributes
const MCSubtargetInfo &	STI

std::unique_ptr< MCSymbolizer >	Symbolizer

Detailed Description

Superclass for all disassemblers.

Consumes a memory region and provides an array of assembly instructions.

Definition at line 27 of file MCDisassembler.h.

Member Enumeration Documentation

◆ DecodeStatus

enum llvm::MCDisassembler::DecodeStatus

Ternary decode status.

Most backends will just use Fail and Success, however some have a concept of an instruction with understandable semantics but which is architecturally incorrect. An example of this is ARM UNPREDICTABLE instructions which are disassemblable but cause undefined behaviour.

Because it makes sense to disassemble these instructions, there is a "soft fail" failure mode that indicates the MCInst& is valid but architecturally incorrect.

The enum numbers are deliberately chosen such that reduction from Success->SoftFail ->Fail can be done with a simple bitwise-AND:

LEFT & TOP = | Success Unpredictable Fail -----------—+--------------------------------— Success | Success Unpredictable Fail Unpredictable | Unpredictable Unpredictable Fail Fail | Fail Fail Fail

An easy way of encoding this is as 0b11, 0b01, 0b00 for Success, SoftFail, Fail respectively.

Enumerator
Fail
SoftFail
Success

Definition at line 51 of file MCDisassembler.h.

Constructor & Destructor Documentation

◆ MCDisassembler()

llvm::MCDisassembler::MCDisassembler	(	const MCSubtargetInfo &	STI,
		MCContext &	Ctx
	)

inline

Definition at line 57 of file MCDisassembler.h.

References llvm::Address, getInstruction(), Size, and ~MCDisassembler().

◆ ~MCDisassembler()

MCDisassembler::~MCDisassembler ( )

virtualdefault

Referenced by MCDisassembler().

Member Function Documentation

◆ getContext()

MCContext& llvm::MCDisassembler::getContext ( ) const

inline

Definition at line 104 of file MCDisassembler.h.

Referenced by llvm::AMDGPUDisassembler::getRegClassName().

◆ getInstruction()

virtual DecodeStatus llvm::MCDisassembler::getInstruction	(	MCInst &	Instr,
		uint64_t &	Size,
		ArrayRef< uint8_t >	Bytes,
		uint64_t	Address,
		raw_ostream &	VStream,
		raw_ostream &	CStream
	)		const

pure virtual

Returns the disassembly of a single instruction.

Parameters

Instr	- An MCInst to populate with the contents of the instruction.
Size	- A value to populate with the size of the instruction, or the number of bytes consumed while attempting to decode an invalid instruction.
Address	- The address, in the memory space of region, of the first byte of the instruction.
Bytes	- A reference to the actual bytes of the instruction.
VStream	- The stream to print warnings and diagnostic messages on.
CStream	- The stream to print comments and annotations on.

Returns: - MCDisassembler::Success if the instruction is valid, MCDisassembler::SoftFail if the instruction was disassemblable but invalid, MCDisassembler::Fail if the instruction was invalid.

Implemented in llvm::AMDGPUDisassembler, llvm::LanaiDisassembler, and llvm::AArch64Disassembler.

Referenced by llvm::RuntimeDyldCheckerExprEval::evaluate(), LLVMDisasmInstruction(), and MCDisassembler().

◆ getSubtargetInfo()

const MCSubtargetInfo& llvm::MCDisassembler::getSubtargetInfo ( ) const

inline

Definition at line 106 of file MCDisassembler.h.

References STI.

Referenced by DecodeHINTInstruction(), DecodeSETPANInstruction(), and DecodeSystemPStateInstruction().

◆ setSymbolizer()

void MCDisassembler::setSymbolizer ( std::unique_ptr< MCSymbolizer > Symzer )

Set Symzer as the current symbolizer.

This takes ownership of Symzer, and deletes the previously set one.

Definition at line 36 of file MCDisassembler.cpp.

References Symbolizer.

Referenced by LLVMCreateDisasmCPUFeatures().

◆ tryAddingPcLoadReferenceComment()

void MCDisassembler::tryAddingPcLoadReferenceComment	(	int64_t	Value,
		uint64_t	Address
	)		const

Definition at line 29 of file MCDisassembler.cpp.

References CommentStream, llvm::nulls(), and Symbolizer.

Referenced by llvm::AMDGPUSymbolizer::AMDGPUSymbolizer(), and tryAddingPcLoadReferenceComment().

◆ tryAddingSymbolicOperand()

bool MCDisassembler::tryAddingSymbolicOperand	(	MCInst &	Inst,
		int64_t	Value,
		uint64_t	Address,
		bool	IsBranch,
		uint64_t	Offset,
		uint64_t	InstSize
	)		const

Definition at line 18 of file MCDisassembler.cpp.

References CommentStream, llvm::nulls(), and Symbolizer.

Referenced by llvm::AMDGPUSymbolizer::AMDGPUSymbolizer(), DecodeAddSubImmShift(), DecodeAdrInstruction(), decodeBranch(), DecodePCRelLabel19(), DecodeTestAndBranch(), DecodeUnconditionalBranch(), DecodeUnsignedLdStInstruction(), and tryAddingSymbolicOperand().

Member Data Documentation

◆ CommentStream

raw_ostream* llvm::MCDisassembler::CommentStream = nullptr

mutable

Definition at line 110 of file MCDisassembler.h.

Referenced by llvm::AMDGPUDisassembler::createSRegOperand(), llvm::AMDGPUDisassembler::errOperand(), llvm::AArch64Disassembler::getInstruction(), llvm::AMDGPUDisassembler::getInstruction(), tryAddingPcLoadReferenceComment(), and tryAddingSymbolicOperand().

◆ STI

const MCSubtargetInfo& llvm::MCDisassembler::STI

protected

Definition at line 88 of file MCDisassembler.h.

Referenced by llvm::AMDGPUDisassembler::convertMIMGInst(), llvm::AMDGPUDisassembler::convertSDWAInst(), llvm::AMDGPUDisassembler::createRegOperand(), llvm::AMDGPUDisassembler::decodeSDWASrc(), llvm::AMDGPUDisassembler::decodeSDWAVopcDst(), llvm::AArch64Disassembler::getInstruction(), llvm::LanaiDisassembler::getInstruction(), llvm::AMDGPUDisassembler::getInstruction(), getSubtargetInfo(), llvm::AMDGPUDisassembler::isGFX9(), llvm::AMDGPUDisassembler::isVI(), and llvm::AMDGPUDisassembler::tryDecodeInst().

◆ Symbolizer

std::unique_ptr<MCSymbolizer> llvm::MCDisassembler::Symbolizer

protected

Definition at line 89 of file MCDisassembler.h.

Referenced by setSymbolizer(), tryAddingPcLoadReferenceComment(), and tryAddingSymbolicOperand().

The documentation for this class was generated from the following files:

include/llvm/MC/MCDisassembler/MCDisassembler.h
lib/MC/MCDisassembler/MCDisassembler.cpp

Public Types

Public Member Functions

Public Attributes

Protected Attributes

Detailed Description

Member Enumeration Documentation

◆ DecodeStatus

Constructor & Destructor Documentation

◆ MCDisassembler()

◆ ~MCDisassembler()

Member Function Documentation

◆ getContext()

◆ getInstruction()

◆ getSubtargetInfo()

◆ setSymbolizer()

◆ tryAddingPcLoadReferenceComment()

◆ tryAddingSymbolicOperand()

Member Data Documentation

◆ CommentStream

◆ STI

◆ Symbolizer