LLVM  8.0.1
LegalizerHelper.h
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1 //== llvm/CodeGen/GlobalISel/LegalizerHelper.h ---------------- -*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file A pass to convert the target-illegal operations created by IR -> MIR
11 /// translation into ones the target expects to be able to select. This may
12 /// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
13 /// G_ADD <4 x i16>.
14 ///
15 /// The LegalizerHelper class is where most of the work happens, and is
16 /// designed to be callable from other passes that find themselves with an
17 /// illegal instruction.
18 //
19 //===----------------------------------------------------------------------===//
20 
21 #ifndef LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
22 #define LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
23 
29 
30 namespace llvm {
31 // Forward declarations.
32 class LegalizerInfo;
33 class Legalizer;
34 class MachineRegisterInfo;
35 class GISelChangeObserver;
36 
38 public:
40  /// Instruction was already legal and no change was made to the
41  /// MachineFunction.
43 
44  /// Instruction has been legalized and the MachineFunction changed.
46 
47  /// Some kind of error has occurred and we could not legalize this
48  /// instruction.
50  };
51 
56 
57  /// Replace \p MI by a sequence of legal instructions that can implement the
58  /// same operation. Note that this means \p MI may be deleted, so any iterator
59  /// steps should be performed before calling this function. \p Helper should
60  /// be initialized to the MachineFunction containing \p MI.
61  ///
62  /// Considered as an opaque blob, the legal code will use and define the same
63  /// registers as \p MI.
65 
66  /// Legalize an instruction by emiting a runtime library call instead.
68 
69  /// Legalize an instruction by reducing the width of the underlying scalar
70  /// type.
71  LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
72 
73  /// Legalize an instruction by performing the operation on a wider scalar type
74  /// (for example a 16-bit addition can be safely performed at 32-bits
75  /// precision, ignoring the unused bits).
76  LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
77 
78  /// Legalize an instruction by splitting it into simpler parts, hopefully
79  /// understood by the target.
80  LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
81 
82  /// Legalize a vector instruction by splitting into multiple components, each
83  /// acting on the same scalar type as the original but with fewer elements.
85  LLT NarrowTy);
86 
87  /// Legalize a vector instruction by increasing the number of vector elements
88  /// involved and ignoring the added elements later.
90  LLT WideTy);
91 
92  /// Expose MIRBuilder so clients can set their own RecordInsertInstruction
93  /// functions
95 
96  /// Expose LegalizerInfo so the clients can re-use.
97  const LegalizerInfo &getLegalizerInfo() const { return LI; }
98 
99 private:
100  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
101  /// Use by extending the operand's type to \p WideTy using the specified \p
102  /// ExtOpcode for the extension instruction, and replacing the vreg of the
103  /// operand in place.
104  void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx,
105  unsigned ExtOpcode);
106 
107  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
108  /// Def by extending the operand's type to \p WideTy and truncating it back
109  /// with the \p TruncOpcode, and replacing the vreg of the operand in place.
110  void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx = 0,
111  unsigned TruncOpcode = TargetOpcode::G_TRUNC);
112 
113  /// Helper function to split a wide generic register into bitwise blocks with
114  /// the given Type (which implies the number of blocks needed). The generic
115  /// registers created are appended to Ops, starting at bit 0 of Reg.
116  void extractParts(unsigned Reg, LLT Ty, int NumParts,
118 
119  LegalizeResult lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
120 
121  MachineRegisterInfo &MRI;
122  const LegalizerInfo &LI;
123  /// To keep track of changes made by the LegalizerHelper.
124  GISelChangeObserver &Observer;
125 };
126 
127 /// Helper function that creates the given libcall.
130  const CallLowering::ArgInfo &Result,
132 
133 } // End namespace llvm.
134 
135 #endif
const LegalizerInfo & getLegalizerInfo() const
Expose LegalizerInfo so the clients can re-use.
This class represents lattice values for constants.
Definition: AllocatorList.h:24
unsigned Reg
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit...
MachineIRBuilder & MIRBuilder
Expose MIRBuilder so clients can set their own RecordInsertInstruction functions. ...
LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy)
Legalize an instruction by performing the operation on a wider scalar type (for example a 16-bit addi...
LegalizerHelper::LegalizeResult createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall, const CallLowering::ArgInfo &Result, ArrayRef< CallLowering::ArgInfo > Args)
Helper function that creates the given libcall.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
LegalizerHelper(MachineFunction &MF, GISelChangeObserver &Observer, MachineIRBuilder &B)
Abstract class that contains various methods for clients to notify about changes. ...
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
LegalizeResult legalizeInstrStep(MachineInstr &MI)
Replace MI by a sequence of legal instructions that can implement the same operation.
Helper class to build MachineInstr.
Some kind of error has occurred and we could not legalize this instruction.
Instruction was already legal and no change was made to the MachineFunction.
LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx, LLT WideTy)
Legalize a vector instruction by increasing the number of vector elements involved and ignoring the a...
LegalizeResult libcall(MachineInstr &MI)
Legalize an instruction by emiting a runtime library call instead.
LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Legalize an instruction by splitting it into simpler parts, hopefully understood by the target...
LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Legalize a vector instruction by splitting into multiple components, each acting on the same scalar t...
This file declares the MachineIRBuilder class.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:64
Instruction has been legalized and the MachineFunction changed.
LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Legalize an instruction by reducing the width of the underlying scalar type.
This file describes how to lower LLVM calls to machine code calls.
IRTranslator LLVM IR MI
constexpr char Args[]
Key for Kernel::Metadata::mArgs.