22 #define DEBUG_TYPE "llvm-mca" 26 unsigned ProcResourceID = 0;
29 "Invalid number of elements");
38 Masks[
I] = 1ULL << ProcResourceID;
47 Masks[
I] = 1ULL << ProcResourceID;
48 for (
unsigned U = 0; U < Desc.
NumUnits; ++U) {
50 Masks[
I] |= OtherMask;
72 double Max =
static_cast<double>(NumMicroOps) / DispatchWidth;
83 double Throughput =
static_cast<double>(ResourceCycles) / MCDesc.
NumUnits;
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents lattice values for constants.
const MCProcResourceDesc * getProcResource(unsigned ProcResourceIdx) const
double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth, unsigned NumMicroOps, ArrayRef< unsigned > ProcResourceUsage)
Compute the reciprocal block throughput from a set of processor resource cycles.
void computeProcResourceMasks(const MCSchedModel &SM, MutableArrayRef< uint64_t > Masks)
Populates vector Masks with processor resource masks.
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
const unsigned * SubUnitsIdxBegin
size_t size() const
size - Get the array size.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Helper functions used by various pipeline components.
Define a kind of processor resource that will be modeled by the scheduler.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
This class represents the number of cycles per resource (fractions of cycles).
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Machine model for scheduling, bundling, and heuristics.
unsigned getNumProcResourceKinds() const