24 #ifndef LLVM_CODEGEN_LIVEREGMATRIX_H 25 #define LLVM_CODEGEN_LIVEREGMATRIX_H 37 class MachineFunction;
38 class TargetRegisterInfo;
54 std::unique_ptr<LiveIntervalUnion::Query[]> Queries;
57 unsigned RegMaskTag = 0;
58 unsigned RegMaskVirtReg = 0;
64 void releaseMemory()
override;
160 #endif // LLVM_CODEGEN_LIVEREGMATRIX_H No interference, go ahead and assign.
This class represents lattice values for constants.
InterferenceKind checkInterference(LiveInterval &VirtReg, unsigned PhysReg)
Check for interference before assigning VirtReg to PhysReg.
LiveInterval - This class represents the liveness of a register, or stack slot.
LiveIntervalUnion * getLiveUnions()
Directly access the live interval unions per regunit.
This class represents the liveness of a register, stack slot, etc.
Query interferences between a single live virtual register and a live interval union.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
LiveIntervalUnion::Query & query(const LiveRange &LR, unsigned RegUnit)
Query a line of the assigned virtual register matrix directly.
Register unit interference.
bool isPhysRegUsed(unsigned PhysReg) const
Returns true if the given PhysReg has any live intervals assigned.
void assign(LiveInterval &VirtReg, unsigned PhysReg)
Assign VirtReg to PhysReg.
void invalidateVirtRegs()
Invalidate cached interference queries after modifying virtual register live ranges.
Union of live intervals that are strong candidates for coalescing into a single register (either phys...
Represent the analysis usage information of a pass.
LiveSegments::Allocator Allocator
void unassign(LiveInterval &VirtReg)
Unassign VirtReg from its PhysReg.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool checkRegUnitInterference(LiveInterval &VirtReg, unsigned PhysReg)
Check for regunit interference only.
bool checkRegMaskInterference(LiveInterval &VirtReg, unsigned PhysReg=0)
Check for regmask interference only.
SlotIndex - An opaque wrapper around machine indexes.
Virtual register interference.