#include "Target/AMDGPU/AMDGPUTargetMachine.h"
Public Member Functions | |
| GCNTargetMachine (const Target &T, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT) | |
| TargetPassConfig * | createPassConfig (PassManagerBase &PM) override |
| Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes. More... | |
| const GCNSubtarget * | getSubtargetImpl (const Function &) const override |
| Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInfo-derived member variable. More... | |
| TargetTransformInfo | getTargetTransformInfo (const Function &F) override |
| Get a TargetTransformInfo implementation for the target. More... | |
| const AMDGPUIntrinsicInfo * | getIntrinsicInfo () const override |
| If intrinsic information is available, return it. If not, return null. More... | |
| bool | useIPRA () const override |
| True if the target wants to use interprocedural register allocation by default. More... | |
 Public Member Functions inherited from llvm::AMDGPUTargetMachine | |
| AMDGPUTargetMachine (const Target &T, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL) | |
| ~AMDGPUTargetMachine () override | |
| const TargetSubtargetInfo * | getSubtargetImpl () const |
| TargetLoweringObjectFile * | getObjFileLowering () const override |
| void | adjustPassManager (PassManagerBuilder &) override |
| Allow the target to modify the pass manager, e.g. More... | |
| uint64_t | getNullPointerValue (unsigned AddrSpace) const |
| Get the integer value of a null pointer in the given address space. More... | |
| Public Member Functions inherited from llvm::LLVMTargetMachine | |
| bool | addPassesToEmitFile (PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, bool DisableVerify=true, MachineModuleInfo *MMI=nullptr) override |
| Add passes to the specified pass manager to get the specified file emitted. More... | |
| bool | addPassesToEmitMC (PassManagerBase &PM, MCContext *&Ctx, raw_pwrite_stream &Out, bool DisableVerify=true) override |
| Add passes to the specified pass manager to get machine code emitted with the MCJIT. More... | |
| virtual bool | isMachineVerifierClean () const |
| Returns true if the target is expected to pass all machine verifier checks. More... | |
| bool | addAsmPrinter (PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe, MCContext &Context) |
| Adds an AsmPrinter pass to the pipeline that prints assembly or machine code from the MI representation. More... | |
| virtual bool | usesPhysRegsForPEI () const |
| True if the target uses physical regs at Prolog/Epilog insertion time. More... | |
| Public Member Functions inherited from llvm::TargetMachine | |
| TargetMachine (const TargetMachine &)=delete | |
| void | operator= (const TargetMachine &)=delete |
| virtual | ~TargetMachine () |
| const Target & | getTarget () const |
| const Triple & | getTargetTriple () const |
| StringRef | getTargetCPU () const |
| StringRef | getTargetFeatureString () const |
| template<typename STC > | |
| const STC & | getSubtarget (const Function &F) const |
| This method returns a pointer to the specified type of TargetSubtargetInfo. More... | |
| const DataLayout | createDataLayout () const |
| Create a DataLayout. More... | |
| bool | isCompatibleDataLayout (const DataLayout &Candidate) const |
| Test if a DataLayout if compatible with the CodeGen for this target. More... | |
| unsigned | getPointerSize (unsigned AS) const |
| Get the pointer size for this target. More... | |
| unsigned | getPointerSizeInBits (unsigned AS) const |
| unsigned | getProgramPointerSize () const |
| unsigned | getAllocaPointerSize () const |
| void | resetTargetOptions (const Function &F) const |
| Reset the target options based on the function's attributes. More... | |
| const MCAsmInfo * | getMCAsmInfo () const |
| Return target specific asm information. More... | |
| const MCRegisterInfo * | getMCRegisterInfo () const |
| const MCInstrInfo * | getMCInstrInfo () const |
| const MCSubtargetInfo * | getMCSubtargetInfo () const |
| bool | requiresStructuredCFG () const |
| void | setRequiresStructuredCFG (bool Value) |
| Reloc::Model | getRelocationModel () const |
| Returns the code generation relocation model. More... | |
| CodeModel::Model | getCodeModel () const |
| Returns the code model. More... | |
| bool | isPositionIndependent () const |
| bool | shouldAssumeDSOLocal (const Module &M, const GlobalValue *GV) const |
| bool | useEmulatedTLS () const |
| Returns true if this target uses emulated TLS. More... | |
| TLSModel::Model | getTLSModel (const GlobalValue *GV) const |
| Returns the TLS model which should be used for the given global variable. More... | |
| CodeGenOpt::Level | getOptLevel () const |
| Returns the optimization level: None, Less, Default, or Aggressive. More... | |
| void | setOptLevel (CodeGenOpt::Level Level) |
| Overrides the optimization level. More... | |
| void | setFastISel (bool Enable) |
| bool | getO0WantsFastISel () |
| void | setO0WantsFastISel (bool Enable) |
| void | setGlobalISel (bool Enable) |
| void | setGlobalISelAbort (GlobalISelAbortMode Mode) |
| void | setMachineOutliner (bool Enable) |
| void | setSupportsDefaultOutlining (bool Enable) |
| bool | shouldPrintMachineCode () const |
| bool | getUniqueSectionNames () const |
| bool | getDataSections () const |
| Return true if data objects should be emitted into their own section, corresponds to -fdata-sections. More... | |
| bool | getFunctionSections () const |
| Return true if functions should be emitted into their own section, corresponding to -ffunction-sections. More... | |
| TargetIRAnalysis | getTargetIRAnalysis () |
Get a TargetIRAnalysis appropriate for the target. More... | |
| virtual bool | targetSchedulesPostRAScheduling () const |
| True if subtarget inserts the final scheduling pass on its own. More... | |
| void | getNameWithPrefix (SmallVectorImpl< char > &Name, const GlobalValue *GV, Mangler &Mang, bool MayAlwaysUsePrivate=false) const |
| MCSymbol * | getSymbol (const GlobalValue *GV) const |
Detailed Description
Definition at line 96 of file AMDGPUTargetMachine.h.
Constructor & Destructor Documentation
◆ GCNTargetMachine()
| GCNTargetMachine::GCNTargetMachine | ( | const Target & | T, |
| const Triple & | TT, | ||
| StringRef | CPU, | ||
| StringRef | FS, | ||
| TargetOptions | Options, | ||
| Optional< Reloc::Model > | RM, | ||
| Optional< CodeModel::Model > | CM, | ||
| CodeGenOpt::Level | OL, | ||
| bool | JIT | ||
| ) |
Definition at line 462 of file AMDGPUTargetMachine.cpp.
Member Function Documentation
◆ createPassConfig()
|
overridevirtual |
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes.
createPassConfig - Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes.
Targets may override this to extend TargetPassConfig.
Reimplemented from llvm::LLVMTargetMachine.
Definition at line 926 of file AMDGPUTargetMachine.cpp.
◆ getIntrinsicInfo()
|
inlineoverridevirtual |
If intrinsic information is available, return it. If not, return null.
Reimplemented from llvm::TargetMachine.
Definition at line 113 of file AMDGPUTargetMachine.h.
◆ getSubtargetImpl()
|
overridevirtual |
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInfo-derived member variable.
Implements llvm::AMDGPUTargetMachine.
Definition at line 470 of file AMDGPUTargetMachine.cpp.
References llvm::SmallString< InternalLen >::append(), llvm::AMDGPUTargetMachine::getFeatureString(), llvm::AMDGPUTargetMachine::getGPUName(), I, llvm::TargetMachine::resetTargetOptions(), ScalarizeGlobal, and llvm::TargetMachine::TargetTriple.
◆ getTargetTransformInfo()
|
overridevirtual |
Get a TargetTransformInfo implementation for the target.
The TTI returned uses the common code generator to answer queries about the IR.
Reimplemented from llvm::LLVMTargetMachine.
Definition at line 492 of file AMDGPUTargetMachine.cpp.
References llvm::AAResults::addAAResult(), llvm::TargetPassConfig::addCodeGenPrepare(), llvm::TargetPassConfig::addIRPasses(), llvm::ScheduleDAGMI::addMutation(), llvm::CodeGenOpt::Aggressive, llvm::Triple::amdgcn, C, llvm::createAlwaysInlinerLegacyPass(), llvm::createAMDGPUAAWrapperPass(), llvm::createAMDGPUAlwaysInlinePass(), llvm::createAMDGPUCFGStructurizerPass(), llvm::createAMDGPUCodeGenPreparePass(), llvm::createAMDGPUFixFunctionBitcastsPass(), llvm::createAMDGPUISelDag(), llvm::createAMDGPULowerIntrinsicsPass(), llvm::createAMDGPULowerKernelArgumentsPass(), llvm::createAMDGPUOpenCLEnqueuedBlockLoweringPass(), llvm::createAMDGPUPromoteAlloca(), llvm::createAtomicExpandPass(), llvm::createBarrierNoopPass(), llvm::createEarlyCSEPass(), llvm::createExternalAAWrapperPass(), llvm::createFlattenCFGPass(), llvm::createGenericSchedLive(), llvm::createGVNPass(), llvm::createInferAddressSpacesPass(), llvm::createLICMPass(), llvm::createLoadClusterDAGMutation(), llvm::createLoadStoreVectorizerPass(), llvm::createLowerSwitchPass(), llvm::createNaryReassociatePass(), llvm::createR600ClauseMergePass(), llvm::createR600ControlFlowFinalizer(), llvm::createR600EmitClauseMarkers(), llvm::createR600ExpandSpecialInstrsPass(), llvm::createR600ISelDag(), createR600MachineScheduler(), llvm::createR600OpenCLImageTypeLoweringPass(), llvm::createR600Packetizer(), llvm::createR600VectorRegMerger(), llvm::createSeparateConstOffsetFromGEPPass(), llvm::createSpeculativeExecutionPass(), llvm::createSROAPass(), llvm::createStoreClusterDAGMutation(), llvm::createStraightLineStrengthReducePass(), llvm::createStructurizeCFGPass(), EnableAMDGPUAliasAnalysis, EnableLoadStoreVectorizer, EnableLowerKernelArguments, EnableR600IfConvert, EnableR600StructurizeCFG, EnableSROA, llvm::FinalizeMachineBundlesID, llvm::FuncletLayoutID, llvm::Pass::getAnalysisIfAvailable(), llvm::Triple::getArch(), llvm::TargetMachine::getOptLevel(), llvm::TargetMachine::getTargetTriple(), llvm::IfConverterID, llvm::CodeGenOpt::None, P, llvm::PatchableFunctionID, llvm::Triple::r600, llvm::StackMapLivenessID, llvm::ScheduleDAG::TII, llvm::SystemZISD::TM, and llvm::ScheduleDAG::TRI.
◆ useIPRA()
|
inlineoverridevirtual |
True if the target wants to use interprocedural register allocation by default.
The -enable-ipra flag can be used to override this.
Reimplemented from llvm::LLVMTargetMachine.
Definition at line 117 of file AMDGPUTargetMachine.h.
The documentation for this class was generated from the following files:
- lib/Target/AMDGPU/AMDGPUTargetMachine.h
- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
