| AddNoCarryInsts | llvm::GCNSubtarget | protected |
| AMDGPUSubtarget(const Triple &TT) | llvm::AMDGPUSubtarget | |
| AutoWaitcntBeforeBarrier | llvm::GCNSubtarget | protected |
| CaymanISA | llvm::GCNSubtarget | protected |
| CFALUBug | llvm::GCNSubtarget | protected |
| CIInsts | llvm::GCNSubtarget | protected |
| CodeObjectV3 | llvm::GCNSubtarget | protected |
| DebuggerEmitPrologue | llvm::GCNSubtarget | protected |
| debuggerEmitPrologue() const | llvm::GCNSubtarget | inline |
| debuggerInsertNops() const | llvm::GCNSubtarget | inline |
| DebuggerInsertNops | llvm::GCNSubtarget | protected |
| debuggerSupported() const | llvm::GCNSubtarget | inline |
| DumpCode | llvm::GCNSubtarget | protected |
| dumpCode() const | llvm::GCNSubtarget | inline |
| DX10Clamp | llvm::GCNSubtarget | protected |
| EnableDS128 | llvm::GCNSubtarget | protected |
| enableDX10Clamp() const | llvm::GCNSubtarget | inline |
| enableEarlyIfConversion() const override | llvm::GCNSubtarget | inline |
| enableHugePrivateBuffer() const | llvm::GCNSubtarget | inline |
| EnableHugePrivateBuffer | llvm::GCNSubtarget | protected |
| enableIEEEBit(const MachineFunction &MF) const | llvm::GCNSubtarget | inline |
| EnableLoadStoreOpt | llvm::GCNSubtarget | protected |
| enableMachineScheduler() const override | llvm::GCNSubtarget | inline |
| EnablePromoteAlloca | llvm::AMDGPUSubtarget | protected |
| EnablePRTStrictNull | llvm::GCNSubtarget | protected |
| EnableSIScheduler | llvm::GCNSubtarget | protected |
| enableSIScheduler() const | llvm::GCNSubtarget | inline |
| EnableSRAMECC | llvm::GCNSubtarget | protected |
| enableSubRegLiveness() const override | llvm::GCNSubtarget | inline |
| EnableUnsafeDSOffsetFolding | llvm::GCNSubtarget | protected |
| EnableXNACK | llvm::GCNSubtarget | protected |
| EVERGREEN enum value | llvm::AMDGPUSubtarget | |
| FastFMAF32 | llvm::GCNSubtarget | protected |
| FeatureDisable | llvm::GCNSubtarget | protected |
| FlatAddressSpace | llvm::GCNSubtarget | protected |
| FlatForGlobal | llvm::GCNSubtarget | protected |
| FlatGlobalInsts | llvm::GCNSubtarget | protected |
| FlatInstOffsets | llvm::GCNSubtarget | protected |
| FlatScratchInsts | llvm::GCNSubtarget | protected |
| flatScratchIsPointer() const | llvm::GCNSubtarget | inline |
| FMA | llvm::GCNSubtarget | protected |
| FP32Denormals | llvm::AMDGPUSubtarget | protected |
| FP64 | llvm::GCNSubtarget | protected |
| FP64FP16Denormals | llvm::GCNSubtarget | protected |
| FPExceptions | llvm::AMDGPUSubtarget | protected |
| GCN3Encoding | llvm::GCNSubtarget | protected |
| GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, const GCNTargetMachine &TM) | llvm::GCNSubtarget | |
| Gen | llvm::GCNSubtarget | protected |
| Generation enum name | llvm::AMDGPUSubtarget | |
| get(const MachineFunction &MF) | llvm::AMDGPUSubtarget | static |
| get(const TargetMachine &TM, const Function &F) | llvm::AMDGPUSubtarget | static |
| getAddressableNumSGPRs() const | llvm::GCNSubtarget | inline |
| getAddressableNumVGPRs() const | llvm::GCNSubtarget | inline |
| getAlignmentForImplicitArgPtr() const | llvm::AMDGPUSubtarget | inline |
| getCallLowering() const override | llvm::GCNSubtarget | inline |
| getDefaultFlatWorkGroupSize(CallingConv::ID CC) const | llvm::AMDGPUSubtarget | |
| getEUsPerCU() const | llvm::GCNSubtarget | inline |
| getExplicitKernArgSize(const Function &F, unsigned &MaxAlign) const | llvm::AMDGPUSubtarget | |
| getExplicitKernelArgOffset(const Function &F) const | llvm::AMDGPUSubtarget | inline |
| getFlatWorkGroupSizes(const Function &F) const | llvm::AMDGPUSubtarget | |
| getFrameLowering() const override | llvm::GCNSubtarget | inline |
| getGeneration() const | llvm::GCNSubtarget | inline |
| getImplicitArgNumBytes(const Function &F) const | llvm::AMDGPUSubtarget | inline |
| getInstrInfo() const override | llvm::GCNSubtarget | inline |
| getInstrItineraryData() const override | llvm::GCNSubtarget | inline |
| getInstructionSelector() const override | llvm::GCNSubtarget | inline |
| getKernArgSegmentSize(const Function &F, unsigned &MaxAlign) const | llvm::AMDGPUSubtarget | |
| getLDSBankCount() const | llvm::GCNSubtarget | inline |
| getLegalizerInfo() const override | llvm::GCNSubtarget | inline |
| getLocalMemorySize() const | llvm::AMDGPUSubtarget | inline |
| getMaxFlatWorkGroupSize() const override | llvm::GCNSubtarget | inlinevirtual |
| getMaxLocalMemSizeWithWaveCount(unsigned WaveCount, const Function &) const | llvm::GCNSubtarget | |
| getMaxNumSGPRs(unsigned WavesPerEU, bool Addressable) const | llvm::GCNSubtarget | inline |
| getMaxNumSGPRs(const MachineFunction &MF) const | llvm::GCNSubtarget | |
| getMaxNumUserSGPRs() const | llvm::GCNSubtarget | inline |
| getMaxNumVGPRs(unsigned WavesPerEU) const | llvm::GCNSubtarget | inline |
| getMaxNumVGPRs(const MachineFunction &MF) const | llvm::GCNSubtarget | |
| getMaxPrivateElementSize() const | llvm::GCNSubtarget | inline |
| getMaxWavesPerCU() const | llvm::GCNSubtarget | inline |
| getMaxWavesPerCU(unsigned FlatWorkGroupSize) const | llvm::GCNSubtarget | inline |
| getMaxWavesPerEU() const | llvm::GCNSubtarget | inline |
| getMaxWavesPerEU(unsigned FlatWorkGroupSize) const override | llvm::GCNSubtarget | inlinevirtual |
| getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) const override | llvm::GCNSubtarget | inlinevirtual |
| getMinFlatWorkGroupSize() const override | llvm::GCNSubtarget | inlinevirtual |
| getMinNumSGPRs(unsigned WavesPerEU) const | llvm::GCNSubtarget | inline |
| getMinNumVGPRs(unsigned WavesPerEU) const | llvm::GCNSubtarget | inline |
| getMinWavesPerEU() const override | llvm::GCNSubtarget | inlinevirtual |
| getOccupancyWithLocalMemSize(uint32_t Bytes, const Function &) const | llvm::AMDGPUSubtarget | |
| getOccupancyWithLocalMemSize(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | |
| getOccupancyWithNumSGPRs(unsigned SGPRs) const | llvm::GCNSubtarget | |
| getOccupancyWithNumVGPRs(unsigned VGPRs) const | llvm::GCNSubtarget | |
| getPostRAMutations(std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override | llvm::GCNSubtarget | |
| getRegBankInfo() const override | llvm::GCNSubtarget | inline |
| getRegisterInfo() const override | llvm::GCNSubtarget | inline |
| getReservedNumSGPRs(const MachineFunction &MF) const | llvm::GCNSubtarget | |
| getScalarizeGlobalBehavior() const | llvm::GCNSubtarget | inline |
| getSelectionDAGInfo() const override | llvm::GCNSubtarget | inline |
| getSGPRAllocGranule() const | llvm::GCNSubtarget | inline |
| getSGPREncodingGranule() const | llvm::GCNSubtarget | inline |
| getStackAlignment() const | llvm::GCNSubtarget | inline |
| getTargetLowering() const override | llvm::GCNSubtarget | inline |
| getTotalNumSGPRs() const | llvm::GCNSubtarget | inline |
| getTotalNumVGPRs() const | llvm::GCNSubtarget | inline |
| getTrapHandlerAbi() const | llvm::GCNSubtarget | inline |
| getVGPRAllocGranule() const | llvm::GCNSubtarget | inline |
| getVGPREncodingGranule() const | llvm::GCNSubtarget | inline |
| getWavefrontSize() const | llvm::AMDGPUSubtarget | inline |
| getWavefrontSizeLog2() const | llvm::GCNSubtarget | inline |
| getWavesPerEU(const Function &F) const | llvm::AMDGPUSubtarget | |
| getWavesPerWorkGroup(unsigned FlatWorkGroupSize) const | llvm::GCNSubtarget | inline |
| GFX9 enum value | llvm::AMDGPUSubtarget | |
| GFX9Insts | llvm::GCNSubtarget | protected |
| HalfRate64Ops | llvm::GCNSubtarget | protected |
| has12DWordStoreHazard() const | llvm::GCNSubtarget | inline |
| has16BitInsts() const | llvm::AMDGPUSubtarget | inline |
| Has16BitInsts | llvm::AMDGPUSubtarget | protected |
| hasAddNoCarry() const | llvm::GCNSubtarget | inline |
| hasAddr64() const | llvm::GCNSubtarget | inline |
| hasApertureRegs() const | llvm::GCNSubtarget | inline |
| HasApertureRegs | llvm::GCNSubtarget | protected |
| hasAutoWaitcntBeforeBarrier() const | llvm::GCNSubtarget | inline |
| hasBCNT(unsigned Size) const | llvm::GCNSubtarget | inline |
| hasBFE() const | llvm::GCNSubtarget | inline |
| hasBFI() const | llvm::GCNSubtarget | inline |
| hasBFM() const | llvm::GCNSubtarget | inline |
| hasCARRY() const | llvm::GCNSubtarget | inline |
| hasCodeObjectV3() const | llvm::GCNSubtarget | inline |
| hasD16LoadStore() const | llvm::GCNSubtarget | inline |
| HasDLInsts | llvm::GCNSubtarget | protected |
| hasDLInsts() const | llvm::GCNSubtarget | inline |
| hasDotInsts() const | llvm::GCNSubtarget | inline |
| HasDotInsts | llvm::GCNSubtarget | protected |
| HasDPP | llvm::GCNSubtarget | protected |
| hasDPP() const | llvm::GCNSubtarget | inline |
| hasDwordx3LoadStores() const | llvm::GCNSubtarget | inline |
| hasFastFMAF32() const | llvm::GCNSubtarget | inline |
| hasFFBH() const | llvm::GCNSubtarget | inline |
| hasFFBL() const | llvm::GCNSubtarget | inline |
| hasFlatAddressSpace() const | llvm::GCNSubtarget | inline |
| hasFlatGlobalInsts() const | llvm::GCNSubtarget | inline |
| hasFlatInstOffsets() const | llvm::GCNSubtarget | inline |
| hasFlatLgkmVMemCountInOrder() const | llvm::GCNSubtarget | inline |
| hasFlatScratchInsts() const | llvm::GCNSubtarget | inline |
| hasFMA() const | llvm::GCNSubtarget | inline |
| hasFmaMixInsts() const | llvm::GCNSubtarget | inline |
| HasFmaMixInsts | llvm::GCNSubtarget | protected |
| hasFminFmaxLegacy() const | llvm::AMDGPUSubtarget | inline |
| HasFminFmaxLegacy | llvm::AMDGPUSubtarget | protected |
| hasFP16Denormals() const | llvm::GCNSubtarget | inline |
| hasFP32Denormals() const | llvm::AMDGPUSubtarget | inline |
| hasFP64() const | llvm::GCNSubtarget | inline |
| hasFP64Denormals() const | llvm::GCNSubtarget | inline |
| hasFPExceptions() const | llvm::AMDGPUSubtarget | inline |
| hasHalfRate64Ops() const | llvm::GCNSubtarget | inline |
| hasHalfRate64Ops(const TargetSubtargetInfo &STI) | llvm::GCNSubtarget | static |
| hasHWFP64() const | llvm::GCNSubtarget | inline |
| hasIntClamp() const | llvm::GCNSubtarget | inline |
| HasIntClamp | llvm::GCNSubtarget | protected |
| hasInv2PiInlineImm() const | llvm::AMDGPUSubtarget | inline |
| HasInv2PiInlineImm | llvm::AMDGPUSubtarget | protected |
| hasMad64_32() const | llvm::GCNSubtarget | inline |
| hasMadMixInsts() const | llvm::AMDGPUSubtarget | inline |
| HasMadMixInsts | llvm::AMDGPUSubtarget | protected |
| hasMed3_16() const | llvm::GCNSubtarget | inline |
| hasMergedShaders() const | llvm::GCNSubtarget | inline |
| hasMIMG_R128() const | llvm::GCNSubtarget | inline |
| hasMin3Max3_16() const | llvm::GCNSubtarget | inline |
| HasMovrel | llvm::GCNSubtarget | protected |
| hasMovrel() const | llvm::GCNSubtarget | inline |
| hasMulI24() const | llvm::AMDGPUSubtarget | inline |
| HasMulI24 | llvm::AMDGPUSubtarget | protected |
| hasMulU24() const | llvm::AMDGPUSubtarget | inline |
| HasMulU24 | llvm::AMDGPUSubtarget | protected |
| HasR128A16 | llvm::GCNSubtarget | protected |
| hasR128A16() const | llvm::GCNSubtarget | inline |
| hasReadM0MovRelInterpHazard() const | llvm::GCNSubtarget | inline |
| hasReadM0SendMsgHazard() const | llvm::GCNSubtarget | inline |
| hasScalarAtomics() const | llvm::GCNSubtarget | inline |
| HasScalarAtomics | llvm::GCNSubtarget | protected |
| hasScalarCompareEq64() const | llvm::GCNSubtarget | inline |
| HasScalarStores | llvm::GCNSubtarget | protected |
| hasScalarStores() const | llvm::GCNSubtarget | inline |
| HasSDWA | llvm::AMDGPUSubtarget | protected |
| hasSDWA() const | llvm::AMDGPUSubtarget | inline |
| hasSDWAMac() const | llvm::GCNSubtarget | inline |
| HasSDWAMac | llvm::GCNSubtarget | protected |
| hasSDWAOmod() const | llvm::GCNSubtarget | inline |
| HasSDWAOmod | llvm::GCNSubtarget | protected |
| hasSDWAOutModsVOPC() const | llvm::GCNSubtarget | inline |
| HasSDWAOutModsVOPC | llvm::GCNSubtarget | protected |
| hasSDWAScalar() const | llvm::GCNSubtarget | inline |
| HasSDWAScalar | llvm::GCNSubtarget | protected |
| hasSDWASdst() const | llvm::GCNSubtarget | inline |
| HasSDWASdst | llvm::GCNSubtarget | protected |
| hasSGPRInitBug() const | llvm::GCNSubtarget | inline |
| HasSMemRealTime | llvm::GCNSubtarget | protected |
| hasSMemRealTime() const | llvm::GCNSubtarget | inline |
| hasSMovFedHazard() const | llvm::GCNSubtarget | inline |
| hasSwap() const | llvm::GCNSubtarget | inline |
| hasTrigReducedRange() const | llvm::AMDGPUSubtarget | inline |
| HasTrigReducedRange | llvm::AMDGPUSubtarget | protected |
| hasUnalignedBufferAccess() const | llvm::GCNSubtarget | inline |
| hasUnalignedScratchAccess() const | llvm::GCNSubtarget | inline |
| HasUnpackedD16VMem | llvm::GCNSubtarget | protected |
| hasUnpackedD16VMem() const | llvm::GCNSubtarget | inline |
| HasVertexCache | llvm::GCNSubtarget | protected |
| hasVGPRIndexMode() const | llvm::GCNSubtarget | inline |
| HasVGPRIndexMode | llvm::GCNSubtarget | protected |
| hasVOP3PInsts() const | llvm::AMDGPUSubtarget | inline |
| HasVOP3PInsts | llvm::AMDGPUSubtarget | protected |
| initializeSubtargetDependencies(const Triple &TT, StringRef GPU, StringRef FS) | llvm::GCNSubtarget | |
| InstrItins | llvm::GCNSubtarget | protected |
| isAmdHsaOrMesa(const Function &F) const | llvm::AMDGPUSubtarget | inline |
| isAmdHsaOS() const | llvm::AMDGPUSubtarget | inline |
| isAmdPalOS() const | llvm::AMDGPUSubtarget | inline |
| IsaVersion | llvm::GCNSubtarget | protected |
| ISAVersion0_0_0 enum value | llvm::GCNSubtarget | |
| ISAVersion6_0_0 enum value | llvm::GCNSubtarget | |
| ISAVersion6_0_1 enum value | llvm::GCNSubtarget | |
| ISAVersion7_0_0 enum value | llvm::GCNSubtarget | |
| ISAVersion7_0_1 enum value | llvm::GCNSubtarget | |
| ISAVersion7_0_2 enum value | llvm::GCNSubtarget | |
| ISAVersion7_0_3 enum value | llvm::GCNSubtarget | |
| ISAVersion7_0_4 enum value | llvm::GCNSubtarget | |
| ISAVersion8_0_1 enum value | llvm::GCNSubtarget | |
| ISAVersion8_0_2 enum value | llvm::GCNSubtarget | |
| ISAVersion8_0_3 enum value | llvm::GCNSubtarget | |
| ISAVersion8_1_0 enum value | llvm::GCNSubtarget | |
| ISAVersion9_0_0 enum value | llvm::GCNSubtarget | |
| ISAVersion9_0_2 enum value | llvm::GCNSubtarget | |
| ISAVersion9_0_4 enum value | llvm::GCNSubtarget | |
| ISAVersion9_0_6 enum value | llvm::GCNSubtarget | |
| ISAVersion9_0_9 enum value | llvm::GCNSubtarget | |
| IsGCN | llvm::GCNSubtarget | protected |
| isMesa3DOS() const | llvm::AMDGPUSubtarget | inline |
| isMesaGfxShader(const Function &F) const | llvm::GCNSubtarget | inline |
| isMesaKernel(const Function &F) const | llvm::AMDGPUSubtarget | inline |
| isPromoteAllocaEnabled() const | llvm::AMDGPUSubtarget | inline |
| isSRAMECCEnabled() const | llvm::GCNSubtarget | inline |
| isTrapHandlerEnabled() const | llvm::GCNSubtarget | inline |
| isXNACKEnabled() const | llvm::GCNSubtarget | inline |
| LDSBankCount | llvm::GCNSubtarget | protected |
| ldsRequiresM0Init() const | llvm::GCNSubtarget | inline |
| LLVMTrapHandlerRegValue enum value | llvm::GCNSubtarget | |
| loadStoreOptEnabled() const | llvm::GCNSubtarget | inline |
| LocalMemorySize | llvm::AMDGPUSubtarget | protected |
| makeLIDRangeMetadata(Instruction *I) const | llvm::AMDGPUSubtarget | |
| MaxPrivateElementSize | llvm::GCNSubtarget | protected |
| MIMG_R128 | llvm::GCNSubtarget | protected |
| NORTHERN_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override | llvm::GCNSubtarget | |
| ParseSubtargetFeatures(StringRef CPU, StringRef FS) | llvm::GCNSubtarget | |
| privateMemoryResourceIsRangeChecked() const | llvm::GCNSubtarget | inline |
| R600 enum value | llvm::AMDGPUSubtarget | |
| R600ALUInst | llvm::GCNSubtarget | protected |
| R700 enum value | llvm::AMDGPUSubtarget | |
| ScalarizeGlobal | llvm::GCNSubtarget | protected |
| SEA_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| setScalarizeGlobalBehavior(bool b) | llvm::GCNSubtarget | inline |
| SGPRInitBug | llvm::GCNSubtarget | protected |
| SOUTHERN_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| supportsMinMaxDenormModes() const | llvm::GCNSubtarget | inline |
| TargetTriple | llvm::GCNSubtarget | protected |
| TexVTXClauseSize | llvm::GCNSubtarget | protected |
| TrapHandler | llvm::GCNSubtarget | protected |
| TrapHandlerAbi enum name | llvm::GCNSubtarget | |
| TrapHandlerAbiHsa enum value | llvm::GCNSubtarget | |
| TrapHandlerAbiNone enum value | llvm::GCNSubtarget | |
| TrapID enum name | llvm::GCNSubtarget | |
| TrapIDDebugBreakpoint enum value | llvm::GCNSubtarget | |
| TrapIDDebugReserved8 enum value | llvm::GCNSubtarget | |
| TrapIDDebugReservedFE enum value | llvm::GCNSubtarget | |
| TrapIDDebugReservedFF enum value | llvm::GCNSubtarget | |
| TrapIDHardwareReserved enum value | llvm::GCNSubtarget | |
| TrapIDHSADebugTrap enum value | llvm::GCNSubtarget | |
| TrapIDLLVMDebugTrap enum value | llvm::GCNSubtarget | |
| TrapIDLLVMTrap enum value | llvm::GCNSubtarget | |
| TrapRegValues enum name | llvm::GCNSubtarget | |
| TSInfo | llvm::GCNSubtarget | protected |
| UnalignedBufferAccess | llvm::GCNSubtarget | protected |
| UnalignedScratchAccess | llvm::GCNSubtarget | protected |
| unsafeDSOffsetFoldingEnabled() const | llvm::GCNSubtarget | inline |
| useDS128() const | llvm::GCNSubtarget | inline |
| useFlatForGlobal() const | llvm::GCNSubtarget | inline |
| usePRTStrictNull() const | llvm::GCNSubtarget | inline |
| useVGPRIndexMode(bool UserEnable) const | llvm::GCNSubtarget | inline |
| VIInsts | llvm::GCNSubtarget | protected |
| vmemWriteNeedsExpWaitcnt() const | llvm::GCNSubtarget | inline |
| VOLCANIC_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| WavefrontSize | llvm::AMDGPUSubtarget | protected |
| ~AMDGPUSubtarget() | llvm::AMDGPUSubtarget | inlinevirtual |
| ~GCNSubtarget() override | llvm::GCNSubtarget | |
