LLVM  8.0.1
PPCFrameLowering.h
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1 //===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H
14 #define LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H
15 
16 #include "PPC.h"
17 #include "llvm/ADT/STLExtras.h"
20 
21 namespace llvm {
22 class PPCSubtarget;
23 
25  const PPCSubtarget &Subtarget;
26  const unsigned ReturnSaveOffset;
27  const unsigned TOCSaveOffset;
28  const unsigned FramePointerSaveOffset;
29  const unsigned LinkageSize;
30  const unsigned BasePointerSaveOffset;
31 
32  /**
33  * Find register[s] that can be used in function prologue and epilogue
34  *
35  * Find register[s] that can be use as scratch register[s] in function
36  * prologue and epilogue to save various registers (Link Register, Base
37  * Pointer, etc.). Prefer R0/R12, if available. Otherwise choose whatever
38  * register[s] are available.
39  *
40  * This method will return true if it is able to find enough unique scratch
41  * registers (1 or 2 depending on the requirement). If it is unable to find
42  * enough available registers in the block, it will return false and set
43  * any passed output parameter that corresponds to a required unique register
44  * to PPC::NoRegister.
45  *
46  * \param[in] MBB The machine basic block to find an available register for
47  * \param[in] UseAtEnd Specify whether the scratch register will be used at
48  * the end of the basic block (i.e., will the scratch
49  * register kill a register defined in the basic block)
50  * \param[in] TwoUniqueRegsRequired Specify whether this basic block will
51  * require two unique scratch registers.
52  * \param[out] SR1 The scratch register to use
53  * \param[out] SR2 The second scratch register. If this pointer is not null
54  * the function will attempt to set it to an available
55  * register regardless of whether there is a hard requirement
56  * for two unique scratch registers.
57  * \return true if the required number of registers was found.
58  * false if the required number of scratch register weren't available.
59  * If either output parameter refers to a required scratch register
60  * that isn't available, it will be set to an invalid value.
61  */
62  bool findScratchRegister(MachineBasicBlock *MBB,
63  bool UseAtEnd,
64  bool TwoUniqueRegsRequired = false,
65  unsigned *SR1 = nullptr,
66  unsigned *SR2 = nullptr) const;
67  bool twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const;
68 
69  /**
70  * Create branch instruction for PPC::TCRETURN* (tail call return)
71  *
72  * \param[in] MBB that is terminated by PPC::TCRETURN*
73  */
74  void createTailCallBranchInstr(MachineBasicBlock &MBB) const;
75 
76 public:
77  PPCFrameLowering(const PPCSubtarget &STI);
78 
80  bool UpdateMF = true,
81  bool UseEstimate = false) const;
82 
83  /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
84  /// the function.
85  void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
86  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
87 
88  bool hasFP(const MachineFunction &MF) const override;
89  bool needsFP(const MachineFunction &MF) const;
90  void replaceFPWithRealFP(MachineFunction &MF) const;
91 
92  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
93  RegScavenger *RS = nullptr) const override;
95  RegScavenger *RS = nullptr) const override;
97 
100  const std::vector<CalleeSavedInfo> &CSI,
101  const TargetRegisterInfo *TRI) const override;
102  /// This function will assign callee saved gprs to volatile vector registers
103  /// for prologue spills when applicable. It returns false if there are any
104  /// registers which were not spilled to volatile vector registers.
105  bool
107  const TargetRegisterInfo *TRI,
108  std::vector<CalleeSavedInfo> &CSI) const override;
109 
112  MachineBasicBlock::iterator I) const override;
113 
116  std::vector<CalleeSavedInfo> &CSI,
117  const TargetRegisterInfo *TRI) const override;
118 
119  /// targetHandlesStackFrameRounding - Returns true if the target is
120  /// responsible for rounding up the stack frame (probably at emitPrologue
121  /// time).
122  bool targetHandlesStackFrameRounding() const override { return true; }
123 
124  /// getReturnSaveOffset - Return the previous frame offset to save the
125  /// return address.
126  unsigned getReturnSaveOffset() const { return ReturnSaveOffset; }
127 
128  /// getTOCSaveOffset - Return the previous frame offset to save the
129  /// TOC register -- 64-bit SVR4 ABI only.
130  unsigned getTOCSaveOffset() const { return TOCSaveOffset; }
131 
132  /// getFramePointerSaveOffset - Return the previous frame offset to save the
133  /// frame pointer.
134  unsigned getFramePointerSaveOffset() const { return FramePointerSaveOffset; }
135 
136  /// getBasePointerSaveOffset - Return the previous frame offset to save the
137  /// base pointer.
138  unsigned getBasePointerSaveOffset() const { return BasePointerSaveOffset; }
139 
140  /// getLinkageSize - Return the size of the PowerPC ABI linkage area.
141  ///
142  unsigned getLinkageSize() const { return LinkageSize; }
143 
144  const SpillSlot *
145  getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
146 
147  bool enableShrinkWrapping(const MachineFunction &MF) const override;
148 
149  /// Methods used by shrink wrapping to determine if MBB can be used for the
150  /// function prologue/epilogue.
151  bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
152  bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
153 };
154 } // End llvm namespace
155 
156 #endif
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const override
getCalleeSavedSpillSlots - This method returns a pointer to an array of pairs, that contains an entry...
This class represents lattice values for constants.
Definition: AllocatorList.h:24
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
unsigned const TargetRegisterInfo * TRI
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
bool targetHandlesStackFrameRounding() const override
targetHandlesStackFrameRounding - Returns true if the target is responsible for rounding up the stack...
unsigned getBasePointerSaveOffset() const
getBasePointerSaveOffset - Return the previous frame offset to save the base pointer.
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Methods used by shrink wrapping to determine if MBB can be used for the function prologue/epilogue.
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
This function will assign callee saved gprs to volatile vector registers for prologue spills when app...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
unsigned getTOCSaveOffset() const
getTOCSaveOffset - Return the previous frame offset to save the TOC register – 64-bit SVR4 ABI only...
Information about stack frame layout on the target.
PPCFrameLowering(const PPCSubtarget &STI)
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned getFramePointerSaveOffset() const
getFramePointerSaveOffset - Return the previous frame offset to save the frame pointer.
bool needsFP(const MachineFunction &MF) const
unsigned getReturnSaveOffset() const
getReturnSaveOffset - Return the previous frame offset to save the return address.
unsigned getLinkageSize() const
getLinkageSize - Return the size of the PowerPC ABI linkage area.
unsigned determineFrameLayout(MachineFunction &MF, bool UpdateMF=true, bool UseEstimate=false) const
determineFrameLayout - Determine the size of the frame and maximum call frame size.
IRTranslator LLVM IR MI
void replaceFPWithRealFP(MachineFunction &MF) const