14 #ifndef LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H 15 #define LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H 19 #define GET_REGBANK_DECLARATIONS 20 #include "X86GenRegisterBank.inc" 28 #define GET_TARGET_REGBANK_CLASS 29 #include "X86GenRegisterBank.inc" 30 #define GET_TARGET_REGBANK_INFO_CLASS 31 #include "X86GenRegisterBankInfo.def" static RegisterBankInfo::ValueMapping ValMappings[]
This class represents lattice values for constants.
Helper class that represents how the value of an instruction may be mapped and what is the related co...
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand...
unsigned const TargetRegisterInfo * TRI
Holds all the information related to register banks.
This class provides the information for the target register banks.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP)
static const RegisterBankInfo::ValueMapping * getValueMapping(PartialMappingIdx Idx, unsigned NumOperands)
unsigned const MachineRegisterInfo * MRI
virtual const InstructionMapping & getInstrMapping(const MachineInstr &MI) const
Get the mapping of the different operands of MI on the register bank.
Helper struct that represents how a value is partially mapped into a register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
static RegisterBankInfo::PartialMapping PartMappings[]
This class implements the register bank concept.
Helper struct that represents how a value is mapped through different register banks.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
virtual void applyMappingImpl(const OperandsMapper &OpdMapper) const
See applyMapping.
virtual InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const
Get the alternative mappings for MI.
virtual const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC) const
Get a register bank that covers RC.